2 * nct6775 - Driver for the hardware monitoring functionality of
3 * Nuvoton NCT677x Super-I/O chips
5 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net>
7 * Derived from w83627ehf driver
8 * Copyright (C) 2005-2012 Jean Delvare <jdelvare@suse.de>
9 * Copyright (C) 2006 Yuan Mu (Winbond),
10 * Rudolf Marek <r.marek@assembler.cz>
11 * David Hubbard <david.c.hubbard@gmail.com>
12 * Daniel J Blueman <daniel.blueman@gmail.com>
13 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
15 * Shamelessly ripped from the w83627hf driver
16 * Copyright (C) 2003 Mark Studebaker
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
33 * Supports the following chips:
35 * Chip #vin #fan #pwm #temp chip IDs man ID
36 * nct6106d 9 3 3 6+3 0xc450 0xc1 0x5ca3
37 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
38 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
39 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3
40 * nct6791d 15 6 6 2+6 0xc800 0xc1 0x5ca3
41 * nct6792d 15 6 6 2+6 0xc910 0xc1 0x5ca3
42 * nct6793d 15 6 6 2+6 0xd120 0xc1 0x5ca3
43 * nct6795d 14 6 6 2+6 0xd350 0xc1 0x5ca3
45 * #temp lists the number of monitored temperature sources (first value) plus
46 * the number of directly connectable temperature sensors (second value).
49 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
51 #include <linux/module.h>
52 #include <linux/init.h>
53 #include <linux/slab.h>
54 #include <linux/jiffies.h>
55 #include <linux/platform_device.h>
56 #include <linux/hwmon.h>
57 #include <linux/hwmon-sysfs.h>
58 #include <linux/hwmon-vid.h>
59 #include <linux/err.h>
60 #include <linux/mutex.h>
61 #include <linux/acpi.h>
62 #include <linux/dmi.h>
69 enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791, nct6792, nct6793,
72 /* used to set data->name = nct6775_device_names[data->sio_kind] */
73 static const char * const nct6775_device_names[] = {
84 static const char * const nct6775_sio_names[] __initconst = {
95 static unsigned short force_id;
96 module_param(force_id, ushort, 0);
97 MODULE_PARM_DESC(force_id, "Override the detected device ID");
99 static unsigned short fan_debounce;
100 module_param(fan_debounce, ushort, 0);
101 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
103 #define DRVNAME "nct6775"
106 * Super-I/O constants and functions
109 #define NCT6775_LD_ACPI 0x0a
110 #define NCT6775_LD_HWM 0x0b
111 #define NCT6775_LD_VID 0x0d
112 #define NCT6775_LD_12 0x12
114 #define SIO_REG_LDSEL 0x07 /* Logical device select */
115 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
116 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
117 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
119 #define SIO_NCT6106_ID 0xc450
120 #define SIO_NCT6775_ID 0xb470
121 #define SIO_NCT6776_ID 0xc330
122 #define SIO_NCT6779_ID 0xc560
123 #define SIO_NCT6791_ID 0xc800
124 #define SIO_NCT6792_ID 0xc910
125 #define SIO_NCT6793_ID 0xd120
126 #define SIO_NCT6795_ID 0xd350
127 #define SIO_ID_MASK 0xFFF0
129 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
132 superio_outb(int ioreg, int reg, int val)
135 outb(val, ioreg + 1);
139 superio_inb(int ioreg, int reg)
142 return inb(ioreg + 1);
146 superio_select(int ioreg, int ld)
148 outb(SIO_REG_LDSEL, ioreg);
153 superio_enter(int ioreg)
156 * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
158 if (!request_muxed_region(ioreg, 2, DRVNAME))
168 superio_exit(int ioreg)
172 outb(0x02, ioreg + 1);
173 release_region(ioreg, 2);
180 #define IOREGION_ALIGNMENT (~7)
181 #define IOREGION_OFFSET 5
182 #define IOREGION_LENGTH 2
183 #define ADDR_REG_OFFSET 0
184 #define DATA_REG_OFFSET 1
186 #define NCT6775_REG_BANK 0x4E
187 #define NCT6775_REG_CONFIG 0x40
190 * Not currently used:
191 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
192 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
193 * REG_MAN_ID is at port 0x4f
194 * REG_CHIP_ID is at port 0x58
197 #define NUM_TEMP 10 /* Max number of temp attribute sets w/ limits*/
198 #define NUM_TEMP_FIXED 6 /* Max number of fixed temp attribute sets */
200 #define NUM_REG_ALARM 7 /* Max number of alarm registers */
201 #define NUM_REG_BEEP 5 /* Max number of beep registers */
205 #define TEMP_SOURCE_VIRTUAL 0x1f
207 /* Common and NCT6775 specific data */
209 /* Voltage min/max registers for nr=7..14 are in bank 5 */
211 static const u16 NCT6775_REG_IN_MAX[] = {
212 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
213 0x55c, 0x55e, 0x560, 0x562 };
214 static const u16 NCT6775_REG_IN_MIN[] = {
215 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
216 0x55d, 0x55f, 0x561, 0x563 };
217 static const u16 NCT6775_REG_IN[] = {
218 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
221 #define NCT6775_REG_VBAT 0x5D
222 #define NCT6775_REG_DIODE 0x5E
223 #define NCT6775_DIODE_MASK 0x02
225 #define NCT6775_REG_FANDIV1 0x506
226 #define NCT6775_REG_FANDIV2 0x507
228 #define NCT6775_REG_CR_FAN_DEBOUNCE 0xf0
230 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
232 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
234 static const s8 NCT6775_ALARM_BITS[] = {
235 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
236 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
238 6, 7, 11, -1, -1, /* fan1..fan5 */
239 -1, -1, -1, /* unused */
240 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
241 12, -1 }; /* intrusion0, intrusion1 */
243 #define FAN_ALARM_BASE 16
244 #define TEMP_ALARM_BASE 24
245 #define INTRUSION_ALARM_BASE 30
247 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
250 * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
253 static const s8 NCT6775_BEEP_BITS[] = {
254 0, 1, 2, 3, 8, 9, 10, 16, /* in0.. in7 */
255 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
256 21, /* global beep enable */
257 6, 7, 11, 28, -1, /* fan1..fan5 */
258 -1, -1, -1, /* unused */
259 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
260 12, -1 }; /* intrusion0, intrusion1 */
262 #define BEEP_ENABLE_BASE 15
264 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
265 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
267 /* DC or PWM output fan configuration */
268 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
269 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
271 /* Advanced Fan control, some values are common for all fans */
273 static const u16 NCT6775_REG_TARGET[] = {
274 0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
275 static const u16 NCT6775_REG_FAN_MODE[] = {
276 0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
277 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
278 0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
279 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
280 0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
281 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
282 0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
283 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
284 0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
285 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
286 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
288 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
289 0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
290 static const u16 NCT6775_REG_PWM[] = {
291 0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
292 static const u16 NCT6775_REG_PWM_READ[] = {
293 0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
295 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
296 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
297 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
298 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0, 0 };
300 static const u16 NCT6775_REG_TEMP[] = {
301 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
303 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
305 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
306 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
307 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
308 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
309 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
310 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
312 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
313 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
315 static const u16 NCT6775_REG_TEMP_SEL[] = {
316 0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
318 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
319 0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
320 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
321 0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
322 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
323 0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
324 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
325 0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
326 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
327 0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
329 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
331 static const u16 NCT6775_REG_AUTO_TEMP[] = {
332 0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
333 static const u16 NCT6775_REG_AUTO_PWM[] = {
334 0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
336 #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p))
337 #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p))
339 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
341 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
342 0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
343 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
344 0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
346 static const char *const nct6775_temp_label[] = {
360 "PCH_CHIP_CPU_MAX_TEMP",
370 #define NCT6775_TEMP_MASK 0x001ffffe
372 static const u16 NCT6775_REG_TEMP_ALTERNATE[32] = {
378 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
379 = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
382 /* NCT6776 specific data */
384 /* STEP_UP_TIME and STEP_DOWN_TIME regs are swapped for all chips but NCT6775 */
385 #define NCT6776_REG_FAN_STEP_UP_TIME NCT6775_REG_FAN_STEP_DOWN_TIME
386 #define NCT6776_REG_FAN_STEP_DOWN_TIME NCT6775_REG_FAN_STEP_UP_TIME
388 static const s8 NCT6776_ALARM_BITS[] = {
389 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
390 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
392 6, 7, 11, 10, 23, /* fan1..fan5 */
393 -1, -1, -1, /* unused */
394 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
395 12, 9 }; /* intrusion0, intrusion1 */
397 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
399 static const s8 NCT6776_BEEP_BITS[] = {
400 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */
401 8, -1, -1, -1, -1, -1, -1, /* in8..in14 */
402 24, /* global beep enable */
403 25, 26, 27, 28, 29, /* fan1..fan5 */
404 -1, -1, -1, /* unused */
405 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
406 30, 31 }; /* intrusion0, intrusion1 */
408 static const u16 NCT6776_REG_TOLERANCE_H[] = {
409 0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
411 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
412 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
414 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
415 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
417 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
418 0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
420 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
421 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
423 static const char *const nct6776_temp_label[] = {
438 "PCH_CHIP_CPU_MAX_TEMP",
449 #define NCT6776_TEMP_MASK 0x007ffffe
451 static const u16 NCT6776_REG_TEMP_ALTERNATE[32] = {
457 static const u16 NCT6776_REG_TEMP_CRIT[32] = {
462 /* NCT6779 specific data */
464 static const u16 NCT6779_REG_IN[] = {
465 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
466 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
468 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
469 0x459, 0x45A, 0x45B, 0x568 };
471 static const s8 NCT6779_ALARM_BITS[] = {
472 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
473 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
475 6, 7, 11, 10, 23, /* fan1..fan5 */
476 -1, -1, -1, /* unused */
477 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
478 12, 9 }; /* intrusion0, intrusion1 */
480 static const s8 NCT6779_BEEP_BITS[] = {
481 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */
482 8, 9, 10, 11, 12, 13, 14, /* in8..in14 */
483 24, /* global beep enable */
484 25, 26, 27, 28, 29, /* fan1..fan5 */
485 -1, -1, -1, /* unused */
486 16, 17, -1, -1, -1, -1, /* temp1..temp6 */
487 30, 31 }; /* intrusion0, intrusion1 */
489 static const u16 NCT6779_REG_FAN[] = {
490 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
491 static const u16 NCT6779_REG_FAN_PULSES[] = {
492 0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
494 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
495 0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
496 #define NCT6779_CRITICAL_PWM_ENABLE_MASK 0x01
497 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
498 0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
500 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
501 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
502 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
504 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
506 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
509 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
510 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
512 static const char *const nct6779_temp_label[] = {
531 "PCH_CHIP_CPU_MAX_TEMP",
547 #define NCT6779_TEMP_MASK 0x07ffff7e
548 #define NCT6791_TEMP_MASK 0x87ffff7e
550 static const u16 NCT6779_REG_TEMP_ALTERNATE[32]
551 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
552 0, 0, 0, 0, 0, 0, 0, 0,
553 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
556 static const u16 NCT6779_REG_TEMP_CRIT[32] = {
561 /* NCT6791 specific data */
563 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE 0x28
565 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[6] = { 0, 0x239 };
566 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[6] = { 0, 0x23a };
567 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[6] = { 0, 0x23b };
568 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[6] = { 0, 0x23c };
569 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[6] = { 0, 0x23d };
570 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[6] = { 0, 0x23e };
572 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
573 0x459, 0x45A, 0x45B, 0x568, 0x45D };
575 static const s8 NCT6791_ALARM_BITS[] = {
576 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
577 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
579 6, 7, 11, 10, 23, 33, /* fan1..fan6 */
581 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
582 12, 9 }; /* intrusion0, intrusion1 */
584 /* NCT6792/NCT6793 specific data */
586 static const u16 NCT6792_REG_TEMP_MON[] = {
587 0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d };
588 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = {
589 0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
591 static const char *const nct6792_temp_label[] = {
610 "PCH_CHIP_CPU_MAX_TEMP",
619 "PECI Agent 0 Calibration",
620 "PECI Agent 1 Calibration",
626 #define NCT6792_TEMP_MASK 0x9fffff7e
628 static const char *const nct6793_temp_label[] = {
647 "PCH_CHIP_CPU_MAX_TEMP",
657 "PECI Agent 0 Calibration",
658 "PECI Agent 1 Calibration",
663 #define NCT6793_TEMP_MASK 0xbfff037e
665 static const char *const nct6795_temp_label[] = {
684 "PCH_CHIP_CPU_MAX_TEMP",
694 "PECI Agent 0 Calibration",
695 "PECI Agent 1 Calibration",
700 #define NCT6795_TEMP_MASK 0xbfffff7e
702 /* NCT6102D/NCT6106D specific data */
704 #define NCT6106_REG_VBAT 0x318
705 #define NCT6106_REG_DIODE 0x319
706 #define NCT6106_DIODE_MASK 0x01
708 static const u16 NCT6106_REG_IN_MAX[] = {
709 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
710 static const u16 NCT6106_REG_IN_MIN[] = {
711 0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
712 static const u16 NCT6106_REG_IN[] = {
713 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
715 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
716 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
717 static const u16 NCT6106_REG_TEMP_HYST[] = {
718 0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
719 static const u16 NCT6106_REG_TEMP_OVER[] = {
720 0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
721 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
722 0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
723 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
724 0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
725 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
726 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
727 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
729 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
730 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
731 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
732 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
734 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
735 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
736 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
737 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
738 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
739 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
740 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
741 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
743 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
744 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
745 0x11b, 0x12b, 0x13b };
747 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
748 #define NCT6106_CRITICAL_PWM_ENABLE_MASK 0x10
749 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
751 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
752 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
753 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
754 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
755 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
756 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
758 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
760 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
761 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
762 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
763 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
764 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
765 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
767 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
768 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
770 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
771 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
773 static const s8 NCT6106_ALARM_BITS[] = {
774 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
775 9, -1, -1, -1, -1, -1, -1, /* in8..in14 */
777 32, 33, 34, -1, -1, /* fan1..fan5 */
778 -1, -1, -1, /* unused */
779 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
780 48, -1 /* intrusion0, intrusion1 */
783 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
784 0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
786 static const s8 NCT6106_BEEP_BITS[] = {
787 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
788 9, 10, 11, 12, -1, -1, -1, /* in8..in14 */
789 32, /* global beep enable */
790 24, 25, 26, 27, 28, /* fan1..fan5 */
791 -1, -1, -1, /* unused */
792 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
793 34, -1 /* intrusion0, intrusion1 */
796 static const u16 NCT6106_REG_TEMP_ALTERNATE[32] = {
802 static const u16 NCT6106_REG_TEMP_CRIT[32] = {
807 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
809 if (mode == 0 && pwm == 255)
814 static int pwm_enable_to_reg(enum pwm_enable mode)
825 /* 1 is DC mode, output in ms */
826 static unsigned int step_time_from_reg(u8 reg, u8 mode)
828 return mode ? 400 * reg : 100 * reg;
831 static u8 step_time_to_reg(unsigned int msec, u8 mode)
833 return clamp_val((mode ? (msec + 200) / 400 :
834 (msec + 50) / 100), 1, 255);
837 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
839 if (reg == 0 || reg == 255)
841 return 1350000U / (reg << divreg);
844 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
846 if ((reg & 0xff1f) == 0xff1f)
849 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
854 return 1350000U / reg;
857 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
859 if (reg == 0 || reg == 0xffff)
863 * Even though the registers are 16 bit wide, the fan divisor
866 return 1350000U / (reg << divreg);
869 static u16 fan_to_reg(u32 fan, unsigned int divreg)
874 return (1350000U / fan) >> divreg;
877 static inline unsigned int
884 * Some of the voltage inputs have internal scaling, the tables below
885 * contain 8 (the ADC LSB in mV) * scaling factor * 100
887 static const u16 scale_in[15] = {
888 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
892 static inline long in_from_reg(u8 reg, u8 nr)
894 return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
897 static inline u8 in_to_reg(u32 val, u8 nr)
899 return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
903 * Data structures and manipulation thereof
906 struct nct6775_data {
907 int addr; /* IO base of hw monitor block */
908 int sioreg; /* SIO register address */
912 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
913 struct device *hwmon_dev;
916 const struct attribute_group *groups[6];
918 u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
919 * 3=temp_crit, 4=temp_lcrit
921 u8 temp_src[NUM_TEMP];
922 u16 reg_temp_config[NUM_TEMP];
923 const char * const *temp_label;
931 const s8 *ALARM_BITS;
935 const u16 *REG_IN_MINMAX[2];
937 const u16 *REG_TARGET;
939 const u16 *REG_FAN_MODE;
940 const u16 *REG_FAN_MIN;
941 const u16 *REG_FAN_PULSES;
942 const u16 *FAN_PULSE_SHIFT;
943 const u16 *REG_FAN_TIME[3];
945 const u16 *REG_TOLERANCE_H;
947 const u8 *REG_PWM_MODE;
948 const u8 *PWM_MODE_MASK;
950 const u16 *REG_PWM[7]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
951 * [3]=pwm_max, [4]=pwm_step,
952 * [5]=weight_duty_step, [6]=weight_duty_base
954 const u16 *REG_PWM_READ;
956 const u16 *REG_CRITICAL_PWM_ENABLE;
957 u8 CRITICAL_PWM_ENABLE_MASK;
958 const u16 *REG_CRITICAL_PWM;
960 const u16 *REG_AUTO_TEMP;
961 const u16 *REG_AUTO_PWM;
963 const u16 *REG_CRITICAL_TEMP;
964 const u16 *REG_CRITICAL_TEMP_TOLERANCE;
966 const u16 *REG_TEMP_SOURCE; /* temp register sources */
967 const u16 *REG_TEMP_SEL;
968 const u16 *REG_WEIGHT_TEMP_SEL;
969 const u16 *REG_WEIGHT_TEMP[3]; /* 0=base, 1=tolerance, 2=step */
971 const u16 *REG_TEMP_OFFSET;
973 const u16 *REG_ALARM;
976 unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
977 unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
979 struct mutex update_lock;
980 bool valid; /* true if following fields are valid */
981 unsigned long last_updated; /* In jiffies */
983 /* Register values */
984 u8 bank; /* current register bank */
985 u8 in_num; /* number of in inputs we have */
986 u8 in[15][3]; /* [0]=in, [1]=in_max, [2]=in_min */
987 unsigned int rpm[NUM_FAN];
988 u16 fan_min[NUM_FAN];
989 u8 fan_pulses[NUM_FAN];
992 u8 has_fan; /* some fan inputs can be disabled */
993 u8 has_fan_min; /* some fans don't have min register */
996 u8 num_temp_alarms; /* 2, 3, or 6 */
997 u8 num_temp_beeps; /* 2, 3, or 6 */
998 u8 temp_fixed_num; /* 3 or 6 */
999 u8 temp_type[NUM_TEMP_FIXED];
1000 s8 temp_offset[NUM_TEMP_FIXED];
1001 s16 temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
1002 * 3=temp_crit, 4=temp_lcrit */
1006 u8 pwm_num; /* number of pwm */
1007 u8 pwm_mode[NUM_FAN]; /* 1->DC variable voltage,
1008 * 0->PWM variable duty cycle
1010 enum pwm_enable pwm_enable[NUM_FAN];
1013 * 2->thermal cruise mode (also called SmartFan I)
1014 * 3->fan speed cruise mode
1016 * 5->enhanced variable thermal cruise (SmartFan IV)
1018 u8 pwm[7][NUM_FAN]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
1019 * [3]=pwm_max, [4]=pwm_step,
1020 * [5]=weight_duty_step, [6]=weight_duty_base
1023 u8 target_temp[NUM_FAN];
1024 u8 target_temp_mask;
1025 u32 target_speed[NUM_FAN];
1026 u32 target_speed_tolerance[NUM_FAN];
1027 u8 speed_tolerance_limit;
1029 u8 temp_tolerance[2][NUM_FAN];
1032 u8 fan_time[3][NUM_FAN]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
1034 /* Automatic fan speed control registers */
1036 u8 auto_pwm[NUM_FAN][7];
1037 u8 auto_temp[NUM_FAN][7];
1038 u8 pwm_temp_sel[NUM_FAN];
1039 u8 pwm_weight_temp_sel[NUM_FAN];
1040 u8 weight_temp[3][NUM_FAN]; /* 0->temp_step, 1->temp_step_tol,
1050 u16 have_temp_fixed;
1053 /* Remember extra register values over suspend/resume */
1060 struct nct6775_sio_data {
1065 struct sensor_device_template {
1066 struct device_attribute dev_attr;
1074 bool s2; /* true if both index and nr are used */
1077 struct sensor_device_attr_u {
1079 struct sensor_device_attribute a1;
1080 struct sensor_device_attribute_2 a2;
1085 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) { \
1086 .attr = {.name = _template, .mode = _mode }, \
1091 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
1092 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
1093 .u.index = _index, \
1096 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
1098 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
1099 .u.s.index = _index, \
1103 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
1104 static struct sensor_device_template sensor_dev_template_##_name \
1105 = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, \
1108 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store, \
1110 static struct sensor_device_template sensor_dev_template_##_name \
1111 = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
1114 struct sensor_template_group {
1115 struct sensor_device_template **templates;
1116 umode_t (*is_visible)(struct kobject *, struct attribute *, int);
1120 static struct attribute_group *
1121 nct6775_create_attr_group(struct device *dev,
1122 const struct sensor_template_group *tg,
1125 struct attribute_group *group;
1126 struct sensor_device_attr_u *su;
1127 struct sensor_device_attribute *a;
1128 struct sensor_device_attribute_2 *a2;
1129 struct attribute **attrs;
1130 struct sensor_device_template **t;
1134 return ERR_PTR(-EINVAL);
1137 for (count = 0; *t; t++, count++)
1141 return ERR_PTR(-EINVAL);
1143 group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
1145 return ERR_PTR(-ENOMEM);
1147 attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
1150 return ERR_PTR(-ENOMEM);
1152 su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
1155 return ERR_PTR(-ENOMEM);
1157 group->attrs = attrs;
1158 group->is_visible = tg->is_visible;
1160 for (i = 0; i < repeat; i++) {
1162 while (*t != NULL) {
1163 snprintf(su->name, sizeof(su->name),
1164 (*t)->dev_attr.attr.name, tg->base + i);
1167 sysfs_attr_init(&a2->dev_attr.attr);
1168 a2->dev_attr.attr.name = su->name;
1169 a2->nr = (*t)->u.s.nr + i;
1170 a2->index = (*t)->u.s.index;
1171 a2->dev_attr.attr.mode =
1172 (*t)->dev_attr.attr.mode;
1173 a2->dev_attr.show = (*t)->dev_attr.show;
1174 a2->dev_attr.store = (*t)->dev_attr.store;
1175 *attrs = &a2->dev_attr.attr;
1178 sysfs_attr_init(&a->dev_attr.attr);
1179 a->dev_attr.attr.name = su->name;
1180 a->index = (*t)->u.index + i;
1181 a->dev_attr.attr.mode =
1182 (*t)->dev_attr.attr.mode;
1183 a->dev_attr.show = (*t)->dev_attr.show;
1184 a->dev_attr.store = (*t)->dev_attr.store;
1185 *attrs = &a->dev_attr.attr;
1196 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1198 switch (data->kind) {
1200 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1201 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1202 reg == 0x111 || reg == 0x121 || reg == 0x131;
1204 return (((reg & 0xff00) == 0x100 ||
1205 (reg & 0xff00) == 0x200) &&
1206 ((reg & 0x00ff) == 0x50 ||
1207 (reg & 0x00ff) == 0x53 ||
1208 (reg & 0x00ff) == 0x55)) ||
1209 (reg & 0xfff0) == 0x630 ||
1210 reg == 0x640 || reg == 0x642 ||
1212 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1213 reg == 0x73 || reg == 0x75 || reg == 0x77;
1215 return (((reg & 0xff00) == 0x100 ||
1216 (reg & 0xff00) == 0x200) &&
1217 ((reg & 0x00ff) == 0x50 ||
1218 (reg & 0x00ff) == 0x53 ||
1219 (reg & 0x00ff) == 0x55)) ||
1220 (reg & 0xfff0) == 0x630 ||
1222 reg == 0x640 || reg == 0x642 ||
1223 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1224 reg == 0x73 || reg == 0x75 || reg == 0x77;
1230 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1231 ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) ||
1233 reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1234 reg == 0x640 || reg == 0x642 ||
1235 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1236 reg == 0x7b || reg == 0x7d;
1242 * On older chips, only registers 0x50-0x5f are banked.
1243 * On more recent chips, all registers are banked.
1244 * Assume that is the case and set the bank number for each access.
1245 * Cache the bank number so it only needs to be set if it changes.
1247 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1251 if (data->bank != bank) {
1252 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1253 outb_p(bank, data->addr + DATA_REG_OFFSET);
1258 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1260 int res, word_sized = is_word_sized(data, reg);
1262 nct6775_set_bank(data, reg);
1263 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1264 res = inb_p(data->addr + DATA_REG_OFFSET);
1266 outb_p((reg & 0xff) + 1,
1267 data->addr + ADDR_REG_OFFSET);
1268 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1273 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1275 int word_sized = is_word_sized(data, reg);
1277 nct6775_set_bank(data, reg);
1278 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1280 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1281 outb_p((reg & 0xff) + 1,
1282 data->addr + ADDR_REG_OFFSET);
1284 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1288 /* We left-align 8-bit temperature values to make the code simpler */
1289 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1293 res = nct6775_read_value(data, reg);
1294 if (!is_word_sized(data, reg))
1300 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1302 if (!is_word_sized(data, reg))
1304 return nct6775_write_value(data, reg, value);
1307 /* This function assumes that the caller holds data->update_lock */
1308 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1314 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1315 | (data->fan_div[0] & 0x7);
1316 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1319 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1320 | ((data->fan_div[1] << 4) & 0x70);
1321 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1324 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1325 | (data->fan_div[2] & 0x7);
1326 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1329 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1330 | ((data->fan_div[3] << 4) & 0x70);
1331 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1336 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1338 if (data->kind == nct6775)
1339 nct6775_write_fan_div(data, nr);
1342 static void nct6775_update_fan_div(struct nct6775_data *data)
1346 i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1347 data->fan_div[0] = i & 0x7;
1348 data->fan_div[1] = (i & 0x70) >> 4;
1349 i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1350 data->fan_div[2] = i & 0x7;
1351 if (data->has_fan & (1 << 3))
1352 data->fan_div[3] = (i & 0x70) >> 4;
1355 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1357 if (data->kind == nct6775)
1358 nct6775_update_fan_div(data);
1361 static void nct6775_init_fan_div(struct nct6775_data *data)
1365 nct6775_update_fan_div_common(data);
1367 * For all fans, start with highest divider value if the divider
1368 * register is not initialized. This ensures that we get a
1369 * reading from the fan count register, even if it is not optimal.
1370 * We'll compute a better divider later on.
1372 for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1373 if (!(data->has_fan & (1 << i)))
1375 if (data->fan_div[i] == 0) {
1376 data->fan_div[i] = 7;
1377 nct6775_write_fan_div_common(data, i);
1382 static void nct6775_init_fan_common(struct device *dev,
1383 struct nct6775_data *data)
1388 if (data->has_fan_div)
1389 nct6775_init_fan_div(data);
1392 * If fan_min is not set (0), set it to 0xff to disable it. This
1393 * prevents the unnecessary warning when fanX_min is reported as 0.
1395 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1396 if (data->has_fan_min & (1 << i)) {
1397 reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1399 nct6775_write_value(data, data->REG_FAN_MIN[i],
1400 data->has_fan_div ? 0xff
1406 static void nct6775_select_fan_div(struct device *dev,
1407 struct nct6775_data *data, int nr, u16 reg)
1409 u8 fan_div = data->fan_div[nr];
1412 if (!data->has_fan_div)
1416 * If we failed to measure the fan speed, or the reported value is not
1417 * in the optimal range, and the clock divider can be modified,
1418 * let's try that for next time.
1420 if (reg == 0x00 && fan_div < 0x07)
1422 else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1425 if (fan_div != data->fan_div[nr]) {
1426 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1427 nr + 1, div_from_reg(data->fan_div[nr]),
1428 div_from_reg(fan_div));
1430 /* Preserve min limit if possible */
1431 if (data->has_fan_min & (1 << nr)) {
1432 fan_min = data->fan_min[nr];
1433 if (fan_div > data->fan_div[nr]) {
1434 if (fan_min != 255 && fan_min > 1)
1437 if (fan_min != 255) {
1443 if (fan_min != data->fan_min[nr]) {
1444 data->fan_min[nr] = fan_min;
1445 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1449 data->fan_div[nr] = fan_div;
1450 nct6775_write_fan_div_common(data, nr);
1454 static void nct6775_update_pwm(struct device *dev)
1456 struct nct6775_data *data = dev_get_drvdata(dev);
1458 int fanmodecfg, reg;
1461 for (i = 0; i < data->pwm_num; i++) {
1462 if (!(data->has_pwm & (1 << i)))
1465 duty_is_dc = data->REG_PWM_MODE[i] &&
1466 (nct6775_read_value(data, data->REG_PWM_MODE[i])
1467 & data->PWM_MODE_MASK[i]);
1468 data->pwm_mode[i] = duty_is_dc;
1470 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1471 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1472 if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1474 = nct6775_read_value(data,
1475 data->REG_PWM[j][i]);
1479 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1480 (fanmodecfg >> 4) & 7);
1482 if (!data->temp_tolerance[0][i] ||
1483 data->pwm_enable[i] != speed_cruise)
1484 data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1485 if (!data->target_speed_tolerance[i] ||
1486 data->pwm_enable[i] == speed_cruise) {
1487 u8 t = fanmodecfg & 0x0f;
1489 if (data->REG_TOLERANCE_H) {
1490 t |= (nct6775_read_value(data,
1491 data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1493 data->target_speed_tolerance[i] = t;
1496 data->temp_tolerance[1][i] =
1497 nct6775_read_value(data,
1498 data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1500 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1501 data->pwm_temp_sel[i] = reg & 0x1f;
1502 /* If fan can stop, report floor as 0 */
1504 data->pwm[2][i] = 0;
1506 if (!data->REG_WEIGHT_TEMP_SEL[i])
1509 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1510 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1511 /* If weight is disabled, report weight source as 0 */
1512 if (j == 1 && !(reg & 0x80))
1513 data->pwm_weight_temp_sel[i] = 0;
1515 /* Weight temp data */
1516 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1517 data->weight_temp[j][i]
1518 = nct6775_read_value(data,
1519 data->REG_WEIGHT_TEMP[j][i]);
1524 static void nct6775_update_pwm_limits(struct device *dev)
1526 struct nct6775_data *data = dev_get_drvdata(dev);
1531 for (i = 0; i < data->pwm_num; i++) {
1532 if (!(data->has_pwm & (1 << i)))
1535 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1536 data->fan_time[j][i] =
1537 nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1540 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1541 /* Update only in matching mode or if never updated */
1542 if (!data->target_temp[i] ||
1543 data->pwm_enable[i] == thermal_cruise)
1544 data->target_temp[i] = reg_t & data->target_temp_mask;
1545 if (!data->target_speed[i] ||
1546 data->pwm_enable[i] == speed_cruise) {
1547 if (data->REG_TOLERANCE_H) {
1548 reg_t |= (nct6775_read_value(data,
1549 data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1551 data->target_speed[i] = reg_t;
1554 for (j = 0; j < data->auto_pwm_num; j++) {
1555 data->auto_pwm[i][j] =
1556 nct6775_read_value(data,
1557 NCT6775_AUTO_PWM(data, i, j));
1558 data->auto_temp[i][j] =
1559 nct6775_read_value(data,
1560 NCT6775_AUTO_TEMP(data, i, j));
1563 /* critical auto_pwm temperature data */
1564 data->auto_temp[i][data->auto_pwm_num] =
1565 nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1567 switch (data->kind) {
1569 reg = nct6775_read_value(data,
1570 NCT6775_REG_CRITICAL_ENAB[i]);
1571 data->auto_pwm[i][data->auto_pwm_num] =
1572 (reg & 0x02) ? 0xff : 0x00;
1575 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1583 reg = nct6775_read_value(data,
1584 data->REG_CRITICAL_PWM_ENABLE[i]);
1585 if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1586 reg = nct6775_read_value(data,
1587 data->REG_CRITICAL_PWM[i]);
1590 data->auto_pwm[i][data->auto_pwm_num] = reg;
1596 static struct nct6775_data *nct6775_update_device(struct device *dev)
1598 struct nct6775_data *data = dev_get_drvdata(dev);
1601 mutex_lock(&data->update_lock);
1603 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1605 /* Fan clock dividers */
1606 nct6775_update_fan_div_common(data);
1608 /* Measured voltages and limits */
1609 for (i = 0; i < data->in_num; i++) {
1610 if (!(data->have_in & (1 << i)))
1613 data->in[i][0] = nct6775_read_value(data,
1615 data->in[i][1] = nct6775_read_value(data,
1616 data->REG_IN_MINMAX[0][i]);
1617 data->in[i][2] = nct6775_read_value(data,
1618 data->REG_IN_MINMAX[1][i]);
1621 /* Measured fan speeds and limits */
1622 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1625 if (!(data->has_fan & (1 << i)))
1628 reg = nct6775_read_value(data, data->REG_FAN[i]);
1629 data->rpm[i] = data->fan_from_reg(reg,
1632 if (data->has_fan_min & (1 << i))
1633 data->fan_min[i] = nct6775_read_value(data,
1634 data->REG_FAN_MIN[i]);
1635 data->fan_pulses[i] =
1636 (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1637 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1639 nct6775_select_fan_div(dev, data, i, reg);
1642 nct6775_update_pwm(dev);
1643 nct6775_update_pwm_limits(dev);
1645 /* Measured temperatures and limits */
1646 for (i = 0; i < NUM_TEMP; i++) {
1647 if (!(data->have_temp & (1 << i)))
1649 for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1650 if (data->reg_temp[j][i])
1652 = nct6775_read_temp(data,
1653 data->reg_temp[j][i]);
1655 if (i >= NUM_TEMP_FIXED ||
1656 !(data->have_temp_fixed & (1 << i)))
1658 data->temp_offset[i]
1659 = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1663 for (i = 0; i < NUM_REG_ALARM; i++) {
1666 if (!data->REG_ALARM[i])
1668 alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1669 data->alarms |= ((u64)alarm) << (i << 3);
1673 for (i = 0; i < NUM_REG_BEEP; i++) {
1676 if (!data->REG_BEEP[i])
1678 beep = nct6775_read_value(data, data->REG_BEEP[i]);
1679 data->beeps |= ((u64)beep) << (i << 3);
1682 data->last_updated = jiffies;
1686 mutex_unlock(&data->update_lock);
1691 * Sysfs callback functions
1694 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1696 struct nct6775_data *data = nct6775_update_device(dev);
1697 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1698 int index = sattr->index;
1701 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1705 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1708 struct nct6775_data *data = dev_get_drvdata(dev);
1709 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1710 int index = sattr->index;
1715 err = kstrtoul(buf, 10, &val);
1718 mutex_lock(&data->update_lock);
1719 data->in[nr][index] = in_to_reg(val, nr);
1720 nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1721 data->in[nr][index]);
1722 mutex_unlock(&data->update_lock);
1727 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1729 struct nct6775_data *data = nct6775_update_device(dev);
1730 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1731 int nr = data->ALARM_BITS[sattr->index];
1733 return sprintf(buf, "%u\n",
1734 (unsigned int)((data->alarms >> nr) & 0x01));
1737 static int find_temp_source(struct nct6775_data *data, int index, int count)
1739 int source = data->temp_src[index];
1742 for (nr = 0; nr < count; nr++) {
1745 src = nct6775_read_value(data,
1746 data->REG_TEMP_SOURCE[nr]) & 0x1f;
1754 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1756 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1757 struct nct6775_data *data = nct6775_update_device(dev);
1758 unsigned int alarm = 0;
1762 * For temperatures, there is no fixed mapping from registers to alarm
1763 * bits. Alarm bits are determined by the temperature source mapping.
1765 nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1767 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1769 alarm = (data->alarms >> bit) & 0x01;
1771 return sprintf(buf, "%u\n", alarm);
1775 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1777 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1778 struct nct6775_data *data = nct6775_update_device(dev);
1779 int nr = data->BEEP_BITS[sattr->index];
1781 return sprintf(buf, "%u\n",
1782 (unsigned int)((data->beeps >> nr) & 0x01));
1786 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
1789 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1790 struct nct6775_data *data = dev_get_drvdata(dev);
1791 int nr = data->BEEP_BITS[sattr->index];
1792 int regindex = nr >> 3;
1796 err = kstrtoul(buf, 10, &val);
1802 mutex_lock(&data->update_lock);
1804 data->beeps |= (1ULL << nr);
1806 data->beeps &= ~(1ULL << nr);
1807 nct6775_write_value(data, data->REG_BEEP[regindex],
1808 (data->beeps >> (regindex << 3)) & 0xff);
1809 mutex_unlock(&data->update_lock);
1814 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1816 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1817 struct nct6775_data *data = nct6775_update_device(dev);
1818 unsigned int beep = 0;
1822 * For temperatures, there is no fixed mapping from registers to beep
1823 * enable bits. Beep enable bits are determined by the temperature
1826 nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1828 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1830 beep = (data->beeps >> bit) & 0x01;
1832 return sprintf(buf, "%u\n", beep);
1836 store_temp_beep(struct device *dev, struct device_attribute *attr,
1837 const char *buf, size_t count)
1839 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1840 struct nct6775_data *data = dev_get_drvdata(dev);
1841 int nr, bit, regindex;
1845 err = kstrtoul(buf, 10, &val);
1851 nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1855 bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1856 regindex = bit >> 3;
1858 mutex_lock(&data->update_lock);
1860 data->beeps |= (1ULL << bit);
1862 data->beeps &= ~(1ULL << bit);
1863 nct6775_write_value(data, data->REG_BEEP[regindex],
1864 (data->beeps >> (regindex << 3)) & 0xff);
1865 mutex_unlock(&data->update_lock);
1870 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1871 struct attribute *attr, int index)
1873 struct device *dev = container_of(kobj, struct device, kobj);
1874 struct nct6775_data *data = dev_get_drvdata(dev);
1875 int in = index / 5; /* voltage index */
1877 if (!(data->have_in & (1 << in)))
1883 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1884 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1885 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
1887 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1888 store_in_reg, 0, 1);
1889 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1890 store_in_reg, 0, 2);
1893 * nct6775_in_is_visible uses the index into the following array
1894 * to determine if attributes should be created or not.
1895 * Any change in order or content must be matched.
1897 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1898 &sensor_dev_template_in_input,
1899 &sensor_dev_template_in_alarm,
1900 &sensor_dev_template_in_beep,
1901 &sensor_dev_template_in_min,
1902 &sensor_dev_template_in_max,
1906 static const struct sensor_template_group nct6775_in_template_group = {
1907 .templates = nct6775_attributes_in_template,
1908 .is_visible = nct6775_in_is_visible,
1912 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1914 struct nct6775_data *data = nct6775_update_device(dev);
1915 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1916 int nr = sattr->index;
1918 return sprintf(buf, "%d\n", data->rpm[nr]);
1922 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1924 struct nct6775_data *data = nct6775_update_device(dev);
1925 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1926 int nr = sattr->index;
1928 return sprintf(buf, "%d\n",
1929 data->fan_from_reg_min(data->fan_min[nr],
1930 data->fan_div[nr]));
1934 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1936 struct nct6775_data *data = nct6775_update_device(dev);
1937 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1938 int nr = sattr->index;
1940 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1944 store_fan_min(struct device *dev, struct device_attribute *attr,
1945 const char *buf, size_t count)
1947 struct nct6775_data *data = dev_get_drvdata(dev);
1948 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1949 int nr = sattr->index;
1955 err = kstrtoul(buf, 10, &val);
1959 mutex_lock(&data->update_lock);
1960 if (!data->has_fan_div) {
1961 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1967 val = 1350000U / val;
1968 val = (val & 0x1f) | ((val << 3) & 0xff00);
1970 data->fan_min[nr] = val;
1971 goto write_min; /* Leave fan divider alone */
1974 /* No min limit, alarm disabled */
1975 data->fan_min[nr] = 255;
1976 new_div = data->fan_div[nr]; /* No change */
1977 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1980 reg = 1350000U / val;
1981 if (reg >= 128 * 255) {
1983 * Speed below this value cannot possibly be represented,
1984 * even with the highest divider (128)
1986 data->fan_min[nr] = 254;
1987 new_div = 7; /* 128 == (1 << 7) */
1989 "fan%u low limit %lu below minimum %u, set to minimum\n",
1990 nr + 1, val, data->fan_from_reg_min(254, 7));
1993 * Speed above this value cannot possibly be represented,
1994 * even with the lowest divider (1)
1996 data->fan_min[nr] = 1;
1997 new_div = 0; /* 1 == (1 << 0) */
1999 "fan%u low limit %lu above maximum %u, set to maximum\n",
2000 nr + 1, val, data->fan_from_reg_min(1, 0));
2003 * Automatically pick the best divider, i.e. the one such
2004 * that the min limit will correspond to a register value
2005 * in the 96..192 range
2008 while (reg > 192 && new_div < 7) {
2012 data->fan_min[nr] = reg;
2017 * Write both the fan clock divider (if it changed) and the new
2018 * fan min (unconditionally)
2020 if (new_div != data->fan_div[nr]) {
2021 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
2022 nr + 1, div_from_reg(data->fan_div[nr]),
2023 div_from_reg(new_div));
2024 data->fan_div[nr] = new_div;
2025 nct6775_write_fan_div_common(data, nr);
2026 /* Give the chip time to sample a new speed value */
2027 data->last_updated = jiffies;
2031 nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
2032 mutex_unlock(&data->update_lock);
2038 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
2040 struct nct6775_data *data = nct6775_update_device(dev);
2041 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2042 int p = data->fan_pulses[sattr->index];
2044 return sprintf(buf, "%d\n", p ? : 4);
2048 store_fan_pulses(struct device *dev, struct device_attribute *attr,
2049 const char *buf, size_t count)
2051 struct nct6775_data *data = dev_get_drvdata(dev);
2052 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2053 int nr = sattr->index;
2058 err = kstrtoul(buf, 10, &val);
2065 mutex_lock(&data->update_lock);
2066 data->fan_pulses[nr] = val & 3;
2067 reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
2068 reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
2069 reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
2070 nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
2071 mutex_unlock(&data->update_lock);
2076 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
2077 struct attribute *attr, int index)
2079 struct device *dev = container_of(kobj, struct device, kobj);
2080 struct nct6775_data *data = dev_get_drvdata(dev);
2081 int fan = index / 6; /* fan index */
2082 int nr = index % 6; /* attribute index */
2084 if (!(data->has_fan & (1 << fan)))
2087 if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
2089 if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
2091 if (nr == 4 && !(data->has_fan_min & (1 << fan)))
2093 if (nr == 5 && data->kind != nct6775)
2099 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
2100 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
2102 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
2103 store_beep, FAN_ALARM_BASE);
2104 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
2105 store_fan_pulses, 0);
2106 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
2108 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
2111 * nct6775_fan_is_visible uses the index into the following array
2112 * to determine if attributes should be created or not.
2113 * Any change in order or content must be matched.
2115 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
2116 &sensor_dev_template_fan_input,
2117 &sensor_dev_template_fan_alarm, /* 1 */
2118 &sensor_dev_template_fan_beep, /* 2 */
2119 &sensor_dev_template_fan_pulses,
2120 &sensor_dev_template_fan_min, /* 4 */
2121 &sensor_dev_template_fan_div, /* 5 */
2125 static const struct sensor_template_group nct6775_fan_template_group = {
2126 .templates = nct6775_attributes_fan_template,
2127 .is_visible = nct6775_fan_is_visible,
2132 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
2134 struct nct6775_data *data = nct6775_update_device(dev);
2135 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2136 int nr = sattr->index;
2138 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
2142 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
2144 struct nct6775_data *data = nct6775_update_device(dev);
2145 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2147 int index = sattr->index;
2149 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
2153 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
2156 struct nct6775_data *data = dev_get_drvdata(dev);
2157 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2159 int index = sattr->index;
2163 err = kstrtol(buf, 10, &val);
2167 mutex_lock(&data->update_lock);
2168 data->temp[index][nr] = LM75_TEMP_TO_REG(val);
2169 nct6775_write_temp(data, data->reg_temp[index][nr],
2170 data->temp[index][nr]);
2171 mutex_unlock(&data->update_lock);
2176 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
2178 struct nct6775_data *data = nct6775_update_device(dev);
2179 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2181 return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
2185 store_temp_offset(struct device *dev, struct device_attribute *attr,
2186 const char *buf, size_t count)
2188 struct nct6775_data *data = dev_get_drvdata(dev);
2189 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2190 int nr = sattr->index;
2194 err = kstrtol(buf, 10, &val);
2198 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
2200 mutex_lock(&data->update_lock);
2201 data->temp_offset[nr] = val;
2202 nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2203 mutex_unlock(&data->update_lock);
2209 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2211 struct nct6775_data *data = nct6775_update_device(dev);
2212 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2213 int nr = sattr->index;
2215 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2219 store_temp_type(struct device *dev, struct device_attribute *attr,
2220 const char *buf, size_t count)
2222 struct nct6775_data *data = nct6775_update_device(dev);
2223 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2224 int nr = sattr->index;
2227 u8 vbat, diode, vbit, dbit;
2229 err = kstrtoul(buf, 10, &val);
2233 if (val != 1 && val != 3 && val != 4)
2236 mutex_lock(&data->update_lock);
2238 data->temp_type[nr] = val;
2240 dbit = data->DIODE_MASK << nr;
2241 vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
2242 diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
2244 case 1: /* CPU diode (diode, current mode) */
2248 case 3: /* diode, voltage mode */
2251 case 4: /* thermistor */
2254 nct6775_write_value(data, data->REG_VBAT, vbat);
2255 nct6775_write_value(data, data->REG_DIODE, diode);
2257 mutex_unlock(&data->update_lock);
2261 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2262 struct attribute *attr, int index)
2264 struct device *dev = container_of(kobj, struct device, kobj);
2265 struct nct6775_data *data = dev_get_drvdata(dev);
2266 int temp = index / 10; /* temp index */
2267 int nr = index % 10; /* attribute index */
2269 if (!(data->have_temp & (1 << temp)))
2272 if (nr == 1 && !data->temp_label)
2275 if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2276 return 0; /* alarm */
2278 if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2279 return 0; /* beep */
2281 if (nr == 4 && !data->reg_temp[1][temp]) /* max */
2284 if (nr == 5 && !data->reg_temp[2][temp]) /* max_hyst */
2287 if (nr == 6 && !data->reg_temp[3][temp]) /* crit */
2290 if (nr == 7 && !data->reg_temp[4][temp]) /* lcrit */
2293 /* offset and type only apply to fixed sensors */
2294 if (nr > 7 && !(data->have_temp_fixed & (1 << temp)))
2300 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2301 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2302 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2304 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2305 show_temp, store_temp, 0, 2);
2306 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2308 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2310 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2311 show_temp_offset, store_temp_offset, 0);
2312 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2313 store_temp_type, 0);
2314 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2315 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2316 store_temp_beep, 0);
2319 * nct6775_temp_is_visible uses the index into the following array
2320 * to determine if attributes should be created or not.
2321 * Any change in order or content must be matched.
2323 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2324 &sensor_dev_template_temp_input,
2325 &sensor_dev_template_temp_label,
2326 &sensor_dev_template_temp_alarm, /* 2 */
2327 &sensor_dev_template_temp_beep, /* 3 */
2328 &sensor_dev_template_temp_max, /* 4 */
2329 &sensor_dev_template_temp_max_hyst, /* 5 */
2330 &sensor_dev_template_temp_crit, /* 6 */
2331 &sensor_dev_template_temp_lcrit, /* 7 */
2332 &sensor_dev_template_temp_offset, /* 8 */
2333 &sensor_dev_template_temp_type, /* 9 */
2337 static const struct sensor_template_group nct6775_temp_template_group = {
2338 .templates = nct6775_attributes_temp_template,
2339 .is_visible = nct6775_temp_is_visible,
2344 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2346 struct nct6775_data *data = nct6775_update_device(dev);
2347 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2349 return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
2353 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2354 const char *buf, size_t count)
2356 struct nct6775_data *data = dev_get_drvdata(dev);
2357 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2358 int nr = sattr->index;
2363 err = kstrtoul(buf, 10, &val);
2370 /* Setting DC mode is not supported for all chips/channels */
2371 if (data->REG_PWM_MODE[nr] == 0) {
2377 mutex_lock(&data->update_lock);
2378 data->pwm_mode[nr] = val;
2379 reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2380 reg &= ~data->PWM_MODE_MASK[nr];
2382 reg |= data->PWM_MODE_MASK[nr];
2383 nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2384 mutex_unlock(&data->update_lock);
2389 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2391 struct nct6775_data *data = nct6775_update_device(dev);
2392 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2394 int index = sattr->index;
2398 * For automatic fan control modes, show current pwm readings.
2399 * Otherwise, show the configured value.
2401 if (index == 0 && data->pwm_enable[nr] > manual)
2402 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
2404 pwm = data->pwm[index][nr];
2406 return sprintf(buf, "%d\n", pwm);
2410 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2413 struct nct6775_data *data = dev_get_drvdata(dev);
2414 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2416 int index = sattr->index;
2418 int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2420 = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2424 err = kstrtoul(buf, 10, &val);
2427 val = clamp_val(val, minval[index], maxval[index]);
2429 mutex_lock(&data->update_lock);
2430 data->pwm[index][nr] = val;
2431 nct6775_write_value(data, data->REG_PWM[index][nr], val);
2432 if (index == 2) { /* floor: disable if val == 0 */
2433 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2437 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2439 mutex_unlock(&data->update_lock);
2443 /* Returns 0 if OK, -EINVAL otherwise */
2444 static int check_trip_points(struct nct6775_data *data, int nr)
2448 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2449 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2452 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2453 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2456 /* validate critical temperature and pwm if enabled (pwm > 0) */
2457 if (data->auto_pwm[nr][data->auto_pwm_num]) {
2458 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2459 data->auto_temp[nr][data->auto_pwm_num] ||
2460 data->auto_pwm[nr][data->auto_pwm_num - 1] >
2461 data->auto_pwm[nr][data->auto_pwm_num])
2467 static void pwm_update_registers(struct nct6775_data *data, int nr)
2471 switch (data->pwm_enable[nr]) {
2476 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2477 reg = (reg & ~data->tolerance_mask) |
2478 (data->target_speed_tolerance[nr] & data->tolerance_mask);
2479 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2480 nct6775_write_value(data, data->REG_TARGET[nr],
2481 data->target_speed[nr] & 0xff);
2482 if (data->REG_TOLERANCE_H) {
2483 reg = (data->target_speed[nr] >> 8) & 0x0f;
2484 reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2485 nct6775_write_value(data,
2486 data->REG_TOLERANCE_H[nr],
2490 case thermal_cruise:
2491 nct6775_write_value(data, data->REG_TARGET[nr],
2492 data->target_temp[nr]);
2495 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2496 reg = (reg & ~data->tolerance_mask) |
2497 data->temp_tolerance[0][nr];
2498 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2504 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2506 struct nct6775_data *data = nct6775_update_device(dev);
2507 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2509 return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2513 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2514 const char *buf, size_t count)
2516 struct nct6775_data *data = dev_get_drvdata(dev);
2517 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2518 int nr = sattr->index;
2523 err = kstrtoul(buf, 10, &val);
2530 if (val == sf3 && data->kind != nct6775)
2533 if (val == sf4 && check_trip_points(data, nr)) {
2534 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2535 dev_err(dev, "Adjust trip points and try again\n");
2539 mutex_lock(&data->update_lock);
2540 data->pwm_enable[nr] = val;
2543 * turn off pwm control: select manual mode, set pwm to maximum
2545 data->pwm[0][nr] = 255;
2546 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2548 pwm_update_registers(data, nr);
2549 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2551 reg |= pwm_enable_to_reg(val) << 4;
2552 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2553 mutex_unlock(&data->update_lock);
2558 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2562 for (i = 0; i < NUM_TEMP; i++) {
2563 if (!(data->have_temp & (1 << i)))
2565 if (src == data->temp_src[i]) {
2571 return sprintf(buf, "%d\n", sel);
2575 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2577 struct nct6775_data *data = nct6775_update_device(dev);
2578 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2579 int index = sattr->index;
2581 return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2585 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2586 const char *buf, size_t count)
2588 struct nct6775_data *data = nct6775_update_device(dev);
2589 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2590 int nr = sattr->index;
2594 err = kstrtoul(buf, 10, &val);
2597 if (val == 0 || val > NUM_TEMP)
2599 if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2602 mutex_lock(&data->update_lock);
2603 src = data->temp_src[val - 1];
2604 data->pwm_temp_sel[nr] = src;
2605 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2608 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2609 mutex_unlock(&data->update_lock);
2615 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2618 struct nct6775_data *data = nct6775_update_device(dev);
2619 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2620 int index = sattr->index;
2622 return show_pwm_temp_sel_common(data, buf,
2623 data->pwm_weight_temp_sel[index]);
2627 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2628 const char *buf, size_t count)
2630 struct nct6775_data *data = nct6775_update_device(dev);
2631 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2632 int nr = sattr->index;
2636 err = kstrtoul(buf, 10, &val);
2641 if (val && (!(data->have_temp & (1 << (val - 1))) ||
2642 !data->temp_src[val - 1]))
2645 mutex_lock(&data->update_lock);
2647 src = data->temp_src[val - 1];
2648 data->pwm_weight_temp_sel[nr] = src;
2649 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2651 reg |= (src | 0x80);
2652 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2654 data->pwm_weight_temp_sel[nr] = 0;
2655 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2657 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2659 mutex_unlock(&data->update_lock);
2665 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2667 struct nct6775_data *data = nct6775_update_device(dev);
2668 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2670 return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2674 store_target_temp(struct device *dev, struct device_attribute *attr,
2675 const char *buf, size_t count)
2677 struct nct6775_data *data = dev_get_drvdata(dev);
2678 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2679 int nr = sattr->index;
2683 err = kstrtoul(buf, 10, &val);
2687 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2688 data->target_temp_mask);
2690 mutex_lock(&data->update_lock);
2691 data->target_temp[nr] = val;
2692 pwm_update_registers(data, nr);
2693 mutex_unlock(&data->update_lock);
2698 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2700 struct nct6775_data *data = nct6775_update_device(dev);
2701 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2702 int nr = sattr->index;
2704 return sprintf(buf, "%d\n",
2705 fan_from_reg16(data->target_speed[nr],
2706 data->fan_div[nr]));
2710 store_target_speed(struct device *dev, struct device_attribute *attr,
2711 const char *buf, size_t count)
2713 struct nct6775_data *data = dev_get_drvdata(dev);
2714 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2715 int nr = sattr->index;
2720 err = kstrtoul(buf, 10, &val);
2724 val = clamp_val(val, 0, 1350000U);
2725 speed = fan_to_reg(val, data->fan_div[nr]);
2727 mutex_lock(&data->update_lock);
2728 data->target_speed[nr] = speed;
2729 pwm_update_registers(data, nr);
2730 mutex_unlock(&data->update_lock);
2735 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2738 struct nct6775_data *data = nct6775_update_device(dev);
2739 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2741 int index = sattr->index;
2743 return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2747 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2748 const char *buf, size_t count)
2750 struct nct6775_data *data = dev_get_drvdata(dev);
2751 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2753 int index = sattr->index;
2757 err = kstrtoul(buf, 10, &val);
2761 /* Limit tolerance as needed */
2762 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2764 mutex_lock(&data->update_lock);
2765 data->temp_tolerance[index][nr] = val;
2767 pwm_update_registers(data, nr);
2769 nct6775_write_value(data,
2770 data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2772 mutex_unlock(&data->update_lock);
2777 * Fan speed tolerance is a tricky beast, since the associated register is
2778 * a tick counter, but the value is reported and configured as rpm.
2779 * Compute resulting low and high rpm values and report the difference.
2782 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2785 struct nct6775_data *data = nct6775_update_device(dev);
2786 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2787 int nr = sattr->index;
2788 int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2789 int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2799 tolerance = (fan_from_reg16(low, data->fan_div[nr])
2800 - fan_from_reg16(high, data->fan_div[nr])) / 2;
2802 return sprintf(buf, "%d\n", tolerance);
2806 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2807 const char *buf, size_t count)
2809 struct nct6775_data *data = dev_get_drvdata(dev);
2810 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2811 int nr = sattr->index;
2816 err = kstrtoul(buf, 10, &val);
2820 high = fan_from_reg16(data->target_speed[nr],
2821 data->fan_div[nr]) + val;
2822 low = fan_from_reg16(data->target_speed[nr],
2823 data->fan_div[nr]) - val;
2829 val = (fan_to_reg(low, data->fan_div[nr]) -
2830 fan_to_reg(high, data->fan_div[nr])) / 2;
2832 /* Limit tolerance as needed */
2833 val = clamp_val(val, 0, data->speed_tolerance_limit);
2835 mutex_lock(&data->update_lock);
2836 data->target_speed_tolerance[nr] = val;
2837 pwm_update_registers(data, nr);
2838 mutex_unlock(&data->update_lock);
2842 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2843 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2845 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2846 store_pwm_enable, 0);
2847 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2848 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2849 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2850 show_target_temp, store_target_temp, 0);
2851 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2852 show_target_speed, store_target_speed, 0);
2853 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2854 show_speed_tolerance, store_speed_tolerance, 0);
2856 /* Smart Fan registers */
2859 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2861 struct nct6775_data *data = nct6775_update_device(dev);
2862 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2864 int index = sattr->index;
2866 return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2870 store_weight_temp(struct device *dev, struct device_attribute *attr,
2871 const char *buf, size_t count)
2873 struct nct6775_data *data = dev_get_drvdata(dev);
2874 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2876 int index = sattr->index;
2880 err = kstrtoul(buf, 10, &val);
2884 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2886 mutex_lock(&data->update_lock);
2887 data->weight_temp[index][nr] = val;
2888 nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2889 mutex_unlock(&data->update_lock);
2893 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2894 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2895 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2896 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2897 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2898 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2899 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2900 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2901 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2902 S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2903 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2904 S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2907 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2909 struct nct6775_data *data = nct6775_update_device(dev);
2910 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2912 int index = sattr->index;
2914 return sprintf(buf, "%d\n",
2915 step_time_from_reg(data->fan_time[index][nr],
2916 data->pwm_mode[nr]));
2920 store_fan_time(struct device *dev, struct device_attribute *attr,
2921 const char *buf, size_t count)
2923 struct nct6775_data *data = dev_get_drvdata(dev);
2924 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2926 int index = sattr->index;
2930 err = kstrtoul(buf, 10, &val);
2934 val = step_time_to_reg(val, data->pwm_mode[nr]);
2935 mutex_lock(&data->update_lock);
2936 data->fan_time[index][nr] = val;
2937 nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2938 mutex_unlock(&data->update_lock);
2942 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
2944 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2946 struct nct6775_data *data = dev_get_drvdata(dev);
2948 return sprintf(buf, "%s\n", data->name);
2951 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2955 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2957 struct nct6775_data *data = nct6775_update_device(dev);
2958 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2960 return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2964 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2965 const char *buf, size_t count)
2967 struct nct6775_data *data = dev_get_drvdata(dev);
2968 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2970 int point = sattr->index;
2975 err = kstrtoul(buf, 10, &val);
2981 if (point == data->auto_pwm_num) {
2982 if (data->kind != nct6775 && !val)
2984 if (data->kind != nct6779 && val)
2988 mutex_lock(&data->update_lock);
2989 data->auto_pwm[nr][point] = val;
2990 if (point < data->auto_pwm_num) {
2991 nct6775_write_value(data,
2992 NCT6775_AUTO_PWM(data, nr, point),
2993 data->auto_pwm[nr][point]);
2995 switch (data->kind) {
2997 /* disable if needed (pwm == 0) */
2998 reg = nct6775_read_value(data,
2999 NCT6775_REG_CRITICAL_ENAB[nr]);
3004 nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
3008 break; /* always enabled, nothing to do */
3015 nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
3017 reg = nct6775_read_value(data,
3018 data->REG_CRITICAL_PWM_ENABLE[nr]);
3020 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
3022 reg |= data->CRITICAL_PWM_ENABLE_MASK;
3023 nct6775_write_value(data,
3024 data->REG_CRITICAL_PWM_ENABLE[nr],
3029 mutex_unlock(&data->update_lock);
3034 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
3036 struct nct6775_data *data = nct6775_update_device(dev);
3037 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3039 int point = sattr->index;
3042 * We don't know for sure if the temperature is signed or unsigned.
3043 * Assume it is unsigned.
3045 return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
3049 store_auto_temp(struct device *dev, struct device_attribute *attr,
3050 const char *buf, size_t count)
3052 struct nct6775_data *data = dev_get_drvdata(dev);
3053 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3055 int point = sattr->index;
3059 err = kstrtoul(buf, 10, &val);
3065 mutex_lock(&data->update_lock);
3066 data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
3067 if (point < data->auto_pwm_num) {
3068 nct6775_write_value(data,
3069 NCT6775_AUTO_TEMP(data, nr, point),
3070 data->auto_temp[nr][point]);
3072 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
3073 data->auto_temp[nr][point]);
3075 mutex_unlock(&data->update_lock);
3079 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
3080 struct attribute *attr, int index)
3082 struct device *dev = container_of(kobj, struct device, kobj);
3083 struct nct6775_data *data = dev_get_drvdata(dev);
3084 int pwm = index / 36; /* pwm index */
3085 int nr = index % 36; /* attribute index */
3087 if (!(data->has_pwm & (1 << pwm)))
3090 if ((nr >= 14 && nr <= 18) || nr == 21) /* weight */
3091 if (!data->REG_WEIGHT_TEMP_SEL[pwm])
3093 if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
3095 if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
3097 if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
3100 if (nr >= 22 && nr <= 35) { /* auto point */
3101 int api = (nr - 22) / 2; /* auto point index */
3103 if (api > data->auto_pwm_num)
3109 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
3110 show_fan_time, store_fan_time, 0, 0);
3111 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
3112 show_fan_time, store_fan_time, 0, 1);
3113 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
3114 show_fan_time, store_fan_time, 0, 2);
3115 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
3117 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
3119 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
3120 show_temp_tolerance, store_temp_tolerance, 0, 0);
3121 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
3122 S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
3125 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
3128 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
3131 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
3132 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
3133 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
3134 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
3136 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
3137 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
3138 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
3139 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
3141 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
3142 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
3143 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
3144 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
3146 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
3147 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
3148 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
3149 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
3151 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
3152 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
3153 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
3154 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
3156 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
3157 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
3158 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
3159 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
3161 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
3162 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
3163 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
3164 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
3167 * nct6775_pwm_is_visible uses the index into the following array
3168 * to determine if attributes should be created or not.
3169 * Any change in order or content must be matched.
3171 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
3172 &sensor_dev_template_pwm,
3173 &sensor_dev_template_pwm_mode,
3174 &sensor_dev_template_pwm_enable,
3175 &sensor_dev_template_pwm_temp_sel,
3176 &sensor_dev_template_pwm_temp_tolerance,
3177 &sensor_dev_template_pwm_crit_temp_tolerance,
3178 &sensor_dev_template_pwm_target_temp,
3179 &sensor_dev_template_fan_target,
3180 &sensor_dev_template_fan_tolerance,
3181 &sensor_dev_template_pwm_stop_time,
3182 &sensor_dev_template_pwm_step_up_time,
3183 &sensor_dev_template_pwm_step_down_time,
3184 &sensor_dev_template_pwm_start,
3185 &sensor_dev_template_pwm_floor,
3186 &sensor_dev_template_pwm_weight_temp_sel, /* 14 */
3187 &sensor_dev_template_pwm_weight_temp_step,
3188 &sensor_dev_template_pwm_weight_temp_step_tol,
3189 &sensor_dev_template_pwm_weight_temp_step_base,
3190 &sensor_dev_template_pwm_weight_duty_step, /* 18 */
3191 &sensor_dev_template_pwm_max, /* 19 */
3192 &sensor_dev_template_pwm_step, /* 20 */
3193 &sensor_dev_template_pwm_weight_duty_base, /* 21 */
3194 &sensor_dev_template_pwm_auto_point1_pwm, /* 22 */
3195 &sensor_dev_template_pwm_auto_point1_temp,
3196 &sensor_dev_template_pwm_auto_point2_pwm,
3197 &sensor_dev_template_pwm_auto_point2_temp,
3198 &sensor_dev_template_pwm_auto_point3_pwm,
3199 &sensor_dev_template_pwm_auto_point3_temp,
3200 &sensor_dev_template_pwm_auto_point4_pwm,
3201 &sensor_dev_template_pwm_auto_point4_temp,
3202 &sensor_dev_template_pwm_auto_point5_pwm,
3203 &sensor_dev_template_pwm_auto_point5_temp,
3204 &sensor_dev_template_pwm_auto_point6_pwm,
3205 &sensor_dev_template_pwm_auto_point6_temp,
3206 &sensor_dev_template_pwm_auto_point7_pwm,
3207 &sensor_dev_template_pwm_auto_point7_temp, /* 35 */
3212 static const struct sensor_template_group nct6775_pwm_template_group = {
3213 .templates = nct6775_attributes_pwm_template,
3214 .is_visible = nct6775_pwm_is_visible,
3219 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3221 struct nct6775_data *data = dev_get_drvdata(dev);
3223 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3226 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3228 /* Case open detection */
3231 clear_caseopen(struct device *dev, struct device_attribute *attr,
3232 const char *buf, size_t count)
3234 struct nct6775_data *data = dev_get_drvdata(dev);
3235 int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3240 if (kstrtoul(buf, 10, &val) || val != 0)
3243 mutex_lock(&data->update_lock);
3246 * Use CR registers to clear caseopen status.
3247 * The CR registers are the same for all chips, and not all chips
3248 * support clearing the caseopen status through "regular" registers.
3250 ret = superio_enter(data->sioreg);
3256 superio_select(data->sioreg, NCT6775_LD_ACPI);
3257 reg = superio_inb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3258 reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3259 superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3260 reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3261 superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3262 superio_exit(data->sioreg);
3264 data->valid = false; /* Force cache refresh */
3266 mutex_unlock(&data->update_lock);
3270 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3271 clear_caseopen, INTRUSION_ALARM_BASE);
3272 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3273 clear_caseopen, INTRUSION_ALARM_BASE + 1);
3274 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3275 store_beep, INTRUSION_ALARM_BASE);
3276 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3277 store_beep, INTRUSION_ALARM_BASE + 1);
3278 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3279 store_beep, BEEP_ENABLE_BASE);
3281 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3282 struct attribute *attr, int index)
3284 struct device *dev = container_of(kobj, struct device, kobj);
3285 struct nct6775_data *data = dev_get_drvdata(dev);
3287 if (index == 0 && !data->have_vid)
3290 if (index == 1 || index == 2) {
3291 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 1] < 0)
3295 if (index == 3 || index == 4) {
3296 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 3] < 0)
3304 * nct6775_other_is_visible uses the index into the following array
3305 * to determine if attributes should be created or not.
3306 * Any change in order or content must be matched.
3308 static struct attribute *nct6775_attributes_other[] = {
3309 &dev_attr_cpu0_vid.attr, /* 0 */
3310 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr, /* 1 */
3311 &sensor_dev_attr_intrusion1_alarm.dev_attr.attr, /* 2 */
3312 &sensor_dev_attr_intrusion0_beep.dev_attr.attr, /* 3 */
3313 &sensor_dev_attr_intrusion1_beep.dev_attr.attr, /* 4 */
3314 &sensor_dev_attr_beep_enable.dev_attr.attr, /* 5 */
3315 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
3316 &dev_attr_name.attr,
3321 static const struct attribute_group nct6775_group_other = {
3322 .attrs = nct6775_attributes_other,
3323 .is_visible = nct6775_other_is_visible,
3326 static inline void nct6775_init_device(struct nct6775_data *data)
3331 /* Start monitoring if needed */
3332 if (data->REG_CONFIG) {
3333 tmp = nct6775_read_value(data, data->REG_CONFIG);
3335 nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3338 /* Enable temperature sensors if needed */
3339 for (i = 0; i < NUM_TEMP; i++) {
3340 if (!(data->have_temp & (1 << i)))
3342 if (!data->reg_temp_config[i])
3344 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3346 nct6775_write_value(data, data->reg_temp_config[i],
3350 /* Enable VBAT monitoring if needed */
3351 tmp = nct6775_read_value(data, data->REG_VBAT);
3353 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3355 diode = nct6775_read_value(data, data->REG_DIODE);
3357 for (i = 0; i < data->temp_fixed_num; i++) {
3358 if (!(data->have_temp_fixed & (1 << i)))
3360 if ((tmp & (data->DIODE_MASK << i))) /* diode */
3362 = 3 - ((diode >> i) & data->DIODE_MASK);
3363 else /* thermistor */
3364 data->temp_type[i] = 4;
3369 nct6775_check_fan_inputs(struct nct6775_data *data)
3371 bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin;
3372 bool pwm3pin, pwm4pin, pwm5pin, pwm6pin;
3373 int sioreg = data->sioreg;
3376 /* Store SIO_REG_ENABLE for use during resume */
3377 superio_select(sioreg, NCT6775_LD_HWM);
3378 data->sio_reg_enable = superio_inb(sioreg, SIO_REG_ENABLE);
3380 /* fan4 and fan5 share some pins with the GPIO and serial flash */
3381 if (data->kind == nct6775) {
3382 regval = superio_inb(sioreg, 0x2c);
3384 fan3pin = regval & (1 << 6);
3385 pwm3pin = regval & (1 << 7);
3387 /* On NCT6775, fan4 shares pins with the fdc interface */
3388 fan4pin = !(superio_inb(sioreg, 0x2A) & 0x80);
3395 } else if (data->kind == nct6776) {
3396 bool gpok = superio_inb(sioreg, 0x27) & 0x80;
3397 const char *board_vendor, *board_name;
3399 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
3400 board_name = dmi_get_system_info(DMI_BOARD_NAME);
3402 if (board_name && board_vendor &&
3403 !strcmp(board_vendor, "ASRock")) {
3405 * Auxiliary fan monitoring is not enabled on ASRock
3406 * Z77 Pro4-M if booted in UEFI Ultra-FastBoot mode.
3407 * Observed with BIOS version 2.00.
3409 if (!strcmp(board_name, "Z77 Pro4-M")) {
3410 if ((data->sio_reg_enable & 0xe0) != 0xe0) {
3411 data->sio_reg_enable |= 0xe0;
3412 superio_outb(sioreg, SIO_REG_ENABLE,
3413 data->sio_reg_enable);
3418 if (data->sio_reg_enable & 0x80)
3421 fan3pin = !(superio_inb(sioreg, 0x24) & 0x40);
3423 if (data->sio_reg_enable & 0x40)
3426 fan4pin = superio_inb(sioreg, 0x1C) & 0x01;
3428 if (data->sio_reg_enable & 0x20)
3431 fan5pin = superio_inb(sioreg, 0x1C) & 0x02;
3439 } else if (data->kind == nct6106) {
3440 regval = superio_inb(sioreg, 0x24);
3441 fan3pin = !(regval & 0x80);
3442 pwm3pin = regval & 0x08;
3451 } else { /* NCT6779D, NCT6791D, NCT6792D, NCT6793D, NCT6795D */
3452 int regval_1b, regval_2a, regval_eb;
3454 regval = superio_inb(sioreg, 0x1c);
3456 fan3pin = !(regval & (1 << 5));
3457 fan4pin = !(regval & (1 << 6));
3458 fan5pin = !(regval & (1 << 7));
3460 pwm3pin = !(regval & (1 << 0));
3461 pwm4pin = !(regval & (1 << 1));
3462 pwm5pin = !(regval & (1 << 2));
3464 regval = superio_inb(sioreg, 0x2d);
3465 switch (data->kind) {
3468 fan6pin = regval & (1 << 1);
3469 pwm6pin = regval & (1 << 0);
3473 regval_1b = superio_inb(sioreg, 0x1b);
3474 regval_2a = superio_inb(sioreg, 0x2a);
3477 pwm5pin = regval & (1 << 7);
3478 fan6pin = regval & (1 << 1);
3479 pwm6pin = regval & (1 << 0);
3481 fan5pin = regval_1b & (1 << 5);
3483 superio_select(sioreg, NCT6775_LD_12);
3484 regval_eb = superio_inb(sioreg, 0xeb);
3486 fan5pin = regval_eb & (1 << 5);
3488 pwm5pin = (regval_eb & (1 << 4)) &&
3489 !(regval_2a & (1 << 0));
3491 fan6pin = regval_eb & (1 << 3);
3493 pwm6pin = regval_eb & (1 << 2);
3495 default: /* NCT6779D */
3504 /* fan 1 and 2 (0x03) are always present */
3505 data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
3506 (fan5pin << 4) | (fan6pin << 5);
3507 data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
3509 data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
3510 (pwm5pin << 4) | (pwm6pin << 5);
3513 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3514 int *available, int *mask)
3519 for (i = 0; i < data->pwm_num && *available; i++) {
3524 src = nct6775_read_value(data, regp[i]);
3526 if (!src || (*mask & (1 << src)))
3528 if (!(data->temp_mask & BIT(src)))
3531 index = __ffs(*available);
3532 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3533 *available &= ~(1 << index);
3538 static int nct6775_probe(struct platform_device *pdev)
3540 struct device *dev = &pdev->dev;
3541 struct nct6775_sio_data *sio_data = dev_get_platdata(dev);
3542 struct nct6775_data *data;
3543 struct resource *res;
3545 int src, mask, available;
3546 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3547 const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3548 const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3549 int num_reg_temp, num_reg_temp_mon;
3551 struct attribute_group *group;
3552 struct device *hwmon_dev;
3553 int num_attr_groups = 0;
3555 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3556 if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3560 data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3565 data->kind = sio_data->kind;
3566 data->sioreg = sio_data->sioreg;
3567 data->addr = res->start;
3568 mutex_init(&data->update_lock);
3569 data->name = nct6775_device_names[data->kind];
3570 data->bank = 0xff; /* Force initial bank selection */
3571 platform_set_drvdata(pdev, data);
3573 switch (data->kind) {
3577 data->auto_pwm_num = 4;
3578 data->temp_fixed_num = 3;
3579 data->num_temp_alarms = 6;
3580 data->num_temp_beeps = 6;
3582 data->fan_from_reg = fan_from_reg13;
3583 data->fan_from_reg_min = fan_from_reg13;
3585 data->temp_label = nct6776_temp_label;
3586 data->temp_mask = NCT6776_TEMP_MASK;
3588 data->REG_VBAT = NCT6106_REG_VBAT;
3589 data->REG_DIODE = NCT6106_REG_DIODE;
3590 data->DIODE_MASK = NCT6106_DIODE_MASK;
3591 data->REG_VIN = NCT6106_REG_IN;
3592 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3593 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3594 data->REG_TARGET = NCT6106_REG_TARGET;
3595 data->REG_FAN = NCT6106_REG_FAN;
3596 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3597 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3598 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3599 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3600 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3601 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3602 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3603 data->REG_PWM[0] = NCT6106_REG_PWM;
3604 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3605 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3606 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3607 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3608 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3609 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3610 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3611 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3612 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3613 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3614 data->REG_CRITICAL_TEMP_TOLERANCE
3615 = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3616 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3617 data->CRITICAL_PWM_ENABLE_MASK
3618 = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3619 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3620 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3621 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3622 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3623 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3624 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3625 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3626 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3627 data->REG_ALARM = NCT6106_REG_ALARM;
3628 data->ALARM_BITS = NCT6106_ALARM_BITS;
3629 data->REG_BEEP = NCT6106_REG_BEEP;
3630 data->BEEP_BITS = NCT6106_BEEP_BITS;
3632 reg_temp = NCT6106_REG_TEMP;
3633 reg_temp_mon = NCT6106_REG_TEMP_MON;
3634 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3635 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3636 reg_temp_over = NCT6106_REG_TEMP_OVER;
3637 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3638 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3639 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3640 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3641 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3642 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3648 data->auto_pwm_num = 6;
3649 data->has_fan_div = true;
3650 data->temp_fixed_num = 3;
3651 data->num_temp_alarms = 3;
3652 data->num_temp_beeps = 3;
3654 data->ALARM_BITS = NCT6775_ALARM_BITS;
3655 data->BEEP_BITS = NCT6775_BEEP_BITS;
3657 data->fan_from_reg = fan_from_reg16;
3658 data->fan_from_reg_min = fan_from_reg8;
3659 data->target_temp_mask = 0x7f;
3660 data->tolerance_mask = 0x0f;
3661 data->speed_tolerance_limit = 15;
3663 data->temp_label = nct6775_temp_label;
3664 data->temp_mask = NCT6775_TEMP_MASK;
3666 data->REG_CONFIG = NCT6775_REG_CONFIG;
3667 data->REG_VBAT = NCT6775_REG_VBAT;
3668 data->REG_DIODE = NCT6775_REG_DIODE;
3669 data->DIODE_MASK = NCT6775_DIODE_MASK;
3670 data->REG_VIN = NCT6775_REG_IN;
3671 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3672 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3673 data->REG_TARGET = NCT6775_REG_TARGET;
3674 data->REG_FAN = NCT6775_REG_FAN;
3675 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3676 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3677 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3678 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3679 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3680 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3681 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3682 data->REG_PWM[0] = NCT6775_REG_PWM;
3683 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3684 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3685 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3686 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3687 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3688 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3689 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3690 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3691 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3692 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3693 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3694 data->REG_CRITICAL_TEMP_TOLERANCE
3695 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3696 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3697 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3698 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3699 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3700 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3701 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3702 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3703 data->REG_ALARM = NCT6775_REG_ALARM;
3704 data->REG_BEEP = NCT6775_REG_BEEP;
3706 reg_temp = NCT6775_REG_TEMP;
3707 reg_temp_mon = NCT6775_REG_TEMP_MON;
3708 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3709 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3710 reg_temp_over = NCT6775_REG_TEMP_OVER;
3711 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3712 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3713 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3714 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3720 data->auto_pwm_num = 4;
3721 data->has_fan_div = false;
3722 data->temp_fixed_num = 3;
3723 data->num_temp_alarms = 3;
3724 data->num_temp_beeps = 6;
3726 data->ALARM_BITS = NCT6776_ALARM_BITS;
3727 data->BEEP_BITS = NCT6776_BEEP_BITS;
3729 data->fan_from_reg = fan_from_reg13;
3730 data->fan_from_reg_min = fan_from_reg13;
3731 data->target_temp_mask = 0xff;
3732 data->tolerance_mask = 0x07;
3733 data->speed_tolerance_limit = 63;
3735 data->temp_label = nct6776_temp_label;
3736 data->temp_mask = NCT6776_TEMP_MASK;
3738 data->REG_CONFIG = NCT6775_REG_CONFIG;
3739 data->REG_VBAT = NCT6775_REG_VBAT;
3740 data->REG_DIODE = NCT6775_REG_DIODE;
3741 data->DIODE_MASK = NCT6775_DIODE_MASK;
3742 data->REG_VIN = NCT6775_REG_IN;
3743 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3744 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3745 data->REG_TARGET = NCT6775_REG_TARGET;
3746 data->REG_FAN = NCT6775_REG_FAN;
3747 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3748 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3749 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3750 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3751 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3752 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3753 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3754 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3755 data->REG_PWM[0] = NCT6775_REG_PWM;
3756 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3757 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3758 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3759 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3760 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3761 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3762 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3763 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3764 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3765 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3766 data->REG_CRITICAL_TEMP_TOLERANCE
3767 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3768 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3769 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3770 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3771 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3772 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3773 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3774 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3775 data->REG_ALARM = NCT6775_REG_ALARM;
3776 data->REG_BEEP = NCT6776_REG_BEEP;
3778 reg_temp = NCT6775_REG_TEMP;
3779 reg_temp_mon = NCT6775_REG_TEMP_MON;
3780 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3781 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3782 reg_temp_over = NCT6775_REG_TEMP_OVER;
3783 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3784 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3785 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3786 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3792 data->auto_pwm_num = 4;
3793 data->has_fan_div = false;
3794 data->temp_fixed_num = 6;
3795 data->num_temp_alarms = 2;
3796 data->num_temp_beeps = 2;
3798 data->ALARM_BITS = NCT6779_ALARM_BITS;
3799 data->BEEP_BITS = NCT6779_BEEP_BITS;
3801 data->fan_from_reg = fan_from_reg13;
3802 data->fan_from_reg_min = fan_from_reg13;
3803 data->target_temp_mask = 0xff;
3804 data->tolerance_mask = 0x07;
3805 data->speed_tolerance_limit = 63;
3807 data->temp_label = nct6779_temp_label;
3808 data->temp_mask = NCT6779_TEMP_MASK;
3810 data->REG_CONFIG = NCT6775_REG_CONFIG;
3811 data->REG_VBAT = NCT6775_REG_VBAT;
3812 data->REG_DIODE = NCT6775_REG_DIODE;
3813 data->DIODE_MASK = NCT6775_DIODE_MASK;
3814 data->REG_VIN = NCT6779_REG_IN;
3815 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3816 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3817 data->REG_TARGET = NCT6775_REG_TARGET;
3818 data->REG_FAN = NCT6779_REG_FAN;
3819 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3820 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3821 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3822 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3823 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3824 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3825 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3826 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3827 data->REG_PWM[0] = NCT6775_REG_PWM;
3828 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3829 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3830 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3831 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3832 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3833 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3834 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3835 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3836 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3837 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3838 data->REG_CRITICAL_TEMP_TOLERANCE
3839 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3840 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3841 data->CRITICAL_PWM_ENABLE_MASK
3842 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3843 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3844 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3845 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3846 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3847 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3848 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3849 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3850 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3851 data->REG_ALARM = NCT6779_REG_ALARM;
3852 data->REG_BEEP = NCT6776_REG_BEEP;
3854 reg_temp = NCT6779_REG_TEMP;
3855 reg_temp_mon = NCT6779_REG_TEMP_MON;
3856 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3857 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3858 reg_temp_over = NCT6779_REG_TEMP_OVER;
3859 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3860 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3861 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3862 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3871 data->auto_pwm_num = 4;
3872 data->has_fan_div = false;
3873 data->temp_fixed_num = 6;
3874 data->num_temp_alarms = 2;
3875 data->num_temp_beeps = 2;
3877 data->ALARM_BITS = NCT6791_ALARM_BITS;
3878 data->BEEP_BITS = NCT6779_BEEP_BITS;
3880 data->fan_from_reg = fan_from_reg13;
3881 data->fan_from_reg_min = fan_from_reg13;
3882 data->target_temp_mask = 0xff;
3883 data->tolerance_mask = 0x07;
3884 data->speed_tolerance_limit = 63;
3886 switch (data->kind) {
3889 data->temp_label = nct6779_temp_label;
3890 data->temp_mask = NCT6791_TEMP_MASK;
3893 data->temp_label = nct6792_temp_label;
3894 data->temp_mask = NCT6792_TEMP_MASK;
3897 data->temp_label = nct6793_temp_label;
3898 data->temp_mask = NCT6793_TEMP_MASK;
3901 data->temp_label = nct6795_temp_label;
3902 data->temp_mask = NCT6795_TEMP_MASK;
3906 data->REG_CONFIG = NCT6775_REG_CONFIG;
3907 data->REG_VBAT = NCT6775_REG_VBAT;
3908 data->REG_DIODE = NCT6775_REG_DIODE;
3909 data->DIODE_MASK = NCT6775_DIODE_MASK;
3910 data->REG_VIN = NCT6779_REG_IN;
3911 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3912 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3913 data->REG_TARGET = NCT6775_REG_TARGET;
3914 data->REG_FAN = NCT6779_REG_FAN;
3915 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3916 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3917 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3918 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3919 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3920 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3921 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3922 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3923 data->REG_PWM[0] = NCT6775_REG_PWM;
3924 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3925 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3926 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
3927 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
3928 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3929 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3930 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3931 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3932 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3933 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3934 data->REG_CRITICAL_TEMP_TOLERANCE
3935 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3936 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3937 data->CRITICAL_PWM_ENABLE_MASK
3938 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3939 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3940 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3941 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3942 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3943 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
3944 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
3945 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
3946 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
3947 data->REG_ALARM = NCT6791_REG_ALARM;
3948 if (data->kind == nct6791)
3949 data->REG_BEEP = NCT6776_REG_BEEP;
3951 data->REG_BEEP = NCT6792_REG_BEEP;
3953 reg_temp = NCT6779_REG_TEMP;
3954 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3955 if (data->kind == nct6791) {
3956 reg_temp_mon = NCT6779_REG_TEMP_MON;
3957 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3959 reg_temp_mon = NCT6792_REG_TEMP_MON;
3960 num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON);
3962 reg_temp_over = NCT6779_REG_TEMP_OVER;
3963 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3964 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3965 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3966 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3972 data->have_in = (1 << data->in_num) - 1;
3973 data->have_temp = 0;
3976 * On some boards, not all available temperature sources are monitored,
3977 * even though some of the monitoring registers are unused.
3978 * Get list of unused monitoring registers, then detect if any fan
3979 * controls are configured to use unmonitored temperature sources.
3980 * If so, assign the unmonitored temperature sources to available
3981 * monitoring registers.
3985 for (i = 0; i < num_reg_temp; i++) {
3986 if (reg_temp[i] == 0)
3989 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3990 if (!src || (mask & (1 << src)))
3991 available |= 1 << i;
3997 * Now find unmonitored temperature registers and enable monitoring
3998 * if additional monitoring registers are available.
4000 add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
4001 add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
4004 s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */
4005 for (i = 0; i < num_reg_temp; i++) {
4006 if (reg_temp[i] == 0)
4009 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
4010 if (!src || (mask & (1 << src)))
4013 if (!(data->temp_mask & BIT(src))) {
4015 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
4016 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
4022 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
4023 if (src <= data->temp_fixed_num) {
4024 data->have_temp |= 1 << (src - 1);
4025 data->have_temp_fixed |= 1 << (src - 1);
4026 data->reg_temp[0][src - 1] = reg_temp[i];
4027 data->reg_temp[1][src - 1] = reg_temp_over[i];
4028 data->reg_temp[2][src - 1] = reg_temp_hyst[i];
4029 if (reg_temp_crit_h && reg_temp_crit_h[i])
4030 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
4031 else if (reg_temp_crit[src - 1])
4032 data->reg_temp[3][src - 1]
4033 = reg_temp_crit[src - 1];
4034 if (reg_temp_crit_l && reg_temp_crit_l[i])
4035 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
4036 data->reg_temp_config[src - 1] = reg_temp_config[i];
4037 data->temp_src[src - 1] = src;
4044 /* Use dynamic index for other sources */
4045 data->have_temp |= 1 << s;
4046 data->reg_temp[0][s] = reg_temp[i];
4047 data->reg_temp[1][s] = reg_temp_over[i];
4048 data->reg_temp[2][s] = reg_temp_hyst[i];
4049 data->reg_temp_config[s] = reg_temp_config[i];
4050 if (reg_temp_crit_h && reg_temp_crit_h[i])
4051 data->reg_temp[3][s] = reg_temp_crit_h[i];
4052 else if (reg_temp_crit[src - 1])
4053 data->reg_temp[3][s] = reg_temp_crit[src - 1];
4054 if (reg_temp_crit_l && reg_temp_crit_l[i])
4055 data->reg_temp[4][s] = reg_temp_crit_l[i];
4057 data->temp_src[s] = src;
4062 * Repeat with temperatures used for fan control.
4063 * This set of registers does not support limits.
4065 for (i = 0; i < num_reg_temp_mon; i++) {
4066 if (reg_temp_mon[i] == 0)
4069 src = nct6775_read_value(data, data->REG_TEMP_SEL[i]) & 0x1f;
4073 if (!(data->temp_mask & BIT(src))) {
4075 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
4076 src, i, data->REG_TEMP_SEL[i],
4082 * For virtual temperature sources, the 'virtual' temperature
4083 * for each fan reflects a different temperature, and there
4084 * are no duplicates.
4086 if (src != TEMP_SOURCE_VIRTUAL) {
4087 if (mask & (1 << src))
4092 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
4093 if (src <= data->temp_fixed_num) {
4094 if (data->have_temp & (1 << (src - 1)))
4096 data->have_temp |= 1 << (src - 1);
4097 data->have_temp_fixed |= 1 << (src - 1);
4098 data->reg_temp[0][src - 1] = reg_temp_mon[i];
4099 data->temp_src[src - 1] = src;
4106 /* Use dynamic index for other sources */
4107 data->have_temp |= 1 << s;
4108 data->reg_temp[0][s] = reg_temp_mon[i];
4109 data->temp_src[s] = src;
4113 #ifdef USE_ALTERNATE
4115 * Go through the list of alternate temp registers and enable
4117 * The temperature is already monitored if the respective bit in <mask>
4120 for (i = 0; i < 32; i++) {
4121 if (!(data->temp_mask & BIT(i)))
4123 if (!reg_temp_alternate[i])
4125 if (mask & (1 << (i + 1)))
4127 if (i < data->temp_fixed_num) {
4128 if (data->have_temp & (1 << i))
4130 data->have_temp |= 1 << i;
4131 data->have_temp_fixed |= 1 << i;
4132 data->reg_temp[0][i] = reg_temp_alternate[i];
4133 if (i < num_reg_temp) {
4134 data->reg_temp[1][i] = reg_temp_over[i];
4135 data->reg_temp[2][i] = reg_temp_hyst[i];
4137 data->temp_src[i] = i + 1;
4141 if (s >= NUM_TEMP) /* Abort if no more space */
4144 data->have_temp |= 1 << s;
4145 data->reg_temp[0][s] = reg_temp_alternate[i];
4146 data->temp_src[s] = i + 1;
4149 #endif /* USE_ALTERNATE */
4151 /* Initialize the chip */
4152 nct6775_init_device(data);
4154 err = superio_enter(sio_data->sioreg);
4158 cr2a = superio_inb(sio_data->sioreg, 0x2a);
4159 switch (data->kind) {
4161 data->have_vid = (cr2a & 0x40);
4164 data->have_vid = (cr2a & 0x60) == 0x40;
4177 * We can get the VID input values directly at logical device D 0xe3.
4179 if (data->have_vid) {
4180 superio_select(sio_data->sioreg, NCT6775_LD_VID);
4181 data->vid = superio_inb(sio_data->sioreg, 0xe3);
4182 data->vrm = vid_which_vrm();
4188 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
4189 tmp = superio_inb(sio_data->sioreg,
4190 NCT6775_REG_CR_FAN_DEBOUNCE);
4191 switch (data->kind) {
4209 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
4211 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
4215 nct6775_check_fan_inputs(data);
4217 superio_exit(sio_data->sioreg);
4219 /* Read fan clock dividers immediately */
4220 nct6775_init_fan_common(dev, data);
4222 /* Register sysfs hooks */
4223 group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
4226 return PTR_ERR(group);
4228 data->groups[num_attr_groups++] = group;
4230 group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
4231 fls(data->have_in));
4233 return PTR_ERR(group);
4235 data->groups[num_attr_groups++] = group;
4237 group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
4238 fls(data->has_fan));
4240 return PTR_ERR(group);
4242 data->groups[num_attr_groups++] = group;
4244 group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
4245 fls(data->have_temp));
4247 return PTR_ERR(group);
4249 data->groups[num_attr_groups++] = group;
4250 data->groups[num_attr_groups++] = &nct6775_group_other;
4252 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4253 err = sysfs_create_groups(&dev->kobj, data->groups);
4256 hwmon_dev = hwmon_device_register(dev);
4257 if (IS_ERR(hwmon_dev)) {
4258 sysfs_remove_groups(&dev->kobj, data->groups);
4259 return PTR_ERR(hwmon_dev);
4261 data->hwmon_dev = hwmon_dev;
4263 hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
4264 data, data->groups);
4266 return PTR_ERR_OR_ZERO(hwmon_dev);
4269 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4270 static int nct6775_remove(struct platform_device *pdev)
4272 struct nct6775_data *data = platform_get_drvdata(pdev);
4274 hwmon_device_unregister(data->hwmon_dev);
4275 sysfs_remove_groups(&pdev->dev.kobj, data->groups);
4280 static void nct6791_enable_io_mapping(int sioaddr)
4284 val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
4286 pr_info("Enabling hardware monitor logical device mappings.\n");
4287 superio_outb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
4292 static int __maybe_unused nct6775_suspend(struct device *dev)
4294 struct nct6775_data *data = nct6775_update_device(dev);
4296 mutex_lock(&data->update_lock);
4297 data->vbat = nct6775_read_value(data, data->REG_VBAT);
4298 if (data->kind == nct6775) {
4299 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
4300 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
4302 mutex_unlock(&data->update_lock);
4307 static int __maybe_unused nct6775_resume(struct device *dev)
4309 struct nct6775_data *data = dev_get_drvdata(dev);
4310 int sioreg = data->sioreg;
4314 mutex_lock(&data->update_lock);
4315 data->bank = 0xff; /* Force initial bank selection */
4317 err = superio_enter(sioreg);
4321 superio_select(sioreg, NCT6775_LD_HWM);
4322 reg = superio_inb(sioreg, SIO_REG_ENABLE);
4323 if (reg != data->sio_reg_enable)
4324 superio_outb(sioreg, SIO_REG_ENABLE, data->sio_reg_enable);
4326 if (data->kind == nct6791 || data->kind == nct6792 ||
4327 data->kind == nct6793 || data->kind == nct6795)
4328 nct6791_enable_io_mapping(sioreg);
4330 superio_exit(sioreg);
4332 /* Restore limits */
4333 for (i = 0; i < data->in_num; i++) {
4334 if (!(data->have_in & (1 << i)))
4337 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4339 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4343 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
4344 if (!(data->has_fan_min & (1 << i)))
4347 nct6775_write_value(data, data->REG_FAN_MIN[i],
4351 for (i = 0; i < NUM_TEMP; i++) {
4352 if (!(data->have_temp & (1 << i)))
4355 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
4356 if (data->reg_temp[j][i])
4357 nct6775_write_temp(data, data->reg_temp[j][i],
4361 /* Restore other settings */
4362 nct6775_write_value(data, data->REG_VBAT, data->vbat);
4363 if (data->kind == nct6775) {
4364 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4365 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4369 /* Force re-reading all values */
4370 data->valid = false;
4371 mutex_unlock(&data->update_lock);
4376 static SIMPLE_DEV_PM_OPS(nct6775_dev_pm_ops, nct6775_suspend, nct6775_resume);
4378 static struct platform_driver nct6775_driver = {
4380 .owner = THIS_MODULE,
4382 .pm = &nct6775_dev_pm_ops,
4384 .probe = nct6775_probe,
4385 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4386 .remove = nct6775_remove,
4390 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4391 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4397 err = superio_enter(sioaddr);
4401 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8) |
4402 superio_inb(sioaddr, SIO_REG_DEVID + 1);
4403 if (force_id && val != 0xffff)
4406 switch (val & SIO_ID_MASK) {
4407 case SIO_NCT6106_ID:
4408 sio_data->kind = nct6106;
4410 case SIO_NCT6775_ID:
4411 sio_data->kind = nct6775;
4413 case SIO_NCT6776_ID:
4414 sio_data->kind = nct6776;
4416 case SIO_NCT6779_ID:
4417 sio_data->kind = nct6779;
4419 case SIO_NCT6791_ID:
4420 sio_data->kind = nct6791;
4422 case SIO_NCT6792_ID:
4423 sio_data->kind = nct6792;
4425 case SIO_NCT6793_ID:
4426 sio_data->kind = nct6793;
4428 case SIO_NCT6795_ID:
4429 sio_data->kind = nct6795;
4433 pr_debug("unsupported chip ID: 0x%04x\n", val);
4434 superio_exit(sioaddr);
4438 /* We have a known chip, find the HWM I/O address */
4439 superio_select(sioaddr, NCT6775_LD_HWM);
4440 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4441 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4442 addr = val & IOREGION_ALIGNMENT;
4444 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4445 superio_exit(sioaddr);
4449 /* Activate logical device if needed */
4450 val = superio_inb(sioaddr, SIO_REG_ENABLE);
4451 if (!(val & 0x01)) {
4452 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4453 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4456 if (sio_data->kind == nct6791 || sio_data->kind == nct6792 ||
4457 sio_data->kind == nct6793 || sio_data->kind == nct6795)
4458 nct6791_enable_io_mapping(sioaddr);
4460 superio_exit(sioaddr);
4461 pr_info("Found %s or compatible chip at %#x:%#x\n",
4462 nct6775_sio_names[sio_data->kind], sioaddr, addr);
4463 sio_data->sioreg = sioaddr;
4469 * when Super-I/O functions move to a separate file, the Super-I/O
4470 * bus will manage the lifetime of the device and this module will only keep
4471 * track of the nct6775 driver. But since we use platform_device_alloc(), we
4472 * must keep track of the device
4474 static struct platform_device *pdev[2];
4476 static int __init sensors_nct6775_init(void)
4481 struct resource res;
4482 struct nct6775_sio_data sio_data;
4483 int sioaddr[2] = { 0x2e, 0x4e };
4485 err = platform_driver_register(&nct6775_driver);
4490 * initialize sio_data->kind and sio_data->sioreg.
4492 * when Super-I/O functions move to a separate file, the Super-I/O
4493 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4494 * nct6775 hardware monitor, and call probe()
4496 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4497 address = nct6775_find(sioaddr[i], &sio_data);
4503 pdev[i] = platform_device_alloc(DRVNAME, address);
4506 goto exit_device_unregister;
4509 err = platform_device_add_data(pdev[i], &sio_data,
4510 sizeof(struct nct6775_sio_data));
4512 goto exit_device_put;
4514 memset(&res, 0, sizeof(res));
4516 res.start = address + IOREGION_OFFSET;
4517 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4518 res.flags = IORESOURCE_IO;
4520 err = acpi_check_resource_conflict(&res);
4522 platform_device_put(pdev[i]);
4527 err = platform_device_add_resources(pdev[i], &res, 1);
4529 goto exit_device_put;
4531 /* platform_device_add calls probe() */
4532 err = platform_device_add(pdev[i]);
4534 goto exit_device_put;
4538 goto exit_unregister;
4544 platform_device_put(pdev[i]);
4545 exit_device_unregister:
4548 platform_device_unregister(pdev[i]);
4551 platform_driver_unregister(&nct6775_driver);
4555 static void __exit sensors_nct6775_exit(void)
4559 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4561 platform_device_unregister(pdev[i]);
4563 platform_driver_unregister(&nct6775_driver);
4566 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4567 MODULE_DESCRIPTION("Driver for NCT6775F and compatible chips");
4568 MODULE_LICENSE("GPL");
4570 module_init(sensors_nct6775_init);
4571 module_exit(sensors_nct6775_exit);