2 * nct6775 - Driver for the hardware monitoring functionality of
3 * Nuvoton NCT677x Super-I/O chips
5 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net>
7 * Derived from w83627ehf driver
8 * Copyright (C) 2005-2012 Jean Delvare <khali@linux-fr.org>
9 * Copyright (C) 2006 Yuan Mu (Winbond),
10 * Rudolf Marek <r.marek@assembler.cz>
11 * David Hubbard <david.c.hubbard@gmail.com>
12 * Daniel J Blueman <daniel.blueman@gmail.com>
13 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
15 * Shamelessly ripped from the w83627hf driver
16 * Copyright (C) 2003 Mark Studebaker
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
33 * Supports the following chips:
35 * Chip #vin #fan #pwm #temp chip IDs man ID
36 * nct6106d 9 3 3 6+3 0xc450 0xc1 0x5ca3
37 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
38 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
39 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3
40 * nct6791d 15 6 6 2+6 0xc800 0xc1 0x5ca3
42 * #temp lists the number of monitored temperature sources (first value) plus
43 * the number of directly connectable temperature sensors (second value).
46 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
48 #include <linux/module.h>
49 #include <linux/init.h>
50 #include <linux/slab.h>
51 #include <linux/jiffies.h>
52 #include <linux/platform_device.h>
53 #include <linux/hwmon.h>
54 #include <linux/hwmon-sysfs.h>
55 #include <linux/hwmon-vid.h>
56 #include <linux/err.h>
57 #include <linux/mutex.h>
58 #include <linux/acpi.h>
65 enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791 };
67 /* used to set data->name = nct6775_device_names[data->sio_kind] */
68 static const char * const nct6775_device_names[] = {
76 static unsigned short force_id;
77 module_param(force_id, ushort, 0);
78 MODULE_PARM_DESC(force_id, "Override the detected device ID");
80 static unsigned short fan_debounce;
81 module_param(fan_debounce, ushort, 0);
82 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
84 #define DRVNAME "nct6775"
87 * Super-I/O constants and functions
90 #define NCT6775_LD_ACPI 0x0a
91 #define NCT6775_LD_HWM 0x0b
92 #define NCT6775_LD_VID 0x0d
94 #define SIO_REG_LDSEL 0x07 /* Logical device select */
95 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
96 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
97 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
99 #define SIO_NCT6106_ID 0xc450
100 #define SIO_NCT6775_ID 0xb470
101 #define SIO_NCT6776_ID 0xc330
102 #define SIO_NCT6779_ID 0xc560
103 #define SIO_NCT6791_ID 0xc800
104 #define SIO_ID_MASK 0xFFF0
106 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
109 superio_outb(int ioreg, int reg, int val)
112 outb(val, ioreg + 1);
116 superio_inb(int ioreg, int reg)
119 return inb(ioreg + 1);
123 superio_select(int ioreg, int ld)
125 outb(SIO_REG_LDSEL, ioreg);
130 superio_enter(int ioreg)
133 * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
135 if (!request_muxed_region(ioreg, 2, DRVNAME))
145 superio_exit(int ioreg)
149 outb(0x02, ioreg + 1);
150 release_region(ioreg, 2);
157 #define IOREGION_ALIGNMENT (~7)
158 #define IOREGION_OFFSET 5
159 #define IOREGION_LENGTH 2
160 #define ADDR_REG_OFFSET 0
161 #define DATA_REG_OFFSET 1
163 #define NCT6775_REG_BANK 0x4E
164 #define NCT6775_REG_CONFIG 0x40
167 * Not currently used:
168 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
169 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
170 * REG_MAN_ID is at port 0x4f
171 * REG_CHIP_ID is at port 0x58
174 #define NUM_TEMP 10 /* Max number of temp attribute sets w/ limits*/
175 #define NUM_TEMP_FIXED 6 /* Max number of fixed temp attribute sets */
177 #define NUM_REG_ALARM 7 /* Max number of alarm registers */
178 #define NUM_REG_BEEP 5 /* Max number of beep registers */
182 /* Common and NCT6775 specific data */
184 /* Voltage min/max registers for nr=7..14 are in bank 5 */
186 static const u16 NCT6775_REG_IN_MAX[] = {
187 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
188 0x55c, 0x55e, 0x560, 0x562 };
189 static const u16 NCT6775_REG_IN_MIN[] = {
190 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
191 0x55d, 0x55f, 0x561, 0x563 };
192 static const u16 NCT6775_REG_IN[] = {
193 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
196 #define NCT6775_REG_VBAT 0x5D
197 #define NCT6775_REG_DIODE 0x5E
198 #define NCT6775_DIODE_MASK 0x02
200 #define NCT6775_REG_FANDIV1 0x506
201 #define NCT6775_REG_FANDIV2 0x507
203 #define NCT6775_REG_CR_FAN_DEBOUNCE 0xf0
205 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
207 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
209 static const s8 NCT6775_ALARM_BITS[] = {
210 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
211 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
213 6, 7, 11, -1, -1, /* fan1..fan5 */
214 -1, -1, -1, /* unused */
215 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
216 12, -1 }; /* intrusion0, intrusion1 */
218 #define FAN_ALARM_BASE 16
219 #define TEMP_ALARM_BASE 24
220 #define INTRUSION_ALARM_BASE 30
222 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
225 * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
228 static const s8 NCT6775_BEEP_BITS[] = {
229 0, 1, 2, 3, 8, 9, 10, 16, /* in0.. in7 */
230 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
231 21, /* global beep enable */
232 6, 7, 11, 28, -1, /* fan1..fan5 */
233 -1, -1, -1, /* unused */
234 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
235 12, -1 }; /* intrusion0, intrusion1 */
237 #define BEEP_ENABLE_BASE 15
239 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
240 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
242 /* DC or PWM output fan configuration */
243 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
244 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
246 /* Advanced Fan control, some values are common for all fans */
248 static const u16 NCT6775_REG_TARGET[] = {
249 0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
250 static const u16 NCT6775_REG_FAN_MODE[] = {
251 0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
252 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
253 0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
254 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
255 0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
256 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
257 0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
258 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
259 0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
260 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
261 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
263 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
264 0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
265 static const u16 NCT6775_REG_PWM[] = {
266 0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
267 static const u16 NCT6775_REG_PWM_READ[] = {
268 0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
270 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
271 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
272 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
273 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0, 0 };
275 static const u16 NCT6775_REG_TEMP[] = {
276 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
278 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
279 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
280 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
281 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
282 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
283 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
285 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
286 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
288 static const u16 NCT6775_REG_TEMP_SEL[] = {
289 0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
291 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
292 0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
293 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
294 0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
295 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
296 0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
297 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
298 0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
299 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
300 0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
302 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
304 static const u16 NCT6775_REG_AUTO_TEMP[] = {
305 0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
306 static const u16 NCT6775_REG_AUTO_PWM[] = {
307 0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
309 #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p))
310 #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p))
312 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
314 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
315 0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
316 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
317 0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
319 static const char *const nct6775_temp_label[] = {
333 "PCH_CHIP_CPU_MAX_TEMP",
343 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
344 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
346 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
347 = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
350 /* NCT6776 specific data */
352 static const s8 NCT6776_ALARM_BITS[] = {
353 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
354 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
356 6, 7, 11, 10, 23, /* fan1..fan5 */
357 -1, -1, -1, /* unused */
358 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
359 12, 9 }; /* intrusion0, intrusion1 */
361 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
363 static const s8 NCT6776_BEEP_BITS[] = {
364 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */
365 8, -1, -1, -1, -1, -1, -1, /* in8..in14 */
366 24, /* global beep enable */
367 25, 26, 27, 28, 29, /* fan1..fan5 */
368 -1, -1, -1, /* unused */
369 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
370 30, 31 }; /* intrusion0, intrusion1 */
372 static const u16 NCT6776_REG_TOLERANCE_H[] = {
373 0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
375 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
376 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
378 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
379 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
381 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
382 0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
384 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
385 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
387 static const char *const nct6776_temp_label[] = {
402 "PCH_CHIP_CPU_MAX_TEMP",
413 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
414 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
416 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
417 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
419 /* NCT6779 specific data */
421 static const u16 NCT6779_REG_IN[] = {
422 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
423 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
425 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
426 0x459, 0x45A, 0x45B, 0x568 };
428 static const s8 NCT6779_ALARM_BITS[] = {
429 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
430 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
432 6, 7, 11, 10, 23, /* fan1..fan5 */
433 -1, -1, -1, /* unused */
434 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
435 12, 9 }; /* intrusion0, intrusion1 */
437 static const s8 NCT6779_BEEP_BITS[] = {
438 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */
439 8, 9, 10, 11, 12, 13, 14, /* in8..in14 */
440 24, /* global beep enable */
441 25, 26, 27, 28, 29, /* fan1..fan5 */
442 -1, -1, -1, /* unused */
443 16, 17, -1, -1, -1, -1, /* temp1..temp6 */
444 30, 31 }; /* intrusion0, intrusion1 */
446 static const u16 NCT6779_REG_FAN[] = {
447 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
448 static const u16 NCT6779_REG_FAN_PULSES[] = {
449 0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
451 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
452 0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
453 #define NCT6779_CRITICAL_PWM_ENABLE_MASK 0x01
454 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
455 0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
457 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
458 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
460 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
462 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
465 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
466 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
468 static const char *const nct6779_temp_label[] = {
487 "PCH_CHIP_CPU_MAX_TEMP",
498 static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
499 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
500 0, 0, 0, 0, 0, 0, 0, 0,
501 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
504 static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
505 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
507 /* NCT6791 specific data */
509 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE 0x28
511 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
512 0x459, 0x45A, 0x45B, 0x568, 0x45D };
514 static const s8 NCT6791_ALARM_BITS[] = {
515 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
516 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
518 6, 7, 11, 10, 23, 33, /* fan1..fan6 */
520 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
521 12, 9 }; /* intrusion0, intrusion1 */
524 /* NCT6102D/NCT6106D specific data */
526 #define NCT6106_REG_VBAT 0x318
527 #define NCT6106_REG_DIODE 0x319
528 #define NCT6106_DIODE_MASK 0x01
530 static const u16 NCT6106_REG_IN_MAX[] = {
531 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
532 static const u16 NCT6106_REG_IN_MIN[] = {
533 0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
534 static const u16 NCT6106_REG_IN[] = {
535 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
537 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
538 static const u16 NCT6106_REG_TEMP_HYST[] = {
539 0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
540 static const u16 NCT6106_REG_TEMP_OVER[] = {
541 0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
542 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
543 0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
544 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
545 0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
546 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
547 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
548 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
550 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
551 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
552 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
553 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
555 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
556 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
557 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
558 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
559 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
560 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
561 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
562 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
564 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
565 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
566 0x11b, 0x12b, 0x13b };
568 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
569 #define NCT6106_CRITICAL_PWM_ENABLE_MASK 0x10
570 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
572 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
573 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
574 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
575 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
576 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
577 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
579 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
581 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
582 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
583 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
584 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
585 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
586 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
588 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
589 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
591 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
592 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
594 static const s8 NCT6106_ALARM_BITS[] = {
595 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
596 9, -1, -1, -1, -1, -1, -1, /* in8..in14 */
598 32, 33, 34, -1, -1, /* fan1..fan5 */
599 -1, -1, -1, /* unused */
600 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
601 48, -1 /* intrusion0, intrusion1 */
604 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
605 0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
607 static const s8 NCT6106_BEEP_BITS[] = {
608 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
609 9, 10, 11, 12, -1, -1, -1, /* in8..in14 */
610 32, /* global beep enable */
611 24, 25, 26, 27, 28, /* fan1..fan5 */
612 -1, -1, -1, /* unused */
613 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
614 34, -1 /* intrusion0, intrusion1 */
617 static const u16 NCT6106_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
618 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
620 static const u16 NCT6106_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
621 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
623 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
625 if (mode == 0 && pwm == 255)
630 static int pwm_enable_to_reg(enum pwm_enable mode)
641 /* 1 is DC mode, output in ms */
642 static unsigned int step_time_from_reg(u8 reg, u8 mode)
644 return mode ? 400 * reg : 100 * reg;
647 static u8 step_time_to_reg(unsigned int msec, u8 mode)
649 return clamp_val((mode ? (msec + 200) / 400 :
650 (msec + 50) / 100), 1, 255);
653 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
655 if (reg == 0 || reg == 255)
657 return 1350000U / (reg << divreg);
660 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
662 if ((reg & 0xff1f) == 0xff1f)
665 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
670 return 1350000U / reg;
673 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
675 if (reg == 0 || reg == 0xffff)
679 * Even though the registers are 16 bit wide, the fan divisor
682 return 1350000U / (reg << divreg);
685 static u16 fan_to_reg(u32 fan, unsigned int divreg)
690 return (1350000U / fan) >> divreg;
693 static inline unsigned int
700 * Some of the voltage inputs have internal scaling, the tables below
701 * contain 8 (the ADC LSB in mV) * scaling factor * 100
703 static const u16 scale_in[15] = {
704 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
708 static inline long in_from_reg(u8 reg, u8 nr)
710 return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
713 static inline u8 in_to_reg(u32 val, u8 nr)
715 return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
719 * Data structures and manipulation thereof
722 struct nct6775_data {
723 int addr; /* IO base of hw monitor block */
724 int sioreg; /* SIO register address */
728 struct device *hwmon_dev;
729 struct attribute_group *group_in;
730 struct attribute_group *group_fan;
731 struct attribute_group *group_temp;
732 struct attribute_group *group_pwm;
734 u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
735 * 3=temp_crit, 4=temp_lcrit
737 u8 temp_src[NUM_TEMP];
738 u16 reg_temp_config[NUM_TEMP];
739 const char * const *temp_label;
747 const s8 *ALARM_BITS;
751 const u16 *REG_IN_MINMAX[2];
753 const u16 *REG_TARGET;
755 const u16 *REG_FAN_MODE;
756 const u16 *REG_FAN_MIN;
757 const u16 *REG_FAN_PULSES;
758 const u16 *FAN_PULSE_SHIFT;
759 const u16 *REG_FAN_TIME[3];
761 const u16 *REG_TOLERANCE_H;
763 const u8 *REG_PWM_MODE;
764 const u8 *PWM_MODE_MASK;
766 const u16 *REG_PWM[7]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
767 * [3]=pwm_max, [4]=pwm_step,
768 * [5]=weight_duty_step, [6]=weight_duty_base
770 const u16 *REG_PWM_READ;
772 const u16 *REG_CRITICAL_PWM_ENABLE;
773 u8 CRITICAL_PWM_ENABLE_MASK;
774 const u16 *REG_CRITICAL_PWM;
776 const u16 *REG_AUTO_TEMP;
777 const u16 *REG_AUTO_PWM;
779 const u16 *REG_CRITICAL_TEMP;
780 const u16 *REG_CRITICAL_TEMP_TOLERANCE;
782 const u16 *REG_TEMP_SOURCE; /* temp register sources */
783 const u16 *REG_TEMP_SEL;
784 const u16 *REG_WEIGHT_TEMP_SEL;
785 const u16 *REG_WEIGHT_TEMP[3]; /* 0=base, 1=tolerance, 2=step */
787 const u16 *REG_TEMP_OFFSET;
789 const u16 *REG_ALARM;
792 unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
793 unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
795 struct mutex update_lock;
796 bool valid; /* true if following fields are valid */
797 unsigned long last_updated; /* In jiffies */
799 /* Register values */
800 u8 bank; /* current register bank */
801 u8 in_num; /* number of in inputs we have */
802 u8 in[15][3]; /* [0]=in, [1]=in_max, [2]=in_min */
803 unsigned int rpm[NUM_FAN];
804 u16 fan_min[NUM_FAN];
805 u8 fan_pulses[NUM_FAN];
808 u8 has_fan; /* some fan inputs can be disabled */
809 u8 has_fan_min; /* some fans don't have min register */
812 u8 num_temp_alarms; /* 2, 3, or 6 */
813 u8 num_temp_beeps; /* 2, 3, or 6 */
814 u8 temp_fixed_num; /* 3 or 6 */
815 u8 temp_type[NUM_TEMP_FIXED];
816 s8 temp_offset[NUM_TEMP_FIXED];
817 s16 temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
818 * 3=temp_crit, 4=temp_lcrit */
822 u8 pwm_num; /* number of pwm */
823 u8 pwm_mode[NUM_FAN]; /* 1->DC variable voltage,
824 * 0->PWM variable duty cycle
826 enum pwm_enable pwm_enable[NUM_FAN];
829 * 2->thermal cruise mode (also called SmartFan I)
830 * 3->fan speed cruise mode
832 * 5->enhanced variable thermal cruise (SmartFan IV)
834 u8 pwm[7][NUM_FAN]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
835 * [3]=pwm_max, [4]=pwm_step,
836 * [5]=weight_duty_step, [6]=weight_duty_base
839 u8 target_temp[NUM_FAN];
841 u32 target_speed[NUM_FAN];
842 u32 target_speed_tolerance[NUM_FAN];
843 u8 speed_tolerance_limit;
845 u8 temp_tolerance[2][NUM_FAN];
848 u8 fan_time[3][NUM_FAN]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
850 /* Automatic fan speed control registers */
852 u8 auto_pwm[NUM_FAN][7];
853 u8 auto_temp[NUM_FAN][7];
854 u8 pwm_temp_sel[NUM_FAN];
855 u8 pwm_weight_temp_sel[NUM_FAN];
856 u8 weight_temp[3][NUM_FAN]; /* 0->temp_step, 1->temp_step_tol,
869 /* Remember extra register values over suspend/resume */
876 struct nct6775_sio_data {
881 struct sensor_device_template {
882 struct device_attribute dev_attr;
890 bool s2; /* true if both index and nr are used */
893 struct sensor_device_attr_u {
895 struct sensor_device_attribute a1;
896 struct sensor_device_attribute_2 a2;
901 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) { \
902 .attr = {.name = _template, .mode = _mode }, \
907 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
908 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
912 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
914 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
915 .u.s.index = _index, \
919 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
920 static struct sensor_device_template sensor_dev_template_##_name \
921 = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, \
924 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store, \
926 static struct sensor_device_template sensor_dev_template_##_name \
927 = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
930 struct sensor_template_group {
931 struct sensor_device_template **templates;
932 umode_t (*is_visible)(struct kobject *, struct attribute *, int);
936 static struct attribute_group *
937 nct6775_create_attr_group(struct device *dev, struct sensor_template_group *tg,
940 struct attribute_group *group;
941 struct sensor_device_attr_u *su;
942 struct sensor_device_attribute *a;
943 struct sensor_device_attribute_2 *a2;
944 struct attribute **attrs;
945 struct sensor_device_template **t;
946 int err, i, j, count;
949 return ERR_PTR(-EINVAL);
952 for (count = 0; *t; t++, count++)
956 return ERR_PTR(-EINVAL);
958 group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
960 return ERR_PTR(-ENOMEM);
962 attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
965 return ERR_PTR(-ENOMEM);
967 su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
970 return ERR_PTR(-ENOMEM);
972 group->attrs = attrs;
973 group->is_visible = tg->is_visible;
975 for (i = 0; i < repeat; i++) {
977 for (j = 0; *t != NULL; j++) {
978 snprintf(su->name, sizeof(su->name),
979 (*t)->dev_attr.attr.name, tg->base + i);
982 a2->dev_attr.attr.name = su->name;
983 a2->nr = (*t)->u.s.nr + i;
984 a2->index = (*t)->u.s.index;
985 a2->dev_attr.attr.mode =
986 (*t)->dev_attr.attr.mode;
987 a2->dev_attr.show = (*t)->dev_attr.show;
988 a2->dev_attr.store = (*t)->dev_attr.store;
989 *attrs = &a2->dev_attr.attr;
992 a->dev_attr.attr.name = su->name;
993 a->index = (*t)->u.index + i;
994 a->dev_attr.attr.mode =
995 (*t)->dev_attr.attr.mode;
996 a->dev_attr.show = (*t)->dev_attr.show;
997 a->dev_attr.store = (*t)->dev_attr.store;
998 *attrs = &a->dev_attr.attr;
1006 err = sysfs_create_group(&dev->kobj, group);
1008 return ERR_PTR(-ENOMEM);
1013 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1015 switch (data->kind) {
1017 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1018 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1019 reg == 0x111 || reg == 0x121 || reg == 0x131;
1021 return (((reg & 0xff00) == 0x100 ||
1022 (reg & 0xff00) == 0x200) &&
1023 ((reg & 0x00ff) == 0x50 ||
1024 (reg & 0x00ff) == 0x53 ||
1025 (reg & 0x00ff) == 0x55)) ||
1026 (reg & 0xfff0) == 0x630 ||
1027 reg == 0x640 || reg == 0x642 ||
1029 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1030 reg == 0x73 || reg == 0x75 || reg == 0x77;
1032 return (((reg & 0xff00) == 0x100 ||
1033 (reg & 0xff00) == 0x200) &&
1034 ((reg & 0x00ff) == 0x50 ||
1035 (reg & 0x00ff) == 0x53 ||
1036 (reg & 0x00ff) == 0x55)) ||
1037 (reg & 0xfff0) == 0x630 ||
1039 reg == 0x640 || reg == 0x642 ||
1040 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1041 reg == 0x73 || reg == 0x75 || reg == 0x77;
1044 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1045 ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) ||
1047 reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1048 reg == 0x640 || reg == 0x642 ||
1049 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1056 * On older chips, only registers 0x50-0x5f are banked.
1057 * On more recent chips, all registers are banked.
1058 * Assume that is the case and set the bank number for each access.
1059 * Cache the bank number so it only needs to be set if it changes.
1061 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1064 if (data->bank != bank) {
1065 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1066 outb_p(bank, data->addr + DATA_REG_OFFSET);
1071 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1073 int res, word_sized = is_word_sized(data, reg);
1075 nct6775_set_bank(data, reg);
1076 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1077 res = inb_p(data->addr + DATA_REG_OFFSET);
1079 outb_p((reg & 0xff) + 1,
1080 data->addr + ADDR_REG_OFFSET);
1081 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1086 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1088 int word_sized = is_word_sized(data, reg);
1090 nct6775_set_bank(data, reg);
1091 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1093 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1094 outb_p((reg & 0xff) + 1,
1095 data->addr + ADDR_REG_OFFSET);
1097 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1101 /* We left-align 8-bit temperature values to make the code simpler */
1102 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1106 res = nct6775_read_value(data, reg);
1107 if (!is_word_sized(data, reg))
1113 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1115 if (!is_word_sized(data, reg))
1117 return nct6775_write_value(data, reg, value);
1120 /* This function assumes that the caller holds data->update_lock */
1121 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1127 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1128 | (data->fan_div[0] & 0x7);
1129 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1132 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1133 | ((data->fan_div[1] << 4) & 0x70);
1134 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1137 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1138 | (data->fan_div[2] & 0x7);
1139 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1142 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1143 | ((data->fan_div[3] << 4) & 0x70);
1144 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1149 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1151 if (data->kind == nct6775)
1152 nct6775_write_fan_div(data, nr);
1155 static void nct6775_update_fan_div(struct nct6775_data *data)
1159 i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1160 data->fan_div[0] = i & 0x7;
1161 data->fan_div[1] = (i & 0x70) >> 4;
1162 i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1163 data->fan_div[2] = i & 0x7;
1164 if (data->has_fan & (1 << 3))
1165 data->fan_div[3] = (i & 0x70) >> 4;
1168 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1170 if (data->kind == nct6775)
1171 nct6775_update_fan_div(data);
1174 static void nct6775_init_fan_div(struct nct6775_data *data)
1178 nct6775_update_fan_div_common(data);
1180 * For all fans, start with highest divider value if the divider
1181 * register is not initialized. This ensures that we get a
1182 * reading from the fan count register, even if it is not optimal.
1183 * We'll compute a better divider later on.
1185 for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1186 if (!(data->has_fan & (1 << i)))
1188 if (data->fan_div[i] == 0) {
1189 data->fan_div[i] = 7;
1190 nct6775_write_fan_div_common(data, i);
1195 static void nct6775_init_fan_common(struct device *dev,
1196 struct nct6775_data *data)
1201 if (data->has_fan_div)
1202 nct6775_init_fan_div(data);
1205 * If fan_min is not set (0), set it to 0xff to disable it. This
1206 * prevents the unnecessary warning when fanX_min is reported as 0.
1208 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1209 if (data->has_fan_min & (1 << i)) {
1210 reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1212 nct6775_write_value(data, data->REG_FAN_MIN[i],
1213 data->has_fan_div ? 0xff
1219 static void nct6775_select_fan_div(struct device *dev,
1220 struct nct6775_data *data, int nr, u16 reg)
1222 u8 fan_div = data->fan_div[nr];
1225 if (!data->has_fan_div)
1229 * If we failed to measure the fan speed, or the reported value is not
1230 * in the optimal range, and the clock divider can be modified,
1231 * let's try that for next time.
1233 if (reg == 0x00 && fan_div < 0x07)
1235 else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1238 if (fan_div != data->fan_div[nr]) {
1239 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1240 nr + 1, div_from_reg(data->fan_div[nr]),
1241 div_from_reg(fan_div));
1243 /* Preserve min limit if possible */
1244 if (data->has_fan_min & (1 << nr)) {
1245 fan_min = data->fan_min[nr];
1246 if (fan_div > data->fan_div[nr]) {
1247 if (fan_min != 255 && fan_min > 1)
1250 if (fan_min != 255) {
1256 if (fan_min != data->fan_min[nr]) {
1257 data->fan_min[nr] = fan_min;
1258 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1262 data->fan_div[nr] = fan_div;
1263 nct6775_write_fan_div_common(data, nr);
1267 static void nct6775_update_pwm(struct device *dev)
1269 struct nct6775_data *data = dev_get_drvdata(dev);
1271 int fanmodecfg, reg;
1274 for (i = 0; i < data->pwm_num; i++) {
1275 if (!(data->has_pwm & (1 << i)))
1278 duty_is_dc = data->REG_PWM_MODE[i] &&
1279 (nct6775_read_value(data, data->REG_PWM_MODE[i])
1280 & data->PWM_MODE_MASK[i]);
1281 data->pwm_mode[i] = duty_is_dc;
1283 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1284 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1285 if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1287 = nct6775_read_value(data,
1288 data->REG_PWM[j][i]);
1292 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1293 (fanmodecfg >> 4) & 7);
1295 if (!data->temp_tolerance[0][i] ||
1296 data->pwm_enable[i] != speed_cruise)
1297 data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1298 if (!data->target_speed_tolerance[i] ||
1299 data->pwm_enable[i] == speed_cruise) {
1300 u8 t = fanmodecfg & 0x0f;
1301 if (data->REG_TOLERANCE_H) {
1302 t |= (nct6775_read_value(data,
1303 data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1305 data->target_speed_tolerance[i] = t;
1308 data->temp_tolerance[1][i] =
1309 nct6775_read_value(data,
1310 data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1312 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1313 data->pwm_temp_sel[i] = reg & 0x1f;
1314 /* If fan can stop, report floor as 0 */
1316 data->pwm[2][i] = 0;
1318 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1319 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1320 /* If weight is disabled, report weight source as 0 */
1321 if (j == 1 && !(reg & 0x80))
1322 data->pwm_weight_temp_sel[i] = 0;
1324 /* Weight temp data */
1325 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1326 data->weight_temp[j][i]
1327 = nct6775_read_value(data,
1328 data->REG_WEIGHT_TEMP[j][i]);
1333 static void nct6775_update_pwm_limits(struct device *dev)
1335 struct nct6775_data *data = dev_get_drvdata(dev);
1340 for (i = 0; i < data->pwm_num; i++) {
1341 if (!(data->has_pwm & (1 << i)))
1344 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1345 data->fan_time[j][i] =
1346 nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1349 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1350 /* Update only in matching mode or if never updated */
1351 if (!data->target_temp[i] ||
1352 data->pwm_enable[i] == thermal_cruise)
1353 data->target_temp[i] = reg_t & data->target_temp_mask;
1354 if (!data->target_speed[i] ||
1355 data->pwm_enable[i] == speed_cruise) {
1356 if (data->REG_TOLERANCE_H) {
1357 reg_t |= (nct6775_read_value(data,
1358 data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1360 data->target_speed[i] = reg_t;
1363 for (j = 0; j < data->auto_pwm_num; j++) {
1364 data->auto_pwm[i][j] =
1365 nct6775_read_value(data,
1366 NCT6775_AUTO_PWM(data, i, j));
1367 data->auto_temp[i][j] =
1368 nct6775_read_value(data,
1369 NCT6775_AUTO_TEMP(data, i, j));
1372 /* critical auto_pwm temperature data */
1373 data->auto_temp[i][data->auto_pwm_num] =
1374 nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1376 switch (data->kind) {
1378 reg = nct6775_read_value(data,
1379 NCT6775_REG_CRITICAL_ENAB[i]);
1380 data->auto_pwm[i][data->auto_pwm_num] =
1381 (reg & 0x02) ? 0xff : 0x00;
1384 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1389 reg = nct6775_read_value(data,
1390 data->REG_CRITICAL_PWM_ENABLE[i]);
1391 if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1392 reg = nct6775_read_value(data,
1393 data->REG_CRITICAL_PWM[i]);
1396 data->auto_pwm[i][data->auto_pwm_num] = reg;
1402 static struct nct6775_data *nct6775_update_device(struct device *dev)
1404 struct nct6775_data *data = dev_get_drvdata(dev);
1407 mutex_lock(&data->update_lock);
1409 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1411 /* Fan clock dividers */
1412 nct6775_update_fan_div_common(data);
1414 /* Measured voltages and limits */
1415 for (i = 0; i < data->in_num; i++) {
1416 if (!(data->have_in & (1 << i)))
1419 data->in[i][0] = nct6775_read_value(data,
1421 data->in[i][1] = nct6775_read_value(data,
1422 data->REG_IN_MINMAX[0][i]);
1423 data->in[i][2] = nct6775_read_value(data,
1424 data->REG_IN_MINMAX[1][i]);
1427 /* Measured fan speeds and limits */
1428 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1431 if (!(data->has_fan & (1 << i)))
1434 reg = nct6775_read_value(data, data->REG_FAN[i]);
1435 data->rpm[i] = data->fan_from_reg(reg,
1438 if (data->has_fan_min & (1 << i))
1439 data->fan_min[i] = nct6775_read_value(data,
1440 data->REG_FAN_MIN[i]);
1441 data->fan_pulses[i] =
1442 (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1443 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1445 nct6775_select_fan_div(dev, data, i, reg);
1448 nct6775_update_pwm(dev);
1449 nct6775_update_pwm_limits(dev);
1451 /* Measured temperatures and limits */
1452 for (i = 0; i < NUM_TEMP; i++) {
1453 if (!(data->have_temp & (1 << i)))
1455 for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1456 if (data->reg_temp[j][i])
1458 = nct6775_read_temp(data,
1459 data->reg_temp[j][i]);
1461 if (!(data->have_temp_fixed & (1 << i)))
1463 data->temp_offset[i]
1464 = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1468 for (i = 0; i < NUM_REG_ALARM; i++) {
1470 if (!data->REG_ALARM[i])
1472 alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1473 data->alarms |= ((u64)alarm) << (i << 3);
1477 for (i = 0; i < NUM_REG_BEEP; i++) {
1479 if (!data->REG_BEEP[i])
1481 beep = nct6775_read_value(data, data->REG_BEEP[i]);
1482 data->beeps |= ((u64)beep) << (i << 3);
1485 data->last_updated = jiffies;
1489 mutex_unlock(&data->update_lock);
1494 * Sysfs callback functions
1497 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1499 struct nct6775_data *data = nct6775_update_device(dev);
1500 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1502 int index = sattr->index;
1503 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1507 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1510 struct nct6775_data *data = dev_get_drvdata(dev);
1511 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1513 int index = sattr->index;
1515 int err = kstrtoul(buf, 10, &val);
1518 mutex_lock(&data->update_lock);
1519 data->in[nr][index] = in_to_reg(val, nr);
1520 nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1521 data->in[nr][index]);
1522 mutex_unlock(&data->update_lock);
1527 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1529 struct nct6775_data *data = nct6775_update_device(dev);
1530 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1531 int nr = data->ALARM_BITS[sattr->index];
1532 return sprintf(buf, "%u\n",
1533 (unsigned int)((data->alarms >> nr) & 0x01));
1536 static int find_temp_source(struct nct6775_data *data, int index, int count)
1538 int source = data->temp_src[index];
1541 for (nr = 0; nr < count; nr++) {
1544 src = nct6775_read_value(data,
1545 data->REG_TEMP_SOURCE[nr]) & 0x1f;
1553 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1555 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1556 struct nct6775_data *data = nct6775_update_device(dev);
1557 unsigned int alarm = 0;
1561 * For temperatures, there is no fixed mapping from registers to alarm
1562 * bits. Alarm bits are determined by the temperature source mapping.
1564 nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1566 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1567 alarm = (data->alarms >> bit) & 0x01;
1569 return sprintf(buf, "%u\n", alarm);
1573 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1575 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1576 struct nct6775_data *data = nct6775_update_device(dev);
1577 int nr = data->BEEP_BITS[sattr->index];
1579 return sprintf(buf, "%u\n",
1580 (unsigned int)((data->beeps >> nr) & 0x01));
1584 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
1587 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1588 struct nct6775_data *data = dev_get_drvdata(dev);
1589 int nr = data->BEEP_BITS[sattr->index];
1590 int regindex = nr >> 3;
1593 int err = kstrtoul(buf, 10, &val);
1599 mutex_lock(&data->update_lock);
1601 data->beeps |= (1ULL << nr);
1603 data->beeps &= ~(1ULL << nr);
1604 nct6775_write_value(data, data->REG_BEEP[regindex],
1605 (data->beeps >> (regindex << 3)) & 0xff);
1606 mutex_unlock(&data->update_lock);
1611 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1613 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1614 struct nct6775_data *data = nct6775_update_device(dev);
1615 unsigned int beep = 0;
1619 * For temperatures, there is no fixed mapping from registers to beep
1620 * enable bits. Beep enable bits are determined by the temperature
1623 nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1625 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1626 beep = (data->beeps >> bit) & 0x01;
1628 return sprintf(buf, "%u\n", beep);
1632 store_temp_beep(struct device *dev, struct device_attribute *attr,
1633 const char *buf, size_t count)
1635 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1636 struct nct6775_data *data = dev_get_drvdata(dev);
1637 int nr, bit, regindex;
1640 int err = kstrtoul(buf, 10, &val);
1646 nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1650 bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1651 regindex = bit >> 3;
1653 mutex_lock(&data->update_lock);
1655 data->beeps |= (1ULL << bit);
1657 data->beeps &= ~(1ULL << bit);
1658 nct6775_write_value(data, data->REG_BEEP[regindex],
1659 (data->beeps >> (regindex << 3)) & 0xff);
1660 mutex_unlock(&data->update_lock);
1665 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1666 struct attribute *attr, int index)
1668 struct device *dev = container_of(kobj, struct device, kobj);
1669 struct nct6775_data *data = dev_get_drvdata(dev);
1670 int in = index / 5; /* voltage index */
1672 if (!(data->have_in & (1 << in)))
1678 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1679 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1680 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
1682 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1683 store_in_reg, 0, 1);
1684 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1685 store_in_reg, 0, 2);
1688 * nct6775_in_is_visible uses the index into the following array
1689 * to determine if attributes should be created or not.
1690 * Any change in order or content must be matched.
1692 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1693 &sensor_dev_template_in_input,
1694 &sensor_dev_template_in_alarm,
1695 &sensor_dev_template_in_beep,
1696 &sensor_dev_template_in_min,
1697 &sensor_dev_template_in_max,
1701 static struct sensor_template_group nct6775_in_template_group = {
1702 .templates = nct6775_attributes_in_template,
1703 .is_visible = nct6775_in_is_visible,
1707 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1709 struct nct6775_data *data = nct6775_update_device(dev);
1710 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1711 int nr = sattr->index;
1712 return sprintf(buf, "%d\n", data->rpm[nr]);
1716 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1718 struct nct6775_data *data = nct6775_update_device(dev);
1719 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1720 int nr = sattr->index;
1721 return sprintf(buf, "%d\n",
1722 data->fan_from_reg_min(data->fan_min[nr],
1723 data->fan_div[nr]));
1727 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1729 struct nct6775_data *data = nct6775_update_device(dev);
1730 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1731 int nr = sattr->index;
1732 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1736 store_fan_min(struct device *dev, struct device_attribute *attr,
1737 const char *buf, size_t count)
1739 struct nct6775_data *data = dev_get_drvdata(dev);
1740 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1741 int nr = sattr->index;
1747 err = kstrtoul(buf, 10, &val);
1751 mutex_lock(&data->update_lock);
1752 if (!data->has_fan_div) {
1753 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1759 val = 1350000U / val;
1760 val = (val & 0x1f) | ((val << 3) & 0xff00);
1762 data->fan_min[nr] = val;
1763 goto write_min; /* Leave fan divider alone */
1766 /* No min limit, alarm disabled */
1767 data->fan_min[nr] = 255;
1768 new_div = data->fan_div[nr]; /* No change */
1769 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1772 reg = 1350000U / val;
1773 if (reg >= 128 * 255) {
1775 * Speed below this value cannot possibly be represented,
1776 * even with the highest divider (128)
1778 data->fan_min[nr] = 254;
1779 new_div = 7; /* 128 == (1 << 7) */
1781 "fan%u low limit %lu below minimum %u, set to minimum\n",
1782 nr + 1, val, data->fan_from_reg_min(254, 7));
1785 * Speed above this value cannot possibly be represented,
1786 * even with the lowest divider (1)
1788 data->fan_min[nr] = 1;
1789 new_div = 0; /* 1 == (1 << 0) */
1791 "fan%u low limit %lu above maximum %u, set to maximum\n",
1792 nr + 1, val, data->fan_from_reg_min(1, 0));
1795 * Automatically pick the best divider, i.e. the one such
1796 * that the min limit will correspond to a register value
1797 * in the 96..192 range
1800 while (reg > 192 && new_div < 7) {
1804 data->fan_min[nr] = reg;
1809 * Write both the fan clock divider (if it changed) and the new
1810 * fan min (unconditionally)
1812 if (new_div != data->fan_div[nr]) {
1813 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1814 nr + 1, div_from_reg(data->fan_div[nr]),
1815 div_from_reg(new_div));
1816 data->fan_div[nr] = new_div;
1817 nct6775_write_fan_div_common(data, nr);
1818 /* Give the chip time to sample a new speed value */
1819 data->last_updated = jiffies;
1823 nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1824 mutex_unlock(&data->update_lock);
1830 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1832 struct nct6775_data *data = nct6775_update_device(dev);
1833 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1834 int p = data->fan_pulses[sattr->index];
1836 return sprintf(buf, "%d\n", p ? : 4);
1840 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1841 const char *buf, size_t count)
1843 struct nct6775_data *data = dev_get_drvdata(dev);
1844 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1845 int nr = sattr->index;
1850 err = kstrtoul(buf, 10, &val);
1857 mutex_lock(&data->update_lock);
1858 data->fan_pulses[nr] = val & 3;
1859 reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
1860 reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
1861 reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
1862 nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
1863 mutex_unlock(&data->update_lock);
1868 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
1869 struct attribute *attr, int index)
1871 struct device *dev = container_of(kobj, struct device, kobj);
1872 struct nct6775_data *data = dev_get_drvdata(dev);
1873 int fan = index / 6; /* fan index */
1874 int nr = index % 6; /* attribute index */
1876 if (!(data->has_fan & (1 << fan)))
1879 if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
1881 if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
1883 if (nr == 4 && !(data->has_fan_min & (1 << fan)))
1885 if (nr == 5 && data->kind != nct6775)
1891 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
1892 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
1894 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
1895 store_beep, FAN_ALARM_BASE);
1896 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
1897 store_fan_pulses, 0);
1898 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
1900 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
1903 * nct6775_fan_is_visible uses the index into the following array
1904 * to determine if attributes should be created or not.
1905 * Any change in order or content must be matched.
1907 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
1908 &sensor_dev_template_fan_input,
1909 &sensor_dev_template_fan_alarm, /* 1 */
1910 &sensor_dev_template_fan_beep, /* 2 */
1911 &sensor_dev_template_fan_pulses,
1912 &sensor_dev_template_fan_min, /* 4 */
1913 &sensor_dev_template_fan_div, /* 5 */
1917 static struct sensor_template_group nct6775_fan_template_group = {
1918 .templates = nct6775_attributes_fan_template,
1919 .is_visible = nct6775_fan_is_visible,
1924 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1926 struct nct6775_data *data = nct6775_update_device(dev);
1927 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1928 int nr = sattr->index;
1929 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1933 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1935 struct nct6775_data *data = nct6775_update_device(dev);
1936 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1938 int index = sattr->index;
1940 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1944 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1947 struct nct6775_data *data = dev_get_drvdata(dev);
1948 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1950 int index = sattr->index;
1954 err = kstrtol(buf, 10, &val);
1958 mutex_lock(&data->update_lock);
1959 data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1960 nct6775_write_temp(data, data->reg_temp[index][nr],
1961 data->temp[index][nr]);
1962 mutex_unlock(&data->update_lock);
1967 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1969 struct nct6775_data *data = nct6775_update_device(dev);
1970 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1972 return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
1976 store_temp_offset(struct device *dev, struct device_attribute *attr,
1977 const char *buf, size_t count)
1979 struct nct6775_data *data = dev_get_drvdata(dev);
1980 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1981 int nr = sattr->index;
1985 err = kstrtol(buf, 10, &val);
1989 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
1991 mutex_lock(&data->update_lock);
1992 data->temp_offset[nr] = val;
1993 nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
1994 mutex_unlock(&data->update_lock);
2000 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2002 struct nct6775_data *data = nct6775_update_device(dev);
2003 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2004 int nr = sattr->index;
2005 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2009 store_temp_type(struct device *dev, struct device_attribute *attr,
2010 const char *buf, size_t count)
2012 struct nct6775_data *data = nct6775_update_device(dev);
2013 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2014 int nr = sattr->index;
2017 u8 vbat, diode, vbit, dbit;
2019 err = kstrtoul(buf, 10, &val);
2023 if (val != 1 && val != 3 && val != 4)
2026 mutex_lock(&data->update_lock);
2028 data->temp_type[nr] = val;
2030 dbit = data->DIODE_MASK << nr;
2031 vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
2032 diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
2034 case 1: /* CPU diode (diode, current mode) */
2038 case 3: /* diode, voltage mode */
2041 case 4: /* thermistor */
2044 nct6775_write_value(data, data->REG_VBAT, vbat);
2045 nct6775_write_value(data, data->REG_DIODE, diode);
2047 mutex_unlock(&data->update_lock);
2051 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2052 struct attribute *attr, int index)
2054 struct device *dev = container_of(kobj, struct device, kobj);
2055 struct nct6775_data *data = dev_get_drvdata(dev);
2056 int temp = index / 10; /* temp index */
2057 int nr = index % 10; /* attribute index */
2059 if (!(data->have_temp & (1 << temp)))
2062 if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2063 return 0; /* alarm */
2065 if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2066 return 0; /* beep */
2068 if (nr == 4 && !data->reg_temp[1][temp]) /* max */
2071 if (nr == 5 && !data->reg_temp[2][temp]) /* max_hyst */
2074 if (nr == 6 && !data->reg_temp[3][temp]) /* crit */
2077 if (nr == 7 && !data->reg_temp[4][temp]) /* lcrit */
2080 /* offset and type only apply to fixed sensors */
2081 if (nr > 7 && !(data->have_temp_fixed & (1 << temp)))
2087 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2088 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2089 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2091 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2092 show_temp, store_temp, 0, 2);
2093 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2095 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2097 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2098 show_temp_offset, store_temp_offset, 0);
2099 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2100 store_temp_type, 0);
2101 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2102 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2103 store_temp_beep, 0);
2106 * nct6775_temp_is_visible uses the index into the following array
2107 * to determine if attributes should be created or not.
2108 * Any change in order or content must be matched.
2110 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2111 &sensor_dev_template_temp_input,
2112 &sensor_dev_template_temp_label,
2113 &sensor_dev_template_temp_alarm, /* 2 */
2114 &sensor_dev_template_temp_beep, /* 3 */
2115 &sensor_dev_template_temp_max, /* 4 */
2116 &sensor_dev_template_temp_max_hyst, /* 5 */
2117 &sensor_dev_template_temp_crit, /* 6 */
2118 &sensor_dev_template_temp_lcrit, /* 7 */
2119 &sensor_dev_template_temp_offset, /* 8 */
2120 &sensor_dev_template_temp_type, /* 9 */
2124 static struct sensor_template_group nct6775_temp_template_group = {
2125 .templates = nct6775_attributes_temp_template,
2126 .is_visible = nct6775_temp_is_visible,
2131 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2133 struct nct6775_data *data = nct6775_update_device(dev);
2134 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2136 return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
2140 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2141 const char *buf, size_t count)
2143 struct nct6775_data *data = dev_get_drvdata(dev);
2144 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2145 int nr = sattr->index;
2150 err = kstrtoul(buf, 10, &val);
2157 /* Setting DC mode is not supported for all chips/channels */
2158 if (data->REG_PWM_MODE[nr] == 0) {
2164 mutex_lock(&data->update_lock);
2165 data->pwm_mode[nr] = val;
2166 reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2167 reg &= ~data->PWM_MODE_MASK[nr];
2169 reg |= data->PWM_MODE_MASK[nr];
2170 nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2171 mutex_unlock(&data->update_lock);
2176 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2178 struct nct6775_data *data = nct6775_update_device(dev);
2179 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2181 int index = sattr->index;
2185 * For automatic fan control modes, show current pwm readings.
2186 * Otherwise, show the configured value.
2188 if (index == 0 && data->pwm_enable[nr] > manual)
2189 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
2191 pwm = data->pwm[index][nr];
2193 return sprintf(buf, "%d\n", pwm);
2197 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2200 struct nct6775_data *data = dev_get_drvdata(dev);
2201 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2203 int index = sattr->index;
2205 int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2207 = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2211 err = kstrtoul(buf, 10, &val);
2214 val = clamp_val(val, minval[index], maxval[index]);
2216 mutex_lock(&data->update_lock);
2217 data->pwm[index][nr] = val;
2218 nct6775_write_value(data, data->REG_PWM[index][nr], val);
2219 if (index == 2) { /* floor: disable if val == 0 */
2220 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2224 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2226 mutex_unlock(&data->update_lock);
2230 /* Returns 0 if OK, -EINVAL otherwise */
2231 static int check_trip_points(struct nct6775_data *data, int nr)
2235 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2236 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2239 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2240 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2243 /* validate critical temperature and pwm if enabled (pwm > 0) */
2244 if (data->auto_pwm[nr][data->auto_pwm_num]) {
2245 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2246 data->auto_temp[nr][data->auto_pwm_num] ||
2247 data->auto_pwm[nr][data->auto_pwm_num - 1] >
2248 data->auto_pwm[nr][data->auto_pwm_num])
2254 static void pwm_update_registers(struct nct6775_data *data, int nr)
2258 switch (data->pwm_enable[nr]) {
2263 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2264 reg = (reg & ~data->tolerance_mask) |
2265 (data->target_speed_tolerance[nr] & data->tolerance_mask);
2266 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2267 nct6775_write_value(data, data->REG_TARGET[nr],
2268 data->target_speed[nr] & 0xff);
2269 if (data->REG_TOLERANCE_H) {
2270 reg = (data->target_speed[nr] >> 8) & 0x0f;
2271 reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2272 nct6775_write_value(data,
2273 data->REG_TOLERANCE_H[nr],
2277 case thermal_cruise:
2278 nct6775_write_value(data, data->REG_TARGET[nr],
2279 data->target_temp[nr]);
2282 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2283 reg = (reg & ~data->tolerance_mask) |
2284 data->temp_tolerance[0][nr];
2285 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2291 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2293 struct nct6775_data *data = nct6775_update_device(dev);
2294 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2296 return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2300 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2301 const char *buf, size_t count)
2303 struct nct6775_data *data = dev_get_drvdata(dev);
2304 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2305 int nr = sattr->index;
2310 err = kstrtoul(buf, 10, &val);
2317 if (val == sf3 && data->kind != nct6775)
2320 if (val == sf4 && check_trip_points(data, nr)) {
2321 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2322 dev_err(dev, "Adjust trip points and try again\n");
2326 mutex_lock(&data->update_lock);
2327 data->pwm_enable[nr] = val;
2330 * turn off pwm control: select manual mode, set pwm to maximum
2332 data->pwm[0][nr] = 255;
2333 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2335 pwm_update_registers(data, nr);
2336 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2338 reg |= pwm_enable_to_reg(val) << 4;
2339 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2340 mutex_unlock(&data->update_lock);
2345 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2349 for (i = 0; i < NUM_TEMP; i++) {
2350 if (!(data->have_temp & (1 << i)))
2352 if (src == data->temp_src[i]) {
2358 return sprintf(buf, "%d\n", sel);
2362 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2364 struct nct6775_data *data = nct6775_update_device(dev);
2365 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2366 int index = sattr->index;
2368 return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2372 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2373 const char *buf, size_t count)
2375 struct nct6775_data *data = nct6775_update_device(dev);
2376 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2377 int nr = sattr->index;
2381 err = kstrtoul(buf, 10, &val);
2384 if (val == 0 || val > NUM_TEMP)
2386 if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2389 mutex_lock(&data->update_lock);
2390 src = data->temp_src[val - 1];
2391 data->pwm_temp_sel[nr] = src;
2392 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2395 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2396 mutex_unlock(&data->update_lock);
2402 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2405 struct nct6775_data *data = nct6775_update_device(dev);
2406 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2407 int index = sattr->index;
2409 return show_pwm_temp_sel_common(data, buf,
2410 data->pwm_weight_temp_sel[index]);
2414 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2415 const char *buf, size_t count)
2417 struct nct6775_data *data = nct6775_update_device(dev);
2418 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2419 int nr = sattr->index;
2423 err = kstrtoul(buf, 10, &val);
2428 if (val && (!(data->have_temp & (1 << (val - 1))) ||
2429 !data->temp_src[val - 1]))
2432 mutex_lock(&data->update_lock);
2434 src = data->temp_src[val - 1];
2435 data->pwm_weight_temp_sel[nr] = src;
2436 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2438 reg |= (src | 0x80);
2439 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2441 data->pwm_weight_temp_sel[nr] = 0;
2442 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2444 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2446 mutex_unlock(&data->update_lock);
2452 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2454 struct nct6775_data *data = nct6775_update_device(dev);
2455 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2457 return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2461 store_target_temp(struct device *dev, struct device_attribute *attr,
2462 const char *buf, size_t count)
2464 struct nct6775_data *data = dev_get_drvdata(dev);
2465 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2466 int nr = sattr->index;
2470 err = kstrtoul(buf, 10, &val);
2474 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2475 data->target_temp_mask);
2477 mutex_lock(&data->update_lock);
2478 data->target_temp[nr] = val;
2479 pwm_update_registers(data, nr);
2480 mutex_unlock(&data->update_lock);
2485 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2487 struct nct6775_data *data = nct6775_update_device(dev);
2488 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2489 int nr = sattr->index;
2491 return sprintf(buf, "%d\n",
2492 fan_from_reg16(data->target_speed[nr],
2493 data->fan_div[nr]));
2497 store_target_speed(struct device *dev, struct device_attribute *attr,
2498 const char *buf, size_t count)
2500 struct nct6775_data *data = dev_get_drvdata(dev);
2501 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2502 int nr = sattr->index;
2507 err = kstrtoul(buf, 10, &val);
2511 val = clamp_val(val, 0, 1350000U);
2512 speed = fan_to_reg(val, data->fan_div[nr]);
2514 mutex_lock(&data->update_lock);
2515 data->target_speed[nr] = speed;
2516 pwm_update_registers(data, nr);
2517 mutex_unlock(&data->update_lock);
2522 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2525 struct nct6775_data *data = nct6775_update_device(dev);
2526 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2528 int index = sattr->index;
2530 return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2534 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2535 const char *buf, size_t count)
2537 struct nct6775_data *data = dev_get_drvdata(dev);
2538 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2540 int index = sattr->index;
2544 err = kstrtoul(buf, 10, &val);
2548 /* Limit tolerance as needed */
2549 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2551 mutex_lock(&data->update_lock);
2552 data->temp_tolerance[index][nr] = val;
2554 pwm_update_registers(data, nr);
2556 nct6775_write_value(data,
2557 data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2559 mutex_unlock(&data->update_lock);
2564 * Fan speed tolerance is a tricky beast, since the associated register is
2565 * a tick counter, but the value is reported and configured as rpm.
2566 * Compute resulting low and high rpm values and report the difference.
2569 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2572 struct nct6775_data *data = nct6775_update_device(dev);
2573 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2574 int nr = sattr->index;
2575 int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2576 int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2586 tolerance = (fan_from_reg16(low, data->fan_div[nr])
2587 - fan_from_reg16(high, data->fan_div[nr])) / 2;
2589 return sprintf(buf, "%d\n", tolerance);
2593 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2594 const char *buf, size_t count)
2596 struct nct6775_data *data = dev_get_drvdata(dev);
2597 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2598 int nr = sattr->index;
2603 err = kstrtoul(buf, 10, &val);
2607 high = fan_from_reg16(data->target_speed[nr],
2608 data->fan_div[nr]) + val;
2609 low = fan_from_reg16(data->target_speed[nr],
2610 data->fan_div[nr]) - val;
2616 val = (fan_to_reg(low, data->fan_div[nr]) -
2617 fan_to_reg(high, data->fan_div[nr])) / 2;
2619 /* Limit tolerance as needed */
2620 val = clamp_val(val, 0, data->speed_tolerance_limit);
2622 mutex_lock(&data->update_lock);
2623 data->target_speed_tolerance[nr] = val;
2624 pwm_update_registers(data, nr);
2625 mutex_unlock(&data->update_lock);
2629 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2630 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2632 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2633 store_pwm_enable, 0);
2634 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2635 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2636 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2637 show_target_temp, store_target_temp, 0);
2638 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2639 show_target_speed, store_target_speed, 0);
2640 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2641 show_speed_tolerance, store_speed_tolerance, 0);
2643 /* Smart Fan registers */
2646 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2648 struct nct6775_data *data = nct6775_update_device(dev);
2649 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2651 int index = sattr->index;
2653 return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2657 store_weight_temp(struct device *dev, struct device_attribute *attr,
2658 const char *buf, size_t count)
2660 struct nct6775_data *data = dev_get_drvdata(dev);
2661 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2663 int index = sattr->index;
2667 err = kstrtoul(buf, 10, &val);
2671 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2673 mutex_lock(&data->update_lock);
2674 data->weight_temp[index][nr] = val;
2675 nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2676 mutex_unlock(&data->update_lock);
2680 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2681 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2682 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2683 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2684 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2685 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2686 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2687 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2688 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2689 S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2690 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2691 S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2694 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2696 struct nct6775_data *data = nct6775_update_device(dev);
2697 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2699 int index = sattr->index;
2701 return sprintf(buf, "%d\n",
2702 step_time_from_reg(data->fan_time[index][nr],
2703 data->pwm_mode[nr]));
2707 store_fan_time(struct device *dev, struct device_attribute *attr,
2708 const char *buf, size_t count)
2710 struct nct6775_data *data = dev_get_drvdata(dev);
2711 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2713 int index = sattr->index;
2717 err = kstrtoul(buf, 10, &val);
2721 val = step_time_to_reg(val, data->pwm_mode[nr]);
2722 mutex_lock(&data->update_lock);
2723 data->fan_time[index][nr] = val;
2724 nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2725 mutex_unlock(&data->update_lock);
2730 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2732 struct nct6775_data *data = dev_get_drvdata(dev);
2734 return sprintf(buf, "%s\n", data->name);
2737 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2740 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2742 struct nct6775_data *data = nct6775_update_device(dev);
2743 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2745 return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2749 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2750 const char *buf, size_t count)
2752 struct nct6775_data *data = dev_get_drvdata(dev);
2753 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2755 int point = sattr->index;
2760 err = kstrtoul(buf, 10, &val);
2766 if (point == data->auto_pwm_num) {
2767 if (data->kind != nct6775 && !val)
2769 if (data->kind != nct6779 && val)
2773 mutex_lock(&data->update_lock);
2774 data->auto_pwm[nr][point] = val;
2775 if (point < data->auto_pwm_num) {
2776 nct6775_write_value(data,
2777 NCT6775_AUTO_PWM(data, nr, point),
2778 data->auto_pwm[nr][point]);
2780 switch (data->kind) {
2782 /* disable if needed (pwm == 0) */
2783 reg = nct6775_read_value(data,
2784 NCT6775_REG_CRITICAL_ENAB[nr]);
2789 nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2793 break; /* always enabled, nothing to do */
2797 nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2799 reg = nct6775_read_value(data,
2800 data->REG_CRITICAL_PWM_ENABLE[nr]);
2802 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
2804 reg |= data->CRITICAL_PWM_ENABLE_MASK;
2805 nct6775_write_value(data,
2806 data->REG_CRITICAL_PWM_ENABLE[nr],
2811 mutex_unlock(&data->update_lock);
2816 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2818 struct nct6775_data *data = nct6775_update_device(dev);
2819 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2821 int point = sattr->index;
2824 * We don't know for sure if the temperature is signed or unsigned.
2825 * Assume it is unsigned.
2827 return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2831 store_auto_temp(struct device *dev, struct device_attribute *attr,
2832 const char *buf, size_t count)
2834 struct nct6775_data *data = dev_get_drvdata(dev);
2835 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2837 int point = sattr->index;
2841 err = kstrtoul(buf, 10, &val);
2847 mutex_lock(&data->update_lock);
2848 data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2849 if (point < data->auto_pwm_num) {
2850 nct6775_write_value(data,
2851 NCT6775_AUTO_TEMP(data, nr, point),
2852 data->auto_temp[nr][point]);
2854 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2855 data->auto_temp[nr][point]);
2857 mutex_unlock(&data->update_lock);
2861 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
2862 struct attribute *attr, int index)
2864 struct device *dev = container_of(kobj, struct device, kobj);
2865 struct nct6775_data *data = dev_get_drvdata(dev);
2866 int pwm = index / 36; /* pwm index */
2867 int nr = index % 36; /* attribute index */
2869 if (!(data->has_pwm & (1 << pwm)))
2872 if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
2874 if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
2876 if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
2879 if (nr >= 22 && nr <= 35) { /* auto point */
2880 int api = (nr - 22) / 2; /* auto point index */
2882 if (api > data->auto_pwm_num)
2888 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
2889 show_fan_time, store_fan_time, 0, 0);
2890 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
2891 show_fan_time, store_fan_time, 0, 1);
2892 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
2893 show_fan_time, store_fan_time, 0, 2);
2894 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
2896 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
2898 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
2899 show_temp_tolerance, store_temp_tolerance, 0, 0);
2900 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
2901 S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
2904 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2907 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
2910 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
2911 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
2912 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
2913 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
2915 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
2916 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
2917 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
2918 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
2920 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
2921 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
2922 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
2923 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
2925 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
2926 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
2927 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
2928 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
2930 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
2931 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
2932 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
2933 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
2935 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
2936 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
2937 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
2938 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
2940 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
2941 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
2942 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
2943 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
2946 * nct6775_pwm_is_visible uses the index into the following array
2947 * to determine if attributes should be created or not.
2948 * Any change in order or content must be matched.
2950 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
2951 &sensor_dev_template_pwm,
2952 &sensor_dev_template_pwm_mode,
2953 &sensor_dev_template_pwm_enable,
2954 &sensor_dev_template_pwm_temp_sel,
2955 &sensor_dev_template_pwm_temp_tolerance,
2956 &sensor_dev_template_pwm_crit_temp_tolerance,
2957 &sensor_dev_template_pwm_target_temp,
2958 &sensor_dev_template_fan_target,
2959 &sensor_dev_template_fan_tolerance,
2960 &sensor_dev_template_pwm_stop_time,
2961 &sensor_dev_template_pwm_step_up_time,
2962 &sensor_dev_template_pwm_step_down_time,
2963 &sensor_dev_template_pwm_start,
2964 &sensor_dev_template_pwm_floor,
2965 &sensor_dev_template_pwm_weight_temp_sel,
2966 &sensor_dev_template_pwm_weight_temp_step,
2967 &sensor_dev_template_pwm_weight_temp_step_tol,
2968 &sensor_dev_template_pwm_weight_temp_step_base,
2969 &sensor_dev_template_pwm_weight_duty_step,
2970 &sensor_dev_template_pwm_max, /* 19 */
2971 &sensor_dev_template_pwm_step, /* 20 */
2972 &sensor_dev_template_pwm_weight_duty_base, /* 21 */
2973 &sensor_dev_template_pwm_auto_point1_pwm, /* 22 */
2974 &sensor_dev_template_pwm_auto_point1_temp,
2975 &sensor_dev_template_pwm_auto_point2_pwm,
2976 &sensor_dev_template_pwm_auto_point2_temp,
2977 &sensor_dev_template_pwm_auto_point3_pwm,
2978 &sensor_dev_template_pwm_auto_point3_temp,
2979 &sensor_dev_template_pwm_auto_point4_pwm,
2980 &sensor_dev_template_pwm_auto_point4_temp,
2981 &sensor_dev_template_pwm_auto_point5_pwm,
2982 &sensor_dev_template_pwm_auto_point5_temp,
2983 &sensor_dev_template_pwm_auto_point6_pwm,
2984 &sensor_dev_template_pwm_auto_point6_temp,
2985 &sensor_dev_template_pwm_auto_point7_pwm,
2986 &sensor_dev_template_pwm_auto_point7_temp, /* 35 */
2991 static struct sensor_template_group nct6775_pwm_template_group = {
2992 .templates = nct6775_attributes_pwm_template,
2993 .is_visible = nct6775_pwm_is_visible,
2998 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3000 struct nct6775_data *data = dev_get_drvdata(dev);
3001 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3004 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3006 /* Case open detection */
3009 clear_caseopen(struct device *dev, struct device_attribute *attr,
3010 const char *buf, size_t count)
3012 struct nct6775_data *data = dev_get_drvdata(dev);
3013 int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3018 if (kstrtoul(buf, 10, &val) || val != 0)
3021 mutex_lock(&data->update_lock);
3024 * Use CR registers to clear caseopen status.
3025 * The CR registers are the same for all chips, and not all chips
3026 * support clearing the caseopen status through "regular" registers.
3028 ret = superio_enter(data->sioreg);
3034 superio_select(data->sioreg, NCT6775_LD_ACPI);
3035 reg = superio_inb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3036 reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3037 superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3038 reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3039 superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3040 superio_exit(data->sioreg);
3042 data->valid = false; /* Force cache refresh */
3044 mutex_unlock(&data->update_lock);
3048 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3049 clear_caseopen, INTRUSION_ALARM_BASE);
3050 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3051 clear_caseopen, INTRUSION_ALARM_BASE + 1);
3052 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3053 store_beep, INTRUSION_ALARM_BASE);
3054 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3055 store_beep, INTRUSION_ALARM_BASE + 1);
3056 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3057 store_beep, BEEP_ENABLE_BASE);
3059 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3060 struct attribute *attr, int index)
3062 struct device *dev = container_of(kobj, struct device, kobj);
3063 struct nct6775_data *data = dev_get_drvdata(dev);
3065 if (index == 1 && !data->have_vid)
3068 if (index == 2 || index == 3) {
3069 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 2] < 0)
3073 if (index == 4 || index == 5) {
3074 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 4] < 0)
3082 * nct6775_other_is_visible uses the index into the following array
3083 * to determine if attributes should be created or not.
3084 * Any change in order or content must be matched.
3086 static struct attribute *nct6775_attributes_other[] = {
3087 &dev_attr_name.attr,
3088 &dev_attr_cpu0_vid.attr, /* 1 */
3089 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr, /* 2 */
3090 &sensor_dev_attr_intrusion1_alarm.dev_attr.attr, /* 3 */
3091 &sensor_dev_attr_intrusion0_beep.dev_attr.attr, /* 4 */
3092 &sensor_dev_attr_intrusion1_beep.dev_attr.attr, /* 5 */
3093 &sensor_dev_attr_beep_enable.dev_attr.attr, /* 6 */
3098 static const struct attribute_group nct6775_group_other = {
3099 .attrs = nct6775_attributes_other,
3100 .is_visible = nct6775_other_is_visible,
3104 * Driver and device management
3107 static void nct6775_device_remove_files(struct device *dev)
3109 struct nct6775_data *data = dev_get_drvdata(dev);
3111 if (data->group_pwm)
3112 sysfs_remove_group(&dev->kobj, data->group_pwm);
3114 sysfs_remove_group(&dev->kobj, data->group_in);
3115 if (data->group_fan)
3116 sysfs_remove_group(&dev->kobj, data->group_fan);
3117 if (data->group_temp)
3118 sysfs_remove_group(&dev->kobj, data->group_temp);
3120 sysfs_remove_group(&dev->kobj, &nct6775_group_other);
3123 /* Get the monitoring functions started */
3124 static inline void nct6775_init_device(struct nct6775_data *data)
3129 /* Start monitoring if needed */
3130 if (data->REG_CONFIG) {
3131 tmp = nct6775_read_value(data, data->REG_CONFIG);
3133 nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3136 /* Enable temperature sensors if needed */
3137 for (i = 0; i < NUM_TEMP; i++) {
3138 if (!(data->have_temp & (1 << i)))
3140 if (!data->reg_temp_config[i])
3142 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3144 nct6775_write_value(data, data->reg_temp_config[i],
3148 /* Enable VBAT monitoring if needed */
3149 tmp = nct6775_read_value(data, data->REG_VBAT);
3151 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3153 diode = nct6775_read_value(data, data->REG_DIODE);
3155 for (i = 0; i < data->temp_fixed_num; i++) {
3156 if (!(data->have_temp_fixed & (1 << i)))
3158 if ((tmp & (data->DIODE_MASK << i))) /* diode */
3160 = 3 - ((diode >> i) & data->DIODE_MASK);
3161 else /* thermistor */
3162 data->temp_type[i] = 4;
3167 nct6775_check_fan_inputs(struct nct6775_data *data)
3169 bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin;
3170 bool pwm3pin, pwm4pin, pwm5pin, pwm6pin;
3171 int sioreg = data->sioreg;
3174 /* fan4 and fan5 share some pins with the GPIO and serial flash */
3175 if (data->kind == nct6775) {
3176 regval = superio_inb(sioreg, 0x2c);
3178 fan3pin = regval & (1 << 6);
3179 pwm3pin = regval & (1 << 7);
3181 /* On NCT6775, fan4 shares pins with the fdc interface */
3182 fan4pin = !(superio_inb(sioreg, 0x2A) & 0x80);
3189 } else if (data->kind == nct6776) {
3190 bool gpok = superio_inb(sioreg, 0x27) & 0x80;
3192 superio_select(sioreg, NCT6775_LD_HWM);
3193 regval = superio_inb(sioreg, SIO_REG_ENABLE);
3198 fan3pin = !(superio_inb(sioreg, 0x24) & 0x40);
3203 fan4pin = superio_inb(sioreg, 0x1C) & 0x01;
3208 fan5pin = superio_inb(sioreg, 0x1C) & 0x02;
3216 } else if (data->kind == nct6106) {
3217 regval = superio_inb(sioreg, 0x24);
3218 fan3pin = !(regval & 0x80);
3219 pwm3pin = regval & 0x08;
3228 } else { /* NCT6779D or NCT6791D */
3229 regval = superio_inb(sioreg, 0x1c);
3231 fan3pin = !(regval & (1 << 5));
3232 fan4pin = !(regval & (1 << 6));
3233 fan5pin = !(regval & (1 << 7));
3235 pwm3pin = !(regval & (1 << 0));
3236 pwm4pin = !(regval & (1 << 1));
3237 pwm5pin = !(regval & (1 << 2));
3241 if (data->kind == nct6791) {
3242 regval = superio_inb(sioreg, 0x2d);
3243 fan6pin = (regval & (1 << 1));
3244 pwm6pin = (regval & (1 << 0));
3245 } else { /* NCT6779D */
3251 /* fan 1 and 2 (0x03) are always present */
3252 data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
3253 (fan5pin << 4) | (fan6pin << 5);
3254 data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
3256 data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
3257 (pwm5pin << 4) | (pwm6pin << 5);
3260 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3261 int *available, int *mask)
3266 for (i = 0; i < data->pwm_num && *available; i++) {
3271 src = nct6775_read_value(data, regp[i]);
3273 if (!src || (*mask & (1 << src)))
3275 if (src >= data->temp_label_num ||
3276 !strlen(data->temp_label[src]))
3279 index = __ffs(*available);
3280 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3281 *available &= ~(1 << index);
3286 static int nct6775_probe(struct platform_device *pdev)
3288 struct device *dev = &pdev->dev;
3289 struct nct6775_sio_data *sio_data = dev->platform_data;
3290 struct nct6775_data *data;
3291 struct resource *res;
3293 int src, mask, available;
3294 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3295 const u16 *reg_temp_alternate, *reg_temp_crit;
3296 const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3299 struct attribute_group *group;
3301 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3302 if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3306 data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3311 data->kind = sio_data->kind;
3312 data->sioreg = sio_data->sioreg;
3313 data->addr = res->start;
3314 mutex_init(&data->update_lock);
3315 data->name = nct6775_device_names[data->kind];
3316 data->bank = 0xff; /* Force initial bank selection */
3317 platform_set_drvdata(pdev, data);
3319 switch (data->kind) {
3323 data->auto_pwm_num = 4;
3324 data->temp_fixed_num = 3;
3325 data->num_temp_alarms = 6;
3326 data->num_temp_beeps = 6;
3328 data->fan_from_reg = fan_from_reg13;
3329 data->fan_from_reg_min = fan_from_reg13;
3331 data->temp_label = nct6776_temp_label;
3332 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3334 data->REG_VBAT = NCT6106_REG_VBAT;
3335 data->REG_DIODE = NCT6106_REG_DIODE;
3336 data->DIODE_MASK = NCT6106_DIODE_MASK;
3337 data->REG_VIN = NCT6106_REG_IN;
3338 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3339 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3340 data->REG_TARGET = NCT6106_REG_TARGET;
3341 data->REG_FAN = NCT6106_REG_FAN;
3342 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3343 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3344 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3345 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3346 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3347 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3348 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3349 data->REG_PWM[0] = NCT6106_REG_PWM;
3350 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3351 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3352 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3353 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3354 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3355 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3356 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3357 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3358 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3359 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3360 data->REG_CRITICAL_TEMP_TOLERANCE
3361 = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3362 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3363 data->CRITICAL_PWM_ENABLE_MASK
3364 = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3365 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3366 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3367 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3368 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3369 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3370 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3371 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3372 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3373 data->REG_ALARM = NCT6106_REG_ALARM;
3374 data->ALARM_BITS = NCT6106_ALARM_BITS;
3375 data->REG_BEEP = NCT6106_REG_BEEP;
3376 data->BEEP_BITS = NCT6106_BEEP_BITS;
3378 reg_temp = NCT6106_REG_TEMP;
3379 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3380 reg_temp_over = NCT6106_REG_TEMP_OVER;
3381 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3382 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3383 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3384 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3385 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3386 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3392 data->auto_pwm_num = 6;
3393 data->has_fan_div = true;
3394 data->temp_fixed_num = 3;
3395 data->num_temp_alarms = 3;
3396 data->num_temp_beeps = 3;
3398 data->ALARM_BITS = NCT6775_ALARM_BITS;
3399 data->BEEP_BITS = NCT6775_BEEP_BITS;
3401 data->fan_from_reg = fan_from_reg16;
3402 data->fan_from_reg_min = fan_from_reg8;
3403 data->target_temp_mask = 0x7f;
3404 data->tolerance_mask = 0x0f;
3405 data->speed_tolerance_limit = 15;
3407 data->temp_label = nct6775_temp_label;
3408 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3410 data->REG_CONFIG = NCT6775_REG_CONFIG;
3411 data->REG_VBAT = NCT6775_REG_VBAT;
3412 data->REG_DIODE = NCT6775_REG_DIODE;
3413 data->DIODE_MASK = NCT6775_DIODE_MASK;
3414 data->REG_VIN = NCT6775_REG_IN;
3415 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3416 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3417 data->REG_TARGET = NCT6775_REG_TARGET;
3418 data->REG_FAN = NCT6775_REG_FAN;
3419 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3420 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3421 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3422 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3423 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3424 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3425 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3426 data->REG_PWM[0] = NCT6775_REG_PWM;
3427 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3428 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3429 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3430 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3431 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3432 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3433 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3434 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3435 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3436 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3437 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3438 data->REG_CRITICAL_TEMP_TOLERANCE
3439 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3440 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3441 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3442 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3443 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3444 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3445 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3446 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3447 data->REG_ALARM = NCT6775_REG_ALARM;
3448 data->REG_BEEP = NCT6775_REG_BEEP;
3450 reg_temp = NCT6775_REG_TEMP;
3451 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3452 reg_temp_over = NCT6775_REG_TEMP_OVER;
3453 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3454 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3455 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3456 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3462 data->auto_pwm_num = 4;
3463 data->has_fan_div = false;
3464 data->temp_fixed_num = 3;
3465 data->num_temp_alarms = 3;
3466 data->num_temp_beeps = 6;
3468 data->ALARM_BITS = NCT6776_ALARM_BITS;
3469 data->BEEP_BITS = NCT6776_BEEP_BITS;
3471 data->fan_from_reg = fan_from_reg13;
3472 data->fan_from_reg_min = fan_from_reg13;
3473 data->target_temp_mask = 0xff;
3474 data->tolerance_mask = 0x07;
3475 data->speed_tolerance_limit = 63;
3477 data->temp_label = nct6776_temp_label;
3478 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3480 data->REG_CONFIG = NCT6775_REG_CONFIG;
3481 data->REG_VBAT = NCT6775_REG_VBAT;
3482 data->REG_DIODE = NCT6775_REG_DIODE;
3483 data->DIODE_MASK = NCT6775_DIODE_MASK;
3484 data->REG_VIN = NCT6775_REG_IN;
3485 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3486 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3487 data->REG_TARGET = NCT6775_REG_TARGET;
3488 data->REG_FAN = NCT6775_REG_FAN;
3489 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3490 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3491 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3492 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3493 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3494 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3495 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3496 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3497 data->REG_PWM[0] = NCT6775_REG_PWM;
3498 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3499 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3500 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3501 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3502 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3503 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3504 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3505 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3506 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3507 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3508 data->REG_CRITICAL_TEMP_TOLERANCE
3509 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3510 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3511 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3512 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3513 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3514 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3515 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3516 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3517 data->REG_ALARM = NCT6775_REG_ALARM;
3518 data->REG_BEEP = NCT6776_REG_BEEP;
3520 reg_temp = NCT6775_REG_TEMP;
3521 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3522 reg_temp_over = NCT6775_REG_TEMP_OVER;
3523 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3524 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3525 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3526 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3532 data->auto_pwm_num = 4;
3533 data->has_fan_div = false;
3534 data->temp_fixed_num = 6;
3535 data->num_temp_alarms = 2;
3536 data->num_temp_beeps = 2;
3538 data->ALARM_BITS = NCT6779_ALARM_BITS;
3539 data->BEEP_BITS = NCT6779_BEEP_BITS;
3541 data->fan_from_reg = fan_from_reg13;
3542 data->fan_from_reg_min = fan_from_reg13;
3543 data->target_temp_mask = 0xff;
3544 data->tolerance_mask = 0x07;
3545 data->speed_tolerance_limit = 63;
3547 data->temp_label = nct6779_temp_label;
3548 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3550 data->REG_CONFIG = NCT6775_REG_CONFIG;
3551 data->REG_VBAT = NCT6775_REG_VBAT;
3552 data->REG_DIODE = NCT6775_REG_DIODE;
3553 data->DIODE_MASK = NCT6775_DIODE_MASK;
3554 data->REG_VIN = NCT6779_REG_IN;
3555 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3556 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3557 data->REG_TARGET = NCT6775_REG_TARGET;
3558 data->REG_FAN = NCT6779_REG_FAN;
3559 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3560 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3561 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3562 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3563 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3564 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3565 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3566 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3567 data->REG_PWM[0] = NCT6775_REG_PWM;
3568 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3569 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3570 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3571 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3572 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3573 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3574 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3575 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3576 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3577 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3578 data->REG_CRITICAL_TEMP_TOLERANCE
3579 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3580 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3581 data->CRITICAL_PWM_ENABLE_MASK
3582 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3583 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3584 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3585 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3586 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3587 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3588 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3589 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3590 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3591 data->REG_ALARM = NCT6779_REG_ALARM;
3592 data->REG_BEEP = NCT6776_REG_BEEP;
3594 reg_temp = NCT6779_REG_TEMP;
3595 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3596 reg_temp_over = NCT6779_REG_TEMP_OVER;
3597 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3598 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3599 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3600 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3606 data->auto_pwm_num = 4;
3607 data->has_fan_div = false;
3608 data->temp_fixed_num = 6;
3609 data->num_temp_alarms = 2;
3610 data->num_temp_beeps = 2;
3612 data->ALARM_BITS = NCT6791_ALARM_BITS;
3613 data->BEEP_BITS = NCT6779_BEEP_BITS;
3615 data->fan_from_reg = fan_from_reg13;
3616 data->fan_from_reg_min = fan_from_reg13;
3617 data->target_temp_mask = 0xff;
3618 data->tolerance_mask = 0x07;
3619 data->speed_tolerance_limit = 63;
3621 data->temp_label = nct6779_temp_label;
3622 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3624 data->REG_CONFIG = NCT6775_REG_CONFIG;
3625 data->REG_VBAT = NCT6775_REG_VBAT;
3626 data->REG_DIODE = NCT6775_REG_DIODE;
3627 data->DIODE_MASK = NCT6775_DIODE_MASK;
3628 data->REG_VIN = NCT6779_REG_IN;
3629 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3630 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3631 data->REG_TARGET = NCT6775_REG_TARGET;
3632 data->REG_FAN = NCT6779_REG_FAN;
3633 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3634 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3635 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3636 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3637 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3638 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3639 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3640 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3641 data->REG_PWM[0] = NCT6775_REG_PWM;
3642 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3643 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3644 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3645 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3646 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3647 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3648 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3649 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3650 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3651 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3652 data->REG_CRITICAL_TEMP_TOLERANCE
3653 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3654 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3655 data->CRITICAL_PWM_ENABLE_MASK
3656 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3657 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3658 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3659 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3660 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3661 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3662 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3663 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3664 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3665 data->REG_ALARM = NCT6791_REG_ALARM;
3666 data->REG_BEEP = NCT6776_REG_BEEP;
3668 reg_temp = NCT6779_REG_TEMP;
3669 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3670 reg_temp_over = NCT6779_REG_TEMP_OVER;
3671 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3672 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3673 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3674 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3680 data->have_in = (1 << data->in_num) - 1;
3681 data->have_temp = 0;
3684 * On some boards, not all available temperature sources are monitored,
3685 * even though some of the monitoring registers are unused.
3686 * Get list of unused monitoring registers, then detect if any fan
3687 * controls are configured to use unmonitored temperature sources.
3688 * If so, assign the unmonitored temperature sources to available
3689 * monitoring registers.
3693 for (i = 0; i < num_reg_temp; i++) {
3694 if (reg_temp[i] == 0)
3697 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3698 if (!src || (mask & (1 << src)))
3699 available |= 1 << i;
3705 * Now find unmonitored temperature registers and enable monitoring
3706 * if additional monitoring registers are available.
3708 add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3709 add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3712 s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */
3713 for (i = 0; i < num_reg_temp; i++) {
3714 if (reg_temp[i] == 0)
3717 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3718 if (!src || (mask & (1 << src)))
3721 if (src >= data->temp_label_num ||
3722 !strlen(data->temp_label[src])) {
3724 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3725 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3731 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3732 if (src <= data->temp_fixed_num) {
3733 data->have_temp |= 1 << (src - 1);
3734 data->have_temp_fixed |= 1 << (src - 1);
3735 data->reg_temp[0][src - 1] = reg_temp[i];
3736 data->reg_temp[1][src - 1] = reg_temp_over[i];
3737 data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3738 if (reg_temp_crit_h && reg_temp_crit_h[i])
3739 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
3740 else if (reg_temp_crit[src - 1])
3741 data->reg_temp[3][src - 1]
3742 = reg_temp_crit[src - 1];
3743 if (reg_temp_crit_l && reg_temp_crit_l[i])
3744 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
3745 data->reg_temp_config[src - 1] = reg_temp_config[i];
3746 data->temp_src[src - 1] = src;
3753 /* Use dynamic index for other sources */
3754 data->have_temp |= 1 << s;
3755 data->reg_temp[0][s] = reg_temp[i];
3756 data->reg_temp[1][s] = reg_temp_over[i];
3757 data->reg_temp[2][s] = reg_temp_hyst[i];
3758 data->reg_temp_config[s] = reg_temp_config[i];
3759 if (reg_temp_crit_h && reg_temp_crit_h[i])
3760 data->reg_temp[3][s] = reg_temp_crit_h[i];
3761 else if (reg_temp_crit[src - 1])
3762 data->reg_temp[3][s] = reg_temp_crit[src - 1];
3763 if (reg_temp_crit_l && reg_temp_crit_l[i])
3764 data->reg_temp[4][s] = reg_temp_crit_l[i];
3766 data->temp_src[s] = src;
3770 #ifdef USE_ALTERNATE
3772 * Go through the list of alternate temp registers and enable
3774 * The temperature is already monitored if the respective bit in <mask>
3777 for (i = 0; i < data->temp_label_num - 1; i++) {
3778 if (!reg_temp_alternate[i])
3780 if (mask & (1 << (i + 1)))
3782 if (i < data->temp_fixed_num) {
3783 if (data->have_temp & (1 << i))
3785 data->have_temp |= 1 << i;
3786 data->have_temp_fixed |= 1 << i;
3787 data->reg_temp[0][i] = reg_temp_alternate[i];
3788 if (i < num_reg_temp) {
3789 data->reg_temp[1][i] = reg_temp_over[i];
3790 data->reg_temp[2][i] = reg_temp_hyst[i];
3792 data->temp_src[i] = i + 1;
3796 if (s >= NUM_TEMP) /* Abort if no more space */
3799 data->have_temp |= 1 << s;
3800 data->reg_temp[0][s] = reg_temp_alternate[i];
3801 data->temp_src[s] = i + 1;
3804 #endif /* USE_ALTERNATE */
3806 /* Initialize the chip */
3807 nct6775_init_device(data);
3809 err = superio_enter(sio_data->sioreg);
3813 cr2a = superio_inb(sio_data->sioreg, 0x2a);
3814 switch (data->kind) {
3816 data->have_vid = (cr2a & 0x40);
3819 data->have_vid = (cr2a & 0x60) == 0x40;
3829 * We can get the VID input values directly at logical device D 0xe3.
3831 if (data->have_vid) {
3832 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3833 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3834 data->vrm = vid_which_vrm();
3840 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3841 tmp = superio_inb(sio_data->sioreg,
3842 NCT6775_REG_CR_FAN_DEBOUNCE);
3843 switch (data->kind) {
3858 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3860 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3864 nct6775_check_fan_inputs(data);
3866 superio_exit(sio_data->sioreg);
3868 /* Read fan clock dividers immediately */
3869 nct6775_init_fan_common(dev, data);
3871 /* Register sysfs hooks */
3872 group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
3874 if (IS_ERR(group)) {
3875 err = PTR_ERR(group);
3878 data->group_pwm = group;
3880 group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
3881 fls(data->have_in));
3882 if (IS_ERR(group)) {
3883 err = PTR_ERR(group);
3886 data->group_in = group;
3888 group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
3889 fls(data->has_fan));
3890 if (IS_ERR(group)) {
3891 err = PTR_ERR(group);
3894 data->group_fan = group;
3896 group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
3897 fls(data->have_temp));
3898 if (IS_ERR(group)) {
3899 err = PTR_ERR(group);
3902 data->group_temp = group;
3904 err = sysfs_create_group(&dev->kobj, &nct6775_group_other);
3908 data->hwmon_dev = hwmon_device_register(dev);
3909 if (IS_ERR(data->hwmon_dev)) {
3910 err = PTR_ERR(data->hwmon_dev);
3917 nct6775_device_remove_files(dev);
3921 static int nct6775_remove(struct platform_device *pdev)
3923 struct nct6775_data *data = platform_get_drvdata(pdev);
3925 hwmon_device_unregister(data->hwmon_dev);
3926 nct6775_device_remove_files(&pdev->dev);
3932 static int nct6775_suspend(struct device *dev)
3934 struct nct6775_data *data = nct6775_update_device(dev);
3936 mutex_lock(&data->update_lock);
3937 data->vbat = nct6775_read_value(data, data->REG_VBAT);
3938 if (data->kind == nct6775) {
3939 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
3940 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
3942 mutex_unlock(&data->update_lock);
3947 static int nct6775_resume(struct device *dev)
3949 struct nct6775_data *data = dev_get_drvdata(dev);
3952 mutex_lock(&data->update_lock);
3953 data->bank = 0xff; /* Force initial bank selection */
3955 /* Restore limits */
3956 for (i = 0; i < data->in_num; i++) {
3957 if (!(data->have_in & (1 << i)))
3960 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
3962 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
3966 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
3967 if (!(data->has_fan_min & (1 << i)))
3970 nct6775_write_value(data, data->REG_FAN_MIN[i],
3974 for (i = 0; i < NUM_TEMP; i++) {
3975 if (!(data->have_temp & (1 << i)))
3978 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
3979 if (data->reg_temp[j][i])
3980 nct6775_write_temp(data, data->reg_temp[j][i],
3984 /* Restore other settings */
3985 nct6775_write_value(data, data->REG_VBAT, data->vbat);
3986 if (data->kind == nct6775) {
3987 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
3988 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
3991 /* Force re-reading all values */
3992 data->valid = false;
3993 mutex_unlock(&data->update_lock);
3998 static const struct dev_pm_ops nct6775_dev_pm_ops = {
3999 .suspend = nct6775_suspend,
4000 .resume = nct6775_resume,
4003 #define NCT6775_DEV_PM_OPS (&nct6775_dev_pm_ops)
4005 #define NCT6775_DEV_PM_OPS NULL
4006 #endif /* CONFIG_PM */
4008 static struct platform_driver nct6775_driver = {
4010 .owner = THIS_MODULE,
4012 .pm = NCT6775_DEV_PM_OPS,
4014 .probe = nct6775_probe,
4015 .remove = nct6775_remove,
4018 static const char * const nct6775_sio_names[] __initconst = {
4026 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4027 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4033 err = superio_enter(sioaddr);
4040 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
4041 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
4042 switch (val & SIO_ID_MASK) {
4043 case SIO_NCT6106_ID:
4044 sio_data->kind = nct6106;
4046 case SIO_NCT6775_ID:
4047 sio_data->kind = nct6775;
4049 case SIO_NCT6776_ID:
4050 sio_data->kind = nct6776;
4052 case SIO_NCT6779_ID:
4053 sio_data->kind = nct6779;
4055 case SIO_NCT6791_ID:
4056 sio_data->kind = nct6791;
4060 pr_debug("unsupported chip ID: 0x%04x\n", val);
4061 superio_exit(sioaddr);
4065 /* We have a known chip, find the HWM I/O address */
4066 superio_select(sioaddr, NCT6775_LD_HWM);
4067 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4068 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4069 addr = val & IOREGION_ALIGNMENT;
4071 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4072 superio_exit(sioaddr);
4076 /* Activate logical device if needed */
4077 val = superio_inb(sioaddr, SIO_REG_ENABLE);
4078 if (!(val & 0x01)) {
4079 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4080 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4082 if (sio_data->kind == nct6791) {
4083 val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
4085 pr_info("Enabling hardware monitor logical device mappings.\n");
4086 superio_outb(sioaddr,
4087 NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
4092 superio_exit(sioaddr);
4093 pr_info("Found %s or compatible chip at %#x:%#x\n",
4094 nct6775_sio_names[sio_data->kind], sioaddr, addr);
4095 sio_data->sioreg = sioaddr;
4101 * when Super-I/O functions move to a separate file, the Super-I/O
4102 * bus will manage the lifetime of the device and this module will only keep
4103 * track of the nct6775 driver. But since we platform_device_alloc(), we
4104 * must keep track of the device
4106 static struct platform_device *pdev[2];
4108 static int __init sensors_nct6775_init(void)
4113 struct resource res;
4114 struct nct6775_sio_data sio_data;
4115 int sioaddr[2] = { 0x2e, 0x4e };
4117 err = platform_driver_register(&nct6775_driver);
4122 * initialize sio_data->kind and sio_data->sioreg.
4124 * when Super-I/O functions move to a separate file, the Super-I/O
4125 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4126 * nct6775 hardware monitor, and call probe()
4128 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4129 address = nct6775_find(sioaddr[i], &sio_data);
4135 pdev[i] = platform_device_alloc(DRVNAME, address);
4138 goto exit_device_put;
4141 err = platform_device_add_data(pdev[i], &sio_data,
4142 sizeof(struct nct6775_sio_data));
4144 goto exit_device_put;
4146 memset(&res, 0, sizeof(res));
4148 res.start = address + IOREGION_OFFSET;
4149 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4150 res.flags = IORESOURCE_IO;
4152 err = acpi_check_resource_conflict(&res);
4154 platform_device_put(pdev[i]);
4159 err = platform_device_add_resources(pdev[i], &res, 1);
4161 goto exit_device_put;
4163 /* platform_device_add calls probe() */
4164 err = platform_device_add(pdev[i]);
4166 goto exit_device_put;
4170 goto exit_unregister;
4176 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4178 platform_device_put(pdev[i]);
4181 platform_driver_unregister(&nct6775_driver);
4185 static void __exit sensors_nct6775_exit(void)
4189 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4191 platform_device_unregister(pdev[i]);
4193 platform_driver_unregister(&nct6775_driver);
4196 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4197 MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
4198 MODULE_LICENSE("GPL");
4200 module_init(sensors_nct6775_init);
4201 module_exit(sensors_nct6775_exit);