2 * nct6775 - Driver for the hardware monitoring functionality of
3 * Nuvoton NCT677x Super-I/O chips
5 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net>
7 * Derived from w83627ehf driver
8 * Copyright (C) 2005-2011 Jean Delvare <khali@linux-fr.org>
9 * Copyright (C) 2006 Yuan Mu (Winbond),
10 * Rudolf Marek <r.marek@assembler.cz>
11 * David Hubbard <david.c.hubbard@gmail.com>
12 * Daniel J Blueman <daniel.blueman@gmail.com>
13 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
15 * Shamelessly ripped from the w83627hf driver
16 * Copyright (C) 2003 Mark Studebaker
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
33 * Supports the following chips:
35 * Chip #vin #fan #pwm #temp chip IDs man ID
36 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
37 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
38 * nct6779d 15 5 5 2+5 0xc560 0xc1 0x5ca3
41 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
43 #include <linux/module.h>
44 #include <linux/init.h>
45 #include <linux/slab.h>
46 #include <linux/jiffies.h>
47 #include <linux/platform_device.h>
48 #include <linux/hwmon.h>
49 #include <linux/hwmon-sysfs.h>
50 #include <linux/hwmon-vid.h>
51 #include <linux/err.h>
52 #include <linux/mutex.h>
53 #include <linux/acpi.h>
59 enum kinds { nct6775, nct6776, nct6779 };
61 /* used to set data->name = nct6775_device_names[data->sio_kind] */
62 static const char * const nct6775_device_names[] = {
68 static unsigned short force_id;
69 module_param(force_id, ushort, 0);
70 MODULE_PARM_DESC(force_id, "Override the detected device ID");
72 static unsigned short fan_debounce;
73 module_param(fan_debounce, ushort, 0);
74 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
76 #define DRVNAME "nct6775"
79 * Super-I/O constants and functions
82 #define NCT6775_LD_ACPI 0x0a
83 #define NCT6775_LD_HWM 0x0b
84 #define NCT6775_LD_VID 0x0d
86 #define SIO_REG_LDSEL 0x07 /* Logical device select */
87 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
88 #define SIO_REG_EN_VRM10 0x2C /* GPIO3, GPIO4 selection */
89 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
90 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
91 #define SIO_REG_VID_CTRL 0xF0 /* VID control */
92 #define SIO_REG_VID_DATA 0xF1 /* VID data */
94 #define SIO_NCT6775_ID 0xb470
95 #define SIO_NCT6776_ID 0xc330
96 #define SIO_NCT6779_ID 0xc560
97 #define SIO_ID_MASK 0xFFF0
100 superio_outb(int ioreg, int reg, int val)
103 outb(val, ioreg + 1);
107 superio_inb(int ioreg, int reg)
110 return inb(ioreg + 1);
114 superio_select(int ioreg, int ld)
116 outb(SIO_REG_LDSEL, ioreg);
121 superio_enter(int ioreg)
124 * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
126 if (!request_muxed_region(ioreg, 2, DRVNAME))
136 superio_exit(int ioreg)
140 outb(0x02, ioreg + 1);
141 release_region(ioreg, 2);
148 #define IOREGION_ALIGNMENT (~7)
149 #define IOREGION_OFFSET 5
150 #define IOREGION_LENGTH 2
151 #define ADDR_REG_OFFSET 0
152 #define DATA_REG_OFFSET 1
154 #define NCT6775_REG_BANK 0x4E
155 #define NCT6775_REG_CONFIG 0x40
158 * Not currently used:
159 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
160 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
161 * REG_MAN_ID is at port 0x4f
162 * REG_CHIP_ID is at port 0x58
165 /* Voltage min/max registers for nr=7..14 are in bank 5 */
167 static const u16 NCT6775_REG_IN_MAX[] = {
168 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
169 0x55c, 0x55e, 0x560, 0x562 };
170 static const u16 NCT6775_REG_IN_MIN[] = {
171 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
172 0x55d, 0x55f, 0x561, 0x563 };
173 static const u16 NCT6775_REG_IN[] = {
174 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
177 static const u16 NCT6779_REG_IN[] = {
178 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
179 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e
182 #define NCT6775_REG_VBAT 0x5D
183 #define NCT6775_REG_DIODE 0x5E
185 #define NCT6775_REG_FANDIV1 0x506
186 #define NCT6775_REG_FANDIV2 0x507
188 #define NCT6775_REG_CR_FAN_DEBOUNCE 0xf0
190 static const u16 NCT6775_REG_ALARM[6] = { 0x459, 0x45A, 0x45B };
191 static const u16 NCT6779_REG_ALARM[6] = { 0x459, 0x45A, 0x45B, 0x568 };
193 /* 0..15 voltages, 16..23 fans, 24..31 temperatures */
195 static const s8 NCT6775_ALARM_BITS[]
196 = { 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
197 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
199 6, 7, 11, 10, 23, /* fan1..fan5 */
200 -1, -1, -1, /* unused */
201 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
202 12, -1 }; /* intrusion0, intrusion1 */
204 static const s8 NCT6776_ALARM_BITS[]
205 = { 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
206 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
208 6, 7, 11, 10, 23, /* fan1..fan5 */
209 -1, -1, -1, /* unused */
210 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
211 12, 9 }; /* intrusion0, intrusion1 */
213 static const s8 NCT6779_ALARM_BITS[]
214 = { 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
215 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
217 6, 7, 11, 10, 23, /* fan1..fan5 */
218 -1, -1, -1, /* unused */
219 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
220 12, 9 }; /* intrusion0, intrusion1 */
222 #define FAN_ALARM_BASE 16
223 #define TEMP_ALARM_BASE 24
224 #define INTRUSION_ALARM_BASE 30
226 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
227 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
229 /* DC or PWM output fan configuration */
230 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
231 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
233 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0 };
234 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0 };
236 /* Advanced Fan control, some values are common for all fans */
238 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
239 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
240 static const u16 NCT6779_REG_FAN_PULSES[]
241 = { 0x644, 0x645, 0x646, 0x647, 0x648 };
243 static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301, 0x801, 0x901 };
244 static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302, 0x802, 0x902 };
245 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
246 0x103, 0x203, 0x303, 0x803, 0x903 };
247 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
248 0x104, 0x204, 0x304, 0x804, 0x904 };
249 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
250 0x105, 0x205, 0x305, 0x805, 0x905 };
251 static const u16 NCT6775_REG_FAN_START_OUTPUT[]
252 = { 0x106, 0x206, 0x306, 0x806, 0x906 };
253 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
254 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
256 static const u16 NCT6775_REG_FAN_STOP_TIME[]
257 = { 0x107, 0x207, 0x307, 0x807, 0x907 };
258 static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309, 0x809, 0x909 };
259 static const u16 NCT6775_REG_PWM_READ[] = { 0x01, 0x03, 0x11, 0x13, 0x15 };
261 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
262 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
264 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642};
266 static const u16 NCT6779_REG_FAN[] = { 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8 };
268 static const u16 NCT6779_REG_TOLERANCE_H[]
269 = { 0x10c, 0x20c, 0x30c, 0x80c, 0x90c };
271 static const u16 NCT6775_REG_TEMP[]
272 = { 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
273 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
275 static const u16 NCT6775_REG_TEMP_CONFIG[]
276 = { 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
277 static const u16 NCT6775_REG_TEMP_HYST[]
278 = { 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
279 static const u16 NCT6775_REG_TEMP_OVER[]
280 = { 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
282 static const u16 NCT6779_REG_TEMP_HYST[]
283 = { 0x3a, 0x153, 0, 0, 0, 0 };
284 static const u16 NCT6779_REG_TEMP_OVER[]
285 = { 0x39, 0x155, 0, 0, 0, 0 };
287 static const u16 NCT6775_REG_TEMP_SOURCE[]
288 = { 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
290 static const u16 NCT6775_REG_TEMP_SEL[]
291 = { 0x100, 0x200, 0x300, 0x800, 0x900 };
293 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[]
294 = { 0x139, 0x239, 0x339, 0x839, 0x939 };
295 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[]
296 = { 0x13a, 0x23a, 0x33a, 0x83a, 0x93a };
297 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[]
298 = { 0x13b, 0x23b, 0x33b, 0x83b, 0x93b };
299 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[]
300 = { 0x13c, 0x23c, 0x33c, 0x83c, 0x93c };
301 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[]
302 = { 0x13d, 0x23d, 0x33d, 0x83d, 0x93d };
304 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[]
305 = { 0x13e, 0x23e, 0x33e, 0x83e, 0x93e };
307 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
309 static const u16 NCT6779_REG_TEMP_OFFSET[]
310 = { 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
312 static const u16 NCT6776_REG_TEMP_CONFIG[11]
313 = { 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
315 static const u16 NCT6779_REG_TEMP_CONFIG[11] = { 0x18, 0x152 };
317 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
319 static const u16 NCT6775_REG_AUTO_TEMP[]
320 = { 0x121, 0x221, 0x321, 0x821, 0x921 };
321 static const u16 NCT6775_REG_AUTO_PWM[]
322 = { 0x127, 0x227, 0x327, 0x827, 0x927 };
324 #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p))
325 #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p))
327 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
329 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
330 0x135, 0x235, 0x335, 0x835, 0x935 };
331 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
332 0x138, 0x238, 0x338, 0x838, 0x938 };
334 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
335 0x136, 0x236, 0x336, 0x836, 0x936 };
336 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
337 0x137, 0x237, 0x337, 0x837, 0x937 };
339 static const char *const nct6775_temp_label[] = {
353 "PCH_CHIP_CPU_MAX_TEMP",
363 static const char *const nct6776_temp_label[] = {
378 "PCH_CHIP_CPU_MAX_TEMP",
389 static const char *const nct6779_temp_label[] = {
408 "PCH_CHIP_CPU_MAX_TEMP",
419 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
420 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
422 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
423 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
425 static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
426 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
427 0, 0, 0, 0, 0, 0, 0, 0,
428 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
431 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
432 = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
435 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
436 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
438 static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
439 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
441 #define NUM_TEMP 10 /* Max number of temp attribute sets w/ limits*/
442 #define NUM_TEMP_FIXED 6 /* Max number of fixed temp attribute sets */
444 static inline int reg_to_pwm_enable(int pwm, int mode)
446 if (mode == 0 && pwm == 255)
451 static inline int pwm_enable_to_reg(int mode)
462 /* 1 is DC mode, output in ms */
463 static inline unsigned int step_time_from_reg(u8 reg, u8 mode)
465 return mode ? 400 * reg : 100 * reg;
468 static inline u8 step_time_to_reg(unsigned int msec, u8 mode)
470 return SENSORS_LIMIT((mode ? (msec + 200) / 400 :
471 (msec + 50) / 100), 1, 255);
474 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
476 if (reg == 0 || reg == 255)
478 return 1350000U / (reg << divreg);
481 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
483 if ((reg & 0xff1f) == 0xff1f)
486 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
491 return 1350000U / reg;
494 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
496 if (reg == 0 || reg == 0xffff)
500 * Even though the registers are 16 bit wide, the fan divisor
503 return 1350000U / (reg << divreg);
506 static inline unsigned int
513 * Some of the voltage inputs have internal scaling, the tables below
514 * contain 8 (the ADC LSB in mV) * scaling factor * 100
516 static const u16 scale_in[15] = {
517 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
521 static inline long in_from_reg(u8 reg, u8 nr)
523 return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
526 static inline u8 in_to_reg(u32 val, u8 nr)
528 return SENSORS_LIMIT(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0,
533 * Data structures and manipulation thereof
536 struct nct6775_data {
537 int addr; /* IO base of hw monitor block */
541 struct device *hwmon_dev;
544 u16 reg_temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
547 u8 temp_src[NUM_TEMP];
548 u16 reg_temp_config[NUM_TEMP];
549 const char * const *temp_label;
556 const s8 *ALARM_BITS;
559 const u16 *REG_IN_MINMAX[2];
561 const u16 *REG_TARGET;
563 const u16 *REG_FAN_MODE;
564 const u16 *REG_FAN_MIN;
565 const u16 *REG_FAN_TIME[3];
567 const u8 *REG_PWM_MODE;
568 const u8 *PWM_MODE_MASK;
570 const u16 *REG_PWM[7]; /* [0]=pwm, [1]=start_output, [2]=stop_output,
571 * [3]=max_output, [4]=step_output,
572 * [5]=weight_duty_step, [6]=weight_duty_base
574 const u16 *REG_PWM_READ;
576 const u16 *REG_TEMP_MON;
577 const u16 *REG_AUTO_TEMP;
578 const u16 *REG_AUTO_PWM;
580 const u16 *REG_CRITICAL_TEMP;
581 const u16 *REG_CRITICAL_TEMP_TOLERANCE;
583 const u16 *REG_TEMP_SOURCE; /* temp register sources */
584 const u16 *REG_TEMP_SEL[2]; /* pwm temp, 0=base, 1=weight */
586 const u16 *REG_WEIGHT_TEMP[3]; /* 0=base, 1=hyst, 2=step */
588 const u16 *REG_TEMP_OFFSET;
590 const u16 *REG_ALARM;
592 unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
593 unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
595 struct mutex update_lock;
596 char valid; /* !=0 if following fields are valid */
597 unsigned long last_updated; /* In jiffies */
599 /* Register values */
600 u8 bank; /* current register bank */
601 u8 in_num; /* number of in inputs we have */
602 u8 in[15][3]; /* [0]=in, [1]=in_max, [2]=in_min */
607 u8 has_fan; /* some fan inputs can be disabled */
608 u8 has_fan_min; /* some fans don't have min register */
611 u8 temp_fixed_num; /* 3 or 6 */
612 u8 temp_type[NUM_TEMP_FIXED];
613 s8 temp_offset[NUM_TEMP_FIXED];
614 s16 temp[3][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst */
617 u8 pwm_num; /* number of pwm */
619 u8 pwm_mode[5]; /* 1->DC variable voltage, 0->PWM variable duty cycle */
620 u8 pwm_enable[5]; /* 0->off
622 * 2->thermal cruise mode (also called SmartFan I)
623 * 3->fan speed cruise mode
625 * 5->enhanced variable thermal cruise (SmartFan IV)
627 u8 pwm[7][5]; /* [0]=pwm, [1]=start_output, [2]=stop_output,
628 * [3]=max_output, [4]=step_output,
629 * [5]=weight_duty_step, [6]=weight_duty_base
635 u8 fan_time[3][5]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
637 /* Automatic fan speed control registers */
642 u8 pwm_temp_sel[2][5];
644 bool pwm_sel_enable[2][5];/* 0->stop_val, 1->weight;
645 * false->off, true->on
647 u8 weight_temp[3][5]; /* 0->temp_step, 1->temp_step_tol,
659 struct nct6775_sio_data {
664 static bool is_word_sized(struct nct6775_data *data, u16 reg)
666 switch (data->kind) {
668 return (((reg & 0xff00) == 0x100 ||
669 (reg & 0xff00) == 0x200) &&
670 ((reg & 0x00ff) == 0x50 ||
671 (reg & 0x00ff) == 0x53 ||
672 (reg & 0x00ff) == 0x55)) ||
673 (reg & 0xfff0) == 0x630 ||
674 reg == 0x640 || reg == 0x642 ||
676 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
677 reg == 0x73 || reg == 0x75 || reg == 0x77;
679 return (((reg & 0xff00) == 0x100 ||
680 (reg & 0xff00) == 0x200) &&
681 ((reg & 0x00ff) == 0x50 ||
682 (reg & 0x00ff) == 0x53 ||
683 (reg & 0x00ff) == 0x55)) ||
684 (reg & 0xfff0) == 0x630 ||
686 reg == 0x640 || reg == 0x642 ||
687 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
688 reg == 0x73 || reg == 0x75 || reg == 0x77;
690 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
691 ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x09) ||
693 reg == 0x63a || reg == 0x63c || reg == 0x63e ||
694 reg == 0x640 || reg == 0x642 ||
695 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
702 * On older chips, only registers 0x50-0x5f are banked.
703 * On more recent chips, all registers are banked.
704 * Assume that is the case and set the bank number for each access.
705 * Cache the bank number so it only needs to be set if it changes.
707 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
710 if (data->bank != bank) {
711 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
712 outb_p(bank, data->addr + DATA_REG_OFFSET);
717 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
719 int res, word_sized = is_word_sized(data, reg);
721 mutex_lock(&data->lock);
723 nct6775_set_bank(data, reg);
724 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
725 res = inb_p(data->addr + DATA_REG_OFFSET);
727 outb_p((reg & 0xff) + 1,
728 data->addr + ADDR_REG_OFFSET);
729 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
732 mutex_unlock(&data->lock);
736 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
738 int word_sized = is_word_sized(data, reg);
740 mutex_lock(&data->lock);
742 nct6775_set_bank(data, reg);
743 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
745 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
746 outb_p((reg & 0xff) + 1,
747 data->addr + ADDR_REG_OFFSET);
749 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
751 mutex_unlock(&data->lock);
755 /* We left-align 8-bit temperature values to make the code simpler */
756 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
760 res = nct6775_read_value(data, reg);
761 if (!is_word_sized(data, reg))
767 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
769 if (!is_word_sized(data, reg))
771 return nct6775_write_value(data, reg, value);
774 /* This function assumes that the caller holds data->update_lock */
775 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
781 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
782 | (data->fan_div[0] & 0x7);
783 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
786 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
787 | ((data->fan_div[1] << 4) & 0x70);
788 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
790 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
791 | (data->fan_div[2] & 0x7);
792 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
795 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
796 | ((data->fan_div[3] << 4) & 0x70);
797 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
802 static void nct6775_write_fan_div_common(struct device *dev,
803 struct nct6775_data *data, int nr)
805 if (data->kind == nct6775)
806 nct6775_write_fan_div(data, nr);
809 static void nct6775_update_fan_div(struct nct6775_data *data)
813 i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
814 data->fan_div[0] = i & 0x7;
815 data->fan_div[1] = (i & 0x70) >> 4;
816 i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
817 data->fan_div[2] = i & 0x7;
818 if (data->has_fan & (1<<3))
819 data->fan_div[3] = (i & 0x70) >> 4;
822 static void nct6775_update_fan_div_common(struct device *dev,
823 struct nct6775_data *data)
825 if (data->kind == nct6775)
826 nct6775_update_fan_div(data);
829 static void nct6775_update_pwm(struct device *dev)
831 struct nct6775_data *data = dev_get_drvdata(dev);
836 for (i = 0; i < data->pwm_num; i++) {
837 if (!(data->has_pwm & (1 << i)))
840 duty_is_dc = data->REG_PWM_MODE[i] &&
841 (nct6775_read_value(data, data->REG_PWM_MODE[i])
842 & data->PWM_MODE_MASK[i]);
843 data->pwm_mode[i] = duty_is_dc;
845 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
846 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
847 if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
849 = nct6775_read_value(data,
850 data->REG_PWM[j][i]);
854 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
855 (fanmodecfg >> 4) & 7);
857 data->tolerance[i][0] = fanmodecfg & 0x0f;
858 if (data->kind == nct6779) {
859 reg = nct6775_read_value(data,
860 NCT6779_REG_TOLERANCE_H[i]);
861 data->tolerance[i][0] |= (reg & 0x70) >> 1;
863 data->tolerance[i][1] =
864 nct6775_read_value(data,
865 data->REG_CRITICAL_TEMP_TOLERANCE[i]);
867 data->pwm_sel_enable[0][i] =
868 nct6775_read_value(data, data->REG_TEMP_SEL[0][i])
870 data->pwm_sel_enable[1][i] =
871 nct6775_read_value(data, data->REG_TEMP_SEL[1][i])
875 for (j = 0; j < 2; j++) {
876 reg = nct6775_read_value(data,
877 data->REG_TEMP_SEL[j][i]);
878 data->pwm_temp_sel[j][i] = reg & 0x1f;
880 /* Weight temp data */
881 for (j = 0; j < 3; j++) {
882 data->weight_temp[j][i]
883 = nct6775_read_value(data,
884 data->REG_WEIGHT_TEMP[j][i]);
889 static void nct6775_update_pwm_limits(struct device *dev)
891 struct nct6775_data *data = dev_get_drvdata(dev);
895 for (i = 0; i < data->pwm_num; i++) {
896 if (!(data->has_pwm & (1 << i)))
899 for (j = 0; j < 3; j++) {
900 data->fan_time[j][i] =
901 nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
904 data->target_temp[i] =
905 nct6775_read_value(data, data->REG_TARGET[i]) &
906 (data->pwm_mode[i] ? 0xff : 0x7f);
908 nct6775_read_value(data, data->REG_TEMP_MON[i]);
910 for (j = 0; j < data->auto_pwm_num; j++) {
911 data->auto_pwm[i][j] =
912 nct6775_read_value(data,
913 NCT6775_AUTO_PWM(data, i, j));
914 data->auto_temp[i][j] =
915 nct6775_read_value(data,
916 NCT6775_AUTO_TEMP(data, i, j));
919 /* critical auto_pwm temperature data */
920 data->auto_temp[i][data->auto_pwm_num] =
921 nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
923 switch (data->kind) {
925 reg = nct6775_read_value(data,
926 NCT6775_REG_CRITICAL_ENAB[i]);
927 data->auto_pwm[i][data->auto_pwm_num] =
928 (reg & 0x02) ? 0xff : 0x00;
931 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
934 reg = nct6775_read_value(data,
935 NCT6779_REG_CRITICAL_PWM_ENABLE[i]);
937 data->auto_pwm[i][data->auto_pwm_num] =
938 nct6775_read_value(data,
939 NCT6779_REG_CRITICAL_PWM[i]);
941 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
947 static struct nct6775_data *nct6775_update_device(struct device *dev)
949 struct nct6775_data *data = dev_get_drvdata(dev);
952 mutex_lock(&data->update_lock);
954 if (time_after(jiffies, data->last_updated + HZ + HZ/2)
956 /* Fan clock dividers */
957 nct6775_update_fan_div_common(dev, data);
959 /* Measured voltages and limits */
960 for (i = 0; i < data->in_num; i++) {
961 if (!(data->have_in & (1 << i)))
964 data->in[i][0] = nct6775_read_value(data,
966 data->in[i][1] = nct6775_read_value(data,
967 data->REG_IN_MINMAX[0][i]);
968 data->in[i][2] = nct6775_read_value(data,
969 data->REG_IN_MINMAX[1][i]);
972 /* Measured fan speeds and limits */
973 for (i = 0; i < 5; i++) {
976 if (!(data->has_fan & (1 << i)))
979 reg = nct6775_read_value(data, data->REG_FAN[i]);
980 data->rpm[i] = data->fan_from_reg(reg,
983 if (data->has_fan_min & (1 << i))
984 data->fan_min[i] = nct6775_read_value(data,
985 data->REG_FAN_MIN[i]);
988 * If we failed to measure the fan speed and clock
989 * divider can be increased, let's try that for next
992 if (data->has_fan_div && (reg >= 0xff || reg == 0x00)
993 && data->fan_div[i] < 0x07) {
995 "Increasing fan%d clock divider from %u to %u\n",
996 i + 1, div_from_reg(data->fan_div[i]),
997 div_from_reg(data->fan_div[i] + 1));
999 nct6775_write_fan_div_common(dev, data, i);
1000 /* Preserve min limit if possible */
1001 if ((data->has_fan_min & (1 << i))
1002 && data->fan_min[i] >= 2
1003 && data->fan_min[i] != 255)
1004 nct6775_write_value(data,
1005 data->REG_FAN_MIN[i],
1006 (data->fan_min[i] /= 2));
1010 nct6775_update_pwm(dev);
1011 nct6775_update_pwm_limits(dev);
1013 /* Measured temperatures and limits */
1014 for (i = 0; i < NUM_TEMP; i++) {
1015 if (!(data->have_temp & (1 << i)))
1017 for (j = 0; j < 4; j++) {
1018 if (data->reg_temp[j][i])
1020 = nct6775_read_temp(data,
1021 data->reg_temp[j][i]);
1023 if (!(data->have_temp_fixed & (1 << i)))
1025 data->temp_offset[i]
1026 = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1030 for (i = 0; i < 6; i++) {
1032 if (!data->REG_ALARM[i])
1034 alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1035 data->alarms |= ((u64)alarm) << (i << 3);
1038 data->last_updated = jiffies;
1042 mutex_unlock(&data->update_lock);
1047 * Sysfs callback functions
1050 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1052 struct nct6775_data *data = nct6775_update_device(dev);
1053 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1055 int index = sattr->index;
1056 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1060 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1063 struct nct6775_data *data = dev_get_drvdata(dev);
1064 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1066 int index = sattr->index;
1068 int err = kstrtoul(buf, 10, &val);
1071 mutex_lock(&data->update_lock);
1072 data->in[nr][index] = in_to_reg(val, nr);
1073 nct6775_write_value(data, data->REG_IN_MINMAX[index-1][nr],
1074 data->in[nr][index]);
1075 mutex_unlock(&data->update_lock);
1080 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1082 struct nct6775_data *data = nct6775_update_device(dev);
1083 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1084 int nr = data->ALARM_BITS[sattr->index];
1085 return sprintf(buf, "%u\n",
1086 (unsigned int)((data->alarms >> nr) & 0x01));
1089 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in_reg, NULL, 0, 0);
1090 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in_reg, NULL, 1, 0);
1091 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in_reg, NULL, 2, 0);
1092 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in_reg, NULL, 3, 0);
1093 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in_reg, NULL, 4, 0);
1094 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in_reg, NULL, 5, 0);
1095 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in_reg, NULL, 6, 0);
1096 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in_reg, NULL, 7, 0);
1097 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in_reg, NULL, 8, 0);
1098 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in_reg, NULL, 9, 0);
1099 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in_reg, NULL, 10, 0);
1100 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in_reg, NULL, 11, 0);
1101 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in_reg, NULL, 12, 0);
1102 static SENSOR_DEVICE_ATTR_2(in13_input, S_IRUGO, show_in_reg, NULL, 13, 0);
1103 static SENSOR_DEVICE_ATTR_2(in14_input, S_IRUGO, show_in_reg, NULL, 14, 0);
1105 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
1106 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
1107 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
1108 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
1109 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4);
1110 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5);
1111 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6);
1112 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7);
1113 static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8);
1114 static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 9);
1115 static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 10);
1116 static SENSOR_DEVICE_ATTR(in11_alarm, S_IRUGO, show_alarm, NULL, 11);
1117 static SENSOR_DEVICE_ATTR(in12_alarm, S_IRUGO, show_alarm, NULL, 12);
1118 static SENSOR_DEVICE_ATTR(in13_alarm, S_IRUGO, show_alarm, NULL, 13);
1119 static SENSOR_DEVICE_ATTR(in14_alarm, S_IRUGO, show_alarm, NULL, 14);
1121 static SENSOR_DEVICE_ATTR_2(in0_min, S_IWUSR | S_IRUGO, show_in_reg,
1122 store_in_reg, 0, 1);
1123 static SENSOR_DEVICE_ATTR_2(in1_min, S_IWUSR | S_IRUGO, show_in_reg,
1124 store_in_reg, 1, 1);
1125 static SENSOR_DEVICE_ATTR_2(in2_min, S_IWUSR | S_IRUGO, show_in_reg,
1126 store_in_reg, 2, 1);
1127 static SENSOR_DEVICE_ATTR_2(in3_min, S_IWUSR | S_IRUGO, show_in_reg,
1128 store_in_reg, 3, 1);
1129 static SENSOR_DEVICE_ATTR_2(in4_min, S_IWUSR | S_IRUGO, show_in_reg,
1130 store_in_reg, 4, 1);
1131 static SENSOR_DEVICE_ATTR_2(in5_min, S_IWUSR | S_IRUGO, show_in_reg,
1132 store_in_reg, 5, 1);
1133 static SENSOR_DEVICE_ATTR_2(in6_min, S_IWUSR | S_IRUGO, show_in_reg,
1134 store_in_reg, 6, 1);
1135 static SENSOR_DEVICE_ATTR_2(in7_min, S_IWUSR | S_IRUGO, show_in_reg,
1136 store_in_reg, 7, 1);
1137 static SENSOR_DEVICE_ATTR_2(in8_min, S_IWUSR | S_IRUGO, show_in_reg,
1138 store_in_reg, 8, 1);
1139 static SENSOR_DEVICE_ATTR_2(in9_min, S_IWUSR | S_IRUGO, show_in_reg,
1140 store_in_reg, 9, 1);
1141 static SENSOR_DEVICE_ATTR_2(in10_min, S_IWUSR | S_IRUGO, show_in_reg,
1142 store_in_reg, 10, 1);
1143 static SENSOR_DEVICE_ATTR_2(in11_min, S_IWUSR | S_IRUGO, show_in_reg,
1144 store_in_reg, 11, 1);
1145 static SENSOR_DEVICE_ATTR_2(in12_min, S_IWUSR | S_IRUGO, show_in_reg,
1146 store_in_reg, 12, 1);
1147 static SENSOR_DEVICE_ATTR_2(in13_min, S_IWUSR | S_IRUGO, show_in_reg,
1148 store_in_reg, 13, 1);
1149 static SENSOR_DEVICE_ATTR_2(in14_min, S_IWUSR | S_IRUGO, show_in_reg,
1150 store_in_reg, 14, 1);
1152 static SENSOR_DEVICE_ATTR_2(in0_max, S_IWUSR | S_IRUGO, show_in_reg,
1153 store_in_reg, 0, 2);
1154 static SENSOR_DEVICE_ATTR_2(in1_max, S_IWUSR | S_IRUGO, show_in_reg,
1155 store_in_reg, 1, 2);
1156 static SENSOR_DEVICE_ATTR_2(in2_max, S_IWUSR | S_IRUGO, show_in_reg,
1157 store_in_reg, 2, 2);
1158 static SENSOR_DEVICE_ATTR_2(in3_max, S_IWUSR | S_IRUGO, show_in_reg,
1159 store_in_reg, 3, 2);
1160 static SENSOR_DEVICE_ATTR_2(in4_max, S_IWUSR | S_IRUGO, show_in_reg,
1161 store_in_reg, 4, 2);
1162 static SENSOR_DEVICE_ATTR_2(in5_max, S_IWUSR | S_IRUGO, show_in_reg,
1163 store_in_reg, 5, 2);
1164 static SENSOR_DEVICE_ATTR_2(in6_max, S_IWUSR | S_IRUGO, show_in_reg,
1165 store_in_reg, 6, 2);
1166 static SENSOR_DEVICE_ATTR_2(in7_max, S_IWUSR | S_IRUGO, show_in_reg,
1167 store_in_reg, 7, 2);
1168 static SENSOR_DEVICE_ATTR_2(in8_max, S_IWUSR | S_IRUGO, show_in_reg,
1169 store_in_reg, 8, 2);
1170 static SENSOR_DEVICE_ATTR_2(in9_max, S_IWUSR | S_IRUGO, show_in_reg,
1171 store_in_reg, 9, 2);
1172 static SENSOR_DEVICE_ATTR_2(in10_max, S_IWUSR | S_IRUGO, show_in_reg,
1173 store_in_reg, 10, 2);
1174 static SENSOR_DEVICE_ATTR_2(in11_max, S_IWUSR | S_IRUGO, show_in_reg,
1175 store_in_reg, 11, 2);
1176 static SENSOR_DEVICE_ATTR_2(in12_max, S_IWUSR | S_IRUGO, show_in_reg,
1177 store_in_reg, 12, 2);
1178 static SENSOR_DEVICE_ATTR_2(in13_max, S_IWUSR | S_IRUGO, show_in_reg,
1179 store_in_reg, 13, 2);
1180 static SENSOR_DEVICE_ATTR_2(in14_max, S_IWUSR | S_IRUGO, show_in_reg,
1181 store_in_reg, 14, 2);
1183 static struct attribute *nct6775_attributes_in[15][5] = {
1185 &sensor_dev_attr_in0_input.dev_attr.attr,
1186 &sensor_dev_attr_in0_min.dev_attr.attr,
1187 &sensor_dev_attr_in0_max.dev_attr.attr,
1188 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1192 &sensor_dev_attr_in1_input.dev_attr.attr,
1193 &sensor_dev_attr_in1_min.dev_attr.attr,
1194 &sensor_dev_attr_in1_max.dev_attr.attr,
1195 &sensor_dev_attr_in1_alarm.dev_attr.attr,
1199 &sensor_dev_attr_in2_input.dev_attr.attr,
1200 &sensor_dev_attr_in2_min.dev_attr.attr,
1201 &sensor_dev_attr_in2_max.dev_attr.attr,
1202 &sensor_dev_attr_in2_alarm.dev_attr.attr,
1206 &sensor_dev_attr_in3_input.dev_attr.attr,
1207 &sensor_dev_attr_in3_min.dev_attr.attr,
1208 &sensor_dev_attr_in3_max.dev_attr.attr,
1209 &sensor_dev_attr_in3_alarm.dev_attr.attr,
1213 &sensor_dev_attr_in4_input.dev_attr.attr,
1214 &sensor_dev_attr_in4_min.dev_attr.attr,
1215 &sensor_dev_attr_in4_max.dev_attr.attr,
1216 &sensor_dev_attr_in4_alarm.dev_attr.attr,
1220 &sensor_dev_attr_in5_input.dev_attr.attr,
1221 &sensor_dev_attr_in5_min.dev_attr.attr,
1222 &sensor_dev_attr_in5_max.dev_attr.attr,
1223 &sensor_dev_attr_in5_alarm.dev_attr.attr,
1227 &sensor_dev_attr_in6_input.dev_attr.attr,
1228 &sensor_dev_attr_in6_min.dev_attr.attr,
1229 &sensor_dev_attr_in6_max.dev_attr.attr,
1230 &sensor_dev_attr_in6_alarm.dev_attr.attr,
1234 &sensor_dev_attr_in7_input.dev_attr.attr,
1235 &sensor_dev_attr_in7_min.dev_attr.attr,
1236 &sensor_dev_attr_in7_max.dev_attr.attr,
1237 &sensor_dev_attr_in7_alarm.dev_attr.attr,
1241 &sensor_dev_attr_in8_input.dev_attr.attr,
1242 &sensor_dev_attr_in8_min.dev_attr.attr,
1243 &sensor_dev_attr_in8_max.dev_attr.attr,
1244 &sensor_dev_attr_in8_alarm.dev_attr.attr,
1248 &sensor_dev_attr_in9_input.dev_attr.attr,
1249 &sensor_dev_attr_in9_min.dev_attr.attr,
1250 &sensor_dev_attr_in9_max.dev_attr.attr,
1251 &sensor_dev_attr_in9_alarm.dev_attr.attr,
1255 &sensor_dev_attr_in10_input.dev_attr.attr,
1256 &sensor_dev_attr_in10_min.dev_attr.attr,
1257 &sensor_dev_attr_in10_max.dev_attr.attr,
1258 &sensor_dev_attr_in10_alarm.dev_attr.attr,
1262 &sensor_dev_attr_in11_input.dev_attr.attr,
1263 &sensor_dev_attr_in11_min.dev_attr.attr,
1264 &sensor_dev_attr_in11_max.dev_attr.attr,
1265 &sensor_dev_attr_in11_alarm.dev_attr.attr,
1269 &sensor_dev_attr_in12_input.dev_attr.attr,
1270 &sensor_dev_attr_in12_min.dev_attr.attr,
1271 &sensor_dev_attr_in12_max.dev_attr.attr,
1272 &sensor_dev_attr_in12_alarm.dev_attr.attr,
1276 &sensor_dev_attr_in13_input.dev_attr.attr,
1277 &sensor_dev_attr_in13_min.dev_attr.attr,
1278 &sensor_dev_attr_in13_max.dev_attr.attr,
1279 &sensor_dev_attr_in13_alarm.dev_attr.attr,
1283 &sensor_dev_attr_in14_input.dev_attr.attr,
1284 &sensor_dev_attr_in14_min.dev_attr.attr,
1285 &sensor_dev_attr_in14_max.dev_attr.attr,
1286 &sensor_dev_attr_in14_alarm.dev_attr.attr,
1291 static const struct attribute_group nct6775_group_in[15] = {
1292 { .attrs = nct6775_attributes_in[0] },
1293 { .attrs = nct6775_attributes_in[1] },
1294 { .attrs = nct6775_attributes_in[2] },
1295 { .attrs = nct6775_attributes_in[3] },
1296 { .attrs = nct6775_attributes_in[4] },
1297 { .attrs = nct6775_attributes_in[5] },
1298 { .attrs = nct6775_attributes_in[6] },
1299 { .attrs = nct6775_attributes_in[7] },
1300 { .attrs = nct6775_attributes_in[8] },
1301 { .attrs = nct6775_attributes_in[9] },
1302 { .attrs = nct6775_attributes_in[10] },
1303 { .attrs = nct6775_attributes_in[11] },
1304 { .attrs = nct6775_attributes_in[12] },
1305 { .attrs = nct6775_attributes_in[13] },
1306 { .attrs = nct6775_attributes_in[14] },
1310 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1312 struct nct6775_data *data = nct6775_update_device(dev);
1313 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1314 int nr = sattr->index;
1315 return sprintf(buf, "%d\n", data->rpm[nr]);
1319 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1321 struct nct6775_data *data = nct6775_update_device(dev);
1322 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1323 int nr = sattr->index;
1324 return sprintf(buf, "%d\n",
1325 data->fan_from_reg_min(data->fan_min[nr],
1326 data->fan_div[nr]));
1330 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1332 struct nct6775_data *data = nct6775_update_device(dev);
1333 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1334 int nr = sattr->index;
1335 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1339 store_fan_min(struct device *dev, struct device_attribute *attr,
1340 const char *buf, size_t count)
1342 struct nct6775_data *data = dev_get_drvdata(dev);
1343 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1344 int nr = sattr->index;
1350 err = kstrtoul(buf, 10, &val);
1354 mutex_lock(&data->update_lock);
1355 if (!data->has_fan_div) {
1356 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1362 val = 1350000U / val;
1363 val = (val & 0x1f) | ((val << 3) & 0xff00);
1365 data->fan_min[nr] = val;
1366 goto write_min; /* Leave fan divider alone */
1369 /* No min limit, alarm disabled */
1370 data->fan_min[nr] = 255;
1371 new_div = data->fan_div[nr]; /* No change */
1372 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1375 reg = 1350000U / val;
1376 if (reg >= 128 * 255) {
1378 * Speed below this value cannot possibly be represented,
1379 * even with the highest divider (128)
1381 data->fan_min[nr] = 254;
1382 new_div = 7; /* 128 == (1 << 7) */
1384 "fan%u low limit %lu below minimum %u, set to minimum\n",
1385 nr + 1, val, data->fan_from_reg_min(254, 7));
1388 * Speed above this value cannot possibly be represented,
1389 * even with the lowest divider (1)
1391 data->fan_min[nr] = 1;
1392 new_div = 0; /* 1 == (1 << 0) */
1394 "fan%u low limit %lu above maximum %u, set to maximum\n",
1395 nr + 1, val, data->fan_from_reg_min(1, 0));
1398 * Automatically pick the best divider, i.e. the one such
1399 * that the min limit will correspond to a register value
1400 * in the 96..192 range
1403 while (reg > 192 && new_div < 7) {
1407 data->fan_min[nr] = reg;
1412 * Write both the fan clock divider (if it changed) and the new
1413 * fan min (unconditionally)
1415 if (new_div != data->fan_div[nr]) {
1416 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1417 nr + 1, div_from_reg(data->fan_div[nr]),
1418 div_from_reg(new_div));
1419 data->fan_div[nr] = new_div;
1420 nct6775_write_fan_div_common(dev, data, nr);
1421 /* Give the chip time to sample a new speed value */
1422 data->last_updated = jiffies;
1426 nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1427 mutex_unlock(&data->update_lock);
1432 static struct sensor_device_attribute sda_fan_input[] = {
1433 SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
1434 SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
1435 SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
1436 SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
1437 SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
1440 static struct sensor_device_attribute sda_fan_alarm[] = {
1441 SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE),
1442 SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 1),
1443 SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 2),
1444 SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 3),
1445 SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 4),
1448 static struct sensor_device_attribute sda_fan_min[] = {
1449 SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
1451 SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
1453 SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
1455 SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
1457 SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
1461 static struct sensor_device_attribute sda_fan_div[] = {
1462 SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
1463 SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
1464 SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
1465 SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
1466 SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
1470 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1472 struct nct6775_data *data = nct6775_update_device(dev);
1473 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1474 int nr = sattr->index;
1475 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1479 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1481 struct nct6775_data *data = nct6775_update_device(dev);
1482 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1484 int index = sattr->index;
1486 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1490 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1493 struct nct6775_data *data = dev_get_drvdata(dev);
1494 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1496 int index = sattr->index;
1500 err = kstrtol(buf, 10, &val);
1504 mutex_lock(&data->update_lock);
1505 data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1506 nct6775_write_temp(data, data->reg_temp[index][nr],
1507 data->temp[index][nr]);
1508 mutex_unlock(&data->update_lock);
1513 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1515 struct nct6775_data *data = nct6775_update_device(dev);
1516 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1518 return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
1522 store_temp_offset(struct device *dev, struct device_attribute *attr,
1523 const char *buf, size_t count)
1525 struct nct6775_data *data = dev_get_drvdata(dev);
1526 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1527 int nr = sattr->index;
1531 err = kstrtol(buf, 10, &val);
1535 val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
1537 mutex_lock(&data->update_lock);
1538 data->temp_offset[nr] = val;
1539 nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
1540 mutex_unlock(&data->update_lock);
1546 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
1548 struct nct6775_data *data = nct6775_update_device(dev);
1549 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1550 int nr = sattr->index;
1551 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
1555 store_temp_type(struct device *dev, struct device_attribute *attr,
1556 const char *buf, size_t count)
1558 struct nct6775_data *data = nct6775_update_device(dev);
1559 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1560 int nr = sattr->index;
1563 u8 vbat, diode, bit;
1565 err = kstrtoul(buf, 10, &val);
1569 if (val != 1 && val != 3 && val != 4)
1572 mutex_lock(&data->update_lock);
1574 data->temp_type[nr] = val;
1575 vbat = nct6775_read_value(data, data->REG_VBAT) & ~(0x02 << nr);
1576 diode = nct6775_read_value(data, data->REG_DIODE) & ~(0x02 << nr);
1579 case 1: /* CPU diode (diode, current mode) */
1583 case 3: /* diode, voltage mode */
1586 case 4: /* thermistor */
1589 nct6775_write_value(data, data->REG_VBAT, vbat);
1590 nct6775_write_value(data, data->REG_DIODE, diode);
1592 mutex_unlock(&data->update_lock);
1596 static struct sensor_device_attribute_2 sda_temp_input[] = {
1597 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
1598 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0),
1599 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0),
1600 SENSOR_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0),
1601 SENSOR_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0),
1602 SENSOR_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0),
1603 SENSOR_ATTR_2(temp7_input, S_IRUGO, show_temp, NULL, 6, 0),
1604 SENSOR_ATTR_2(temp8_input, S_IRUGO, show_temp, NULL, 7, 0),
1605 SENSOR_ATTR_2(temp9_input, S_IRUGO, show_temp, NULL, 8, 0),
1606 SENSOR_ATTR_2(temp10_input, S_IRUGO, show_temp, NULL, 9, 0),
1609 static struct sensor_device_attribute sda_temp_label[] = {
1610 SENSOR_ATTR(temp1_label, S_IRUGO, show_temp_label, NULL, 0),
1611 SENSOR_ATTR(temp2_label, S_IRUGO, show_temp_label, NULL, 1),
1612 SENSOR_ATTR(temp3_label, S_IRUGO, show_temp_label, NULL, 2),
1613 SENSOR_ATTR(temp4_label, S_IRUGO, show_temp_label, NULL, 3),
1614 SENSOR_ATTR(temp5_label, S_IRUGO, show_temp_label, NULL, 4),
1615 SENSOR_ATTR(temp6_label, S_IRUGO, show_temp_label, NULL, 5),
1616 SENSOR_ATTR(temp7_label, S_IRUGO, show_temp_label, NULL, 6),
1617 SENSOR_ATTR(temp8_label, S_IRUGO, show_temp_label, NULL, 7),
1618 SENSOR_ATTR(temp9_label, S_IRUGO, show_temp_label, NULL, 8),
1619 SENSOR_ATTR(temp10_label, S_IRUGO, show_temp_label, NULL, 9),
1622 static struct sensor_device_attribute_2 sda_temp_max[] = {
1623 SENSOR_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1625 SENSOR_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1627 SENSOR_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1629 SENSOR_ATTR_2(temp4_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1631 SENSOR_ATTR_2(temp5_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1633 SENSOR_ATTR_2(temp6_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1635 SENSOR_ATTR_2(temp7_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1637 SENSOR_ATTR_2(temp8_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1639 SENSOR_ATTR_2(temp9_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1641 SENSOR_ATTR_2(temp10_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1645 static struct sensor_device_attribute_2 sda_temp_max_hyst[] = {
1646 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1648 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1650 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1652 SENSOR_ATTR_2(temp4_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1654 SENSOR_ATTR_2(temp5_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1656 SENSOR_ATTR_2(temp6_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1658 SENSOR_ATTR_2(temp7_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1660 SENSOR_ATTR_2(temp8_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1662 SENSOR_ATTR_2(temp9_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1664 SENSOR_ATTR_2(temp10_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1668 static struct sensor_device_attribute_2 sda_temp_crit[] = {
1669 SENSOR_ATTR_2(temp1_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1671 SENSOR_ATTR_2(temp2_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1673 SENSOR_ATTR_2(temp3_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1675 SENSOR_ATTR_2(temp4_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1677 SENSOR_ATTR_2(temp5_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1679 SENSOR_ATTR_2(temp6_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1681 SENSOR_ATTR_2(temp7_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1683 SENSOR_ATTR_2(temp8_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1685 SENSOR_ATTR_2(temp9_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1687 SENSOR_ATTR_2(temp10_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1691 static struct sensor_device_attribute sda_temp_offset[] = {
1692 SENSOR_ATTR(temp1_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1693 store_temp_offset, 0),
1694 SENSOR_ATTR(temp2_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1695 store_temp_offset, 1),
1696 SENSOR_ATTR(temp3_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1697 store_temp_offset, 2),
1698 SENSOR_ATTR(temp4_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1699 store_temp_offset, 3),
1700 SENSOR_ATTR(temp5_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1701 store_temp_offset, 4),
1702 SENSOR_ATTR(temp6_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1703 store_temp_offset, 5),
1706 static struct sensor_device_attribute sda_temp_type[] = {
1707 SENSOR_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1708 store_temp_type, 0),
1709 SENSOR_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1710 store_temp_type, 1),
1711 SENSOR_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1712 store_temp_type, 2),
1713 SENSOR_ATTR(temp4_type, S_IRUGO | S_IWUSR, show_temp_type,
1714 store_temp_type, 3),
1715 SENSOR_ATTR(temp5_type, S_IRUGO | S_IWUSR, show_temp_type,
1716 store_temp_type, 4),
1717 SENSOR_ATTR(temp6_type, S_IRUGO | S_IWUSR, show_temp_type,
1718 store_temp_type, 5),
1721 static struct sensor_device_attribute sda_temp_alarm[] = {
1722 SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL,
1724 SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL,
1725 TEMP_ALARM_BASE + 1),
1726 SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL,
1727 TEMP_ALARM_BASE + 2),
1728 SENSOR_ATTR(temp4_alarm, S_IRUGO, show_alarm, NULL,
1729 TEMP_ALARM_BASE + 3),
1730 SENSOR_ATTR(temp5_alarm, S_IRUGO, show_alarm, NULL,
1731 TEMP_ALARM_BASE + 4),
1732 SENSOR_ATTR(temp6_alarm, S_IRUGO, show_alarm, NULL,
1733 TEMP_ALARM_BASE + 5),
1736 #define NUM_TEMP_ALARM ARRAY_SIZE(sda_temp_alarm)
1739 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
1741 struct nct6775_data *data = nct6775_update_device(dev);
1742 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1744 return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
1748 store_pwm_mode(struct device *dev, struct device_attribute *attr,
1749 const char *buf, size_t count)
1751 struct nct6775_data *data = dev_get_drvdata(dev);
1752 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1753 int nr = sattr->index;
1758 err = kstrtoul(buf, 10, &val);
1765 /* Setting DC mode is not supported for all chips/channels */
1766 if (data->REG_PWM_MODE[nr] == 0) {
1772 mutex_lock(&data->update_lock);
1773 data->pwm_mode[nr] = val;
1774 reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
1775 reg &= ~data->PWM_MODE_MASK[nr];
1777 reg |= data->PWM_MODE_MASK[nr];
1778 nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
1779 mutex_unlock(&data->update_lock);
1784 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
1786 struct nct6775_data *data = nct6775_update_device(dev);
1787 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1789 return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
1793 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1795 struct nct6775_data *data = nct6775_update_device(dev);
1796 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1798 int index = sattr->index;
1802 * For automatic fan control modes, show current pwm readings.
1803 * Otherwise, show the configured value.
1805 if (index == 0 && data->pwm_enable[nr] > 1)
1806 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
1808 pwm = data->pwm[index][nr];
1810 return sprintf(buf, "%d\n", pwm);
1814 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
1817 struct nct6775_data *data = dev_get_drvdata(dev);
1818 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1820 int index = sattr->index;
1822 int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
1824 = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
1827 err = kstrtoul(buf, 10, &val);
1830 val = SENSORS_LIMIT(val, minval[index], maxval[index]);
1832 mutex_lock(&data->update_lock);
1833 data->pwm[index][nr] = val;
1834 nct6775_write_value(data, data->REG_PWM[index][nr], val);
1835 mutex_unlock(&data->update_lock);
1839 /* Returns 0 if OK, -EINVAL otherwise */
1840 static int check_trip_points(struct nct6775_data *data, int nr)
1844 for (i = 0; i < data->auto_pwm_num - 1; i++) {
1845 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1848 for (i = 0; i < data->auto_pwm_num - 1; i++) {
1849 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1852 /* validate critical temperature and pwm if enabled (pwm > 0) */
1853 if (data->auto_pwm[nr][data->auto_pwm_num]) {
1854 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
1855 data->auto_temp[nr][data->auto_pwm_num] ||
1856 data->auto_pwm[nr][data->auto_pwm_num - 1] >
1857 data->auto_pwm[nr][data->auto_pwm_num])
1864 store_pwm_enable(struct device *dev, struct device_attribute *attr,
1865 const char *buf, size_t count)
1867 struct nct6775_data *data = dev_get_drvdata(dev);
1868 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1869 int nr = sattr->index;
1874 err = kstrtoul(buf, 10, &val);
1881 if (val == 4 && data->kind != nct6775)
1884 if (val == 5 && check_trip_points(data, nr)) {
1885 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
1886 dev_err(dev, "Adjust trip points and try again\n");
1890 mutex_lock(&data->update_lock);
1891 data->pwm_enable[nr] = val;
1894 * turn off pwm control: select manual mode, set pwm to maximum
1896 data->pwm[0][nr] = 255;
1897 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
1899 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
1901 reg |= pwm_enable_to_reg(val) << 4;
1902 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
1903 mutex_unlock(&data->update_lock);
1908 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
1910 struct nct6775_data *data = nct6775_update_device(dev);
1911 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1912 int i, src, sel = 0;
1914 src = data->pwm_temp_sel[sattr->index][sattr->nr];
1916 for (i = 0; i < NUM_TEMP; i++) {
1917 if (!(data->have_temp & (1 << i)))
1919 if (src == data->temp_src[i]) {
1925 return sprintf(buf, "%d\n", sel);
1929 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
1930 const char *buf, size_t count)
1932 struct nct6775_data *data = nct6775_update_device(dev);
1933 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1935 int index = sattr->index;
1939 err = kstrtoul(buf, 10, &val);
1942 if (val == 0 || val > NUM_TEMP)
1944 if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
1947 mutex_lock(&data->update_lock);
1948 src = data->temp_src[val - 1];
1949 data->pwm_temp_sel[index][nr] = src;
1950 reg = nct6775_read_value(data, data->REG_TEMP_SEL[index][nr]);
1953 nct6775_write_value(data, data->REG_TEMP_SEL[index][nr], reg);
1954 mutex_unlock(&data->update_lock);
1960 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
1962 struct nct6775_data *data = nct6775_update_device(dev);
1963 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1965 return sprintf(buf, "%d\n",
1966 data->target_temp[sattr->index] * 1000);
1970 store_target_temp(struct device *dev, struct device_attribute *attr,
1971 const char *buf, size_t count)
1973 struct nct6775_data *data = dev_get_drvdata(dev);
1974 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1975 int nr = sattr->index;
1979 err = kstrtol(buf, 10, &val);
1983 val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), 0, 127);
1985 mutex_lock(&data->update_lock);
1986 data->target_temp[nr] = val;
1987 nct6775_write_value(data, data->REG_TARGET[nr], val);
1988 mutex_unlock(&data->update_lock);
1993 show_auto_temp_hyst(struct device *dev, struct device_attribute *attr,
1996 struct nct6775_data *data = nct6775_update_device(dev);
1997 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1999 int point = sattr->index >= data->auto_pwm_num ? 1 : 0;
2000 int tolerance = data->tolerance[nr][point];
2001 int temp = data->auto_temp[nr][sattr->index];
2003 return sprintf(buf, "%d\n", (temp - tolerance) * 1000);
2007 store_auto_temp_hyst(struct device *dev, struct device_attribute *attr,
2008 const char *buf, size_t count)
2010 struct nct6775_data *data = dev_get_drvdata(dev);
2011 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2013 int point = sattr->index >= data->auto_pwm_num ? 1 : 0;
2017 int maxlimit[2][3] = { { 15, 7, 63 }, { 15, 7, 7 } };
2018 int mask[] = { 0x0f, 0x07, 0x07 };
2021 err = kstrtol(buf, 10, &val);
2025 temp = data->auto_temp[nr][sattr->index];
2026 val = temp - DIV_ROUND_CLOSEST(val, 1000);
2028 /* Limit tolerance as needed */
2029 val = SENSORS_LIMIT(val, 0, maxlimit[point][data->kind]);
2031 mutex_lock(&data->update_lock);
2033 nct6775_write_value(data,
2034 data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2037 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2038 reg = (reg & ~mask[nr]) | (val & mask[nr]);
2039 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2040 if (data->kind == nct6779) {
2041 reg = nct6775_read_value(data,
2042 NCT6779_REG_TOLERANCE_H[nr]);
2043 reg = (reg & 0x70) | ((val & 0x38) << 1);
2044 nct6775_write_value(data,
2045 NCT6779_REG_TOLERANCE_H[nr], reg);
2049 data->tolerance[nr][point] = val;
2050 mutex_unlock(&data->update_lock);
2054 static SENSOR_DEVICE_ATTR_2(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2055 static SENSOR_DEVICE_ATTR_2(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1, 0);
2056 static SENSOR_DEVICE_ATTR_2(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2, 0);
2057 static SENSOR_DEVICE_ATTR_2(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3, 0);
2058 static SENSOR_DEVICE_ATTR_2(pwm5, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 4, 0);
2060 static SENSOR_DEVICE_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2062 static SENSOR_DEVICE_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2064 static SENSOR_DEVICE_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2066 static SENSOR_DEVICE_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2068 static SENSOR_DEVICE_ATTR(pwm5_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2071 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2072 store_pwm_enable, 0);
2073 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2074 store_pwm_enable, 1);
2075 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2076 store_pwm_enable, 2);
2077 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2078 store_pwm_enable, 3);
2079 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2080 store_pwm_enable, 4);
2082 static SENSOR_DEVICE_ATTR_2(pwm1_temp_sel, S_IWUSR | S_IRUGO,
2083 show_pwm_temp_sel, store_pwm_temp_sel, 0, 0);
2084 static SENSOR_DEVICE_ATTR_2(pwm2_temp_sel, S_IWUSR | S_IRUGO,
2085 show_pwm_temp_sel, store_pwm_temp_sel, 1, 0);
2086 static SENSOR_DEVICE_ATTR_2(pwm3_temp_sel, S_IWUSR | S_IRUGO,
2087 show_pwm_temp_sel, store_pwm_temp_sel, 2, 0);
2088 static SENSOR_DEVICE_ATTR_2(pwm4_temp_sel, S_IWUSR | S_IRUGO,
2089 show_pwm_temp_sel, store_pwm_temp_sel, 3, 0);
2090 static SENSOR_DEVICE_ATTR_2(pwm5_temp_sel, S_IWUSR | S_IRUGO,
2091 show_pwm_temp_sel, store_pwm_temp_sel, 4, 0);
2093 static SENSOR_DEVICE_ATTR(pwm1_target, S_IWUSR | S_IRUGO, show_target_temp,
2094 store_target_temp, 0);
2095 static SENSOR_DEVICE_ATTR(pwm2_target, S_IWUSR | S_IRUGO, show_target_temp,
2096 store_target_temp, 1);
2097 static SENSOR_DEVICE_ATTR(pwm3_target, S_IWUSR | S_IRUGO, show_target_temp,
2098 store_target_temp, 2);
2099 static SENSOR_DEVICE_ATTR(pwm4_target, S_IWUSR | S_IRUGO, show_target_temp,
2100 store_target_temp, 3);
2101 static SENSOR_DEVICE_ATTR(pwm5_target, S_IWUSR | S_IRUGO, show_target_temp,
2102 store_target_temp, 4);
2104 /* Smart Fan registers */
2107 show_pwm_sel_enable(struct device *dev, struct device_attribute *attr,
2110 struct nct6775_data *data = nct6775_update_device(dev);
2111 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2113 return sprintf(buf, "%d\n",
2114 data->pwm_sel_enable[sattr->index][sattr->nr]);
2118 store_pwm_sel_enable(struct device *dev, struct device_attribute *attr,
2119 const char *buf, size_t count)
2121 struct nct6775_data *data = dev_get_drvdata(dev);
2122 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2124 int index = sattr->index;
2129 err = kstrtoul(buf, 10, &val);
2136 mutex_lock(&data->update_lock);
2137 data->pwm_sel_enable[index][nr] = val;
2138 reg = nct6775_read_value(data, data->REG_TEMP_SEL[index][nr]);
2142 nct6775_write_value(data, data->REG_TEMP_SEL[index][nr], reg);
2143 mutex_unlock(&data->update_lock);
2148 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2150 struct nct6775_data *data = nct6775_update_device(dev);
2151 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2153 int index = sattr->index;
2155 return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2159 store_weight_temp(struct device *dev, struct device_attribute *attr,
2160 const char *buf, size_t count)
2162 struct nct6775_data *data = dev_get_drvdata(dev);
2163 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2165 int index = sattr->index;
2169 err = kstrtoul(buf, 10, &val);
2173 val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2175 mutex_lock(&data->update_lock);
2176 data->weight_temp[index][nr] = val;
2177 nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2178 mutex_unlock(&data->update_lock);
2182 static SENSOR_DEVICE_ATTR_2(pwm1_stop_output_enable, S_IWUSR | S_IRUGO,
2183 show_pwm_sel_enable, store_pwm_sel_enable, 0, 0);
2184 static SENSOR_DEVICE_ATTR_2(pwm2_stop_output_enable, S_IWUSR | S_IRUGO,
2185 show_pwm_sel_enable, store_pwm_sel_enable, 1, 0);
2186 static SENSOR_DEVICE_ATTR_2(pwm3_stop_output_enable, S_IWUSR | S_IRUGO,
2187 show_pwm_sel_enable, store_pwm_sel_enable, 2, 0);
2188 static SENSOR_DEVICE_ATTR_2(pwm4_stop_output_enable, S_IWUSR | S_IRUGO,
2189 show_pwm_sel_enable, store_pwm_sel_enable, 3, 0);
2190 static SENSOR_DEVICE_ATTR_2(pwm5_stop_output_enable, S_IWUSR | S_IRUGO,
2191 show_pwm_sel_enable, store_pwm_sel_enable, 4, 0);
2193 static SENSOR_DEVICE_ATTR_2(pwm1_weight_enable, S_IWUSR | S_IRUGO,
2194 show_pwm_sel_enable, store_pwm_sel_enable, 0, 1);
2195 static SENSOR_DEVICE_ATTR_2(pwm2_weight_enable, S_IWUSR | S_IRUGO,
2196 show_pwm_sel_enable, store_pwm_sel_enable, 1, 1);
2197 static SENSOR_DEVICE_ATTR_2(pwm3_weight_enable, S_IWUSR | S_IRUGO,
2198 show_pwm_sel_enable, store_pwm_sel_enable, 2, 1);
2199 static SENSOR_DEVICE_ATTR_2(pwm4_weight_enable, S_IWUSR | S_IRUGO,
2200 show_pwm_sel_enable, store_pwm_sel_enable, 3, 1);
2201 static SENSOR_DEVICE_ATTR_2(pwm5_weight_enable, S_IWUSR | S_IRUGO,
2202 show_pwm_sel_enable, store_pwm_sel_enable, 4, 1);
2204 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_sel, S_IWUSR | S_IRUGO,
2205 show_pwm_temp_sel, store_pwm_temp_sel, 0, 1);
2206 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_sel, S_IWUSR | S_IRUGO,
2207 show_pwm_temp_sel, store_pwm_temp_sel, 1, 1);
2208 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_sel, S_IWUSR | S_IRUGO,
2209 show_pwm_temp_sel, store_pwm_temp_sel, 2, 1);
2210 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_sel, S_IWUSR | S_IRUGO,
2211 show_pwm_temp_sel, store_pwm_temp_sel, 3, 1);
2212 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_sel, S_IWUSR | S_IRUGO,
2213 show_pwm_temp_sel, store_pwm_temp_sel, 4, 1);
2215 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_step, S_IWUSR | S_IRUGO,
2216 show_weight_temp, store_weight_temp, 0, 0);
2217 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_step, S_IWUSR | S_IRUGO,
2218 show_weight_temp, store_weight_temp, 1, 0);
2219 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_step, S_IWUSR | S_IRUGO,
2220 show_weight_temp, store_weight_temp, 2, 0);
2221 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_step, S_IWUSR | S_IRUGO,
2222 show_weight_temp, store_weight_temp, 3, 0);
2223 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_step, S_IWUSR | S_IRUGO,
2224 show_weight_temp, store_weight_temp, 4, 0);
2226 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2227 show_weight_temp, store_weight_temp, 0, 1);
2228 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2229 show_weight_temp, store_weight_temp, 1, 1);
2230 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2231 show_weight_temp, store_weight_temp, 2, 1);
2232 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2233 show_weight_temp, store_weight_temp, 3, 1);
2234 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2235 show_weight_temp, store_weight_temp, 4, 1);
2237 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_step_base, S_IWUSR | S_IRUGO,
2238 show_weight_temp, store_weight_temp, 0, 2);
2239 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_step_base, S_IWUSR | S_IRUGO,
2240 show_weight_temp, store_weight_temp, 1, 2);
2241 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_step_base, S_IWUSR | S_IRUGO,
2242 show_weight_temp, store_weight_temp, 2, 2);
2243 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_step_base, S_IWUSR | S_IRUGO,
2244 show_weight_temp, store_weight_temp, 3, 2);
2245 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_step_base, S_IWUSR | S_IRUGO,
2246 show_weight_temp, store_weight_temp, 4, 2);
2248 static SENSOR_DEVICE_ATTR_2(pwm1_weight_duty_step, S_IWUSR | S_IRUGO,
2249 show_pwm, store_pwm, 0, 5);
2250 static SENSOR_DEVICE_ATTR_2(pwm2_weight_duty_step, S_IWUSR | S_IRUGO,
2251 show_pwm, store_pwm, 1, 5);
2252 static SENSOR_DEVICE_ATTR_2(pwm3_weight_duty_step, S_IWUSR | S_IRUGO,
2253 show_pwm, store_pwm, 2, 5);
2254 static SENSOR_DEVICE_ATTR_2(pwm4_weight_duty_step, S_IWUSR | S_IRUGO,
2255 show_pwm, store_pwm, 3, 5);
2256 static SENSOR_DEVICE_ATTR_2(pwm5_weight_duty_step, S_IWUSR | S_IRUGO,
2257 show_pwm, store_pwm, 4, 5);
2259 /* duty_base is not supported on all chips */
2260 static struct sensor_device_attribute_2 sda_weight_duty_base[] = {
2261 SENSOR_ATTR_2(pwm1_weight_duty_base, S_IWUSR | S_IRUGO,
2262 show_pwm, store_pwm, 0, 6),
2263 SENSOR_ATTR_2(pwm2_weight_duty_base, S_IWUSR | S_IRUGO,
2264 show_pwm, store_pwm, 1, 6),
2265 SENSOR_ATTR_2(pwm3_weight_duty_base, S_IWUSR | S_IRUGO,
2266 show_pwm, store_pwm, 2, 6),
2267 SENSOR_ATTR_2(pwm4_weight_duty_base, S_IWUSR | S_IRUGO,
2268 show_pwm, store_pwm, 3, 6),
2269 SENSOR_ATTR_2(pwm5_weight_duty_base, S_IWUSR | S_IRUGO,
2270 show_pwm, store_pwm, 4, 6),
2274 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2276 struct nct6775_data *data = nct6775_update_device(dev);
2277 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2279 int index = sattr->index;
2281 return sprintf(buf, "%d\n",
2282 step_time_from_reg(data->fan_time[index][nr],
2283 data->pwm_mode[nr]));
2287 store_fan_time(struct device *dev, struct device_attribute *attr,
2288 const char *buf, size_t count)
2290 struct nct6775_data *data = dev_get_drvdata(dev);
2291 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2293 int index = sattr->index;
2297 err = kstrtoul(buf, 10, &val);
2301 val = step_time_to_reg(val, data->pwm_mode[nr]);
2302 mutex_lock(&data->update_lock);
2303 data->fan_time[index][nr] = val;
2304 nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2305 mutex_unlock(&data->update_lock);
2310 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2312 struct nct6775_data *data = dev_get_drvdata(dev);
2314 return sprintf(buf, "%s\n", data->name);
2317 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2319 static SENSOR_DEVICE_ATTR_2(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2320 store_fan_time, 0, 0);
2321 static SENSOR_DEVICE_ATTR_2(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2322 store_fan_time, 1, 0);
2323 static SENSOR_DEVICE_ATTR_2(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2324 store_fan_time, 2, 0);
2325 static SENSOR_DEVICE_ATTR_2(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2326 store_fan_time, 3, 0);
2327 static SENSOR_DEVICE_ATTR_2(pwm5_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2328 store_fan_time, 4, 0);
2330 static SENSOR_DEVICE_ATTR_2(pwm1_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2331 store_fan_time, 0, 1);
2332 static SENSOR_DEVICE_ATTR_2(pwm2_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2333 store_fan_time, 1, 1);
2334 static SENSOR_DEVICE_ATTR_2(pwm3_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2335 store_fan_time, 2, 1);
2336 static SENSOR_DEVICE_ATTR_2(pwm4_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2337 store_fan_time, 3, 1);
2338 static SENSOR_DEVICE_ATTR_2(pwm5_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2339 store_fan_time, 4, 1);
2341 static SENSOR_DEVICE_ATTR_2(pwm1_step_down_time, S_IWUSR | S_IRUGO,
2342 show_fan_time, store_fan_time, 0, 2);
2343 static SENSOR_DEVICE_ATTR_2(pwm2_step_down_time, S_IWUSR | S_IRUGO,
2344 show_fan_time, store_fan_time, 1, 2);
2345 static SENSOR_DEVICE_ATTR_2(pwm3_step_down_time, S_IWUSR | S_IRUGO,
2346 show_fan_time, store_fan_time, 2, 2);
2347 static SENSOR_DEVICE_ATTR_2(pwm4_step_down_time, S_IWUSR | S_IRUGO,
2348 show_fan_time, store_fan_time, 3, 2);
2349 static SENSOR_DEVICE_ATTR_2(pwm5_step_down_time, S_IWUSR | S_IRUGO,
2350 show_fan_time, store_fan_time, 4, 2);
2352 static SENSOR_DEVICE_ATTR_2(pwm1_start_output, S_IWUSR | S_IRUGO, show_pwm,
2354 static SENSOR_DEVICE_ATTR_2(pwm2_start_output, S_IWUSR | S_IRUGO, show_pwm,
2356 static SENSOR_DEVICE_ATTR_2(pwm3_start_output, S_IWUSR | S_IRUGO, show_pwm,
2358 static SENSOR_DEVICE_ATTR_2(pwm4_start_output, S_IWUSR | S_IRUGO, show_pwm,
2360 static SENSOR_DEVICE_ATTR_2(pwm5_start_output, S_IWUSR | S_IRUGO, show_pwm,
2363 static SENSOR_DEVICE_ATTR_2(pwm1_stop_output, S_IWUSR | S_IRUGO, show_pwm,
2365 static SENSOR_DEVICE_ATTR_2(pwm2_stop_output, S_IWUSR | S_IRUGO, show_pwm,
2367 static SENSOR_DEVICE_ATTR_2(pwm3_stop_output, S_IWUSR | S_IRUGO, show_pwm,
2369 static SENSOR_DEVICE_ATTR_2(pwm4_stop_output, S_IWUSR | S_IRUGO, show_pwm,
2371 static SENSOR_DEVICE_ATTR_2(pwm5_stop_output, S_IWUSR | S_IRUGO, show_pwm,
2374 /* max_output is not supported on all chips */
2375 static struct sensor_device_attribute_2 sda_max_output[] = {
2376 SENSOR_ATTR_2(pwm1_max_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2378 SENSOR_ATTR_2(pwm2_max_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2380 SENSOR_ATTR_2(pwm3_max_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2382 SENSOR_ATTR_2(pwm4_max_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2384 SENSOR_ATTR_2(pwm5_max_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2388 /* step_output is not supported on all chips */
2389 static struct sensor_device_attribute_2 sda_step_output[] = {
2390 SENSOR_ATTR_2(pwm1_step_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2392 SENSOR_ATTR_2(pwm2_step_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2394 SENSOR_ATTR_2(pwm3_step_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2396 SENSOR_ATTR_2(pwm4_step_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2398 SENSOR_ATTR_2(pwm5_step_output, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2402 static struct attribute *nct6775_attributes_pwm[5][19] = {
2404 &sensor_dev_attr_pwm1.dev_attr.attr,
2405 &sensor_dev_attr_pwm1_mode.dev_attr.attr,
2406 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2407 &sensor_dev_attr_pwm1_stop_output_enable.dev_attr.attr,
2408 &sensor_dev_attr_pwm1_weight_enable.dev_attr.attr,
2409 &sensor_dev_attr_pwm1_temp_sel.dev_attr.attr,
2410 &sensor_dev_attr_pwm1_target.dev_attr.attr,
2411 &sensor_dev_attr_pwm1_stop_time.dev_attr.attr,
2412 &sensor_dev_attr_pwm1_step_up_time.dev_attr.attr,
2413 &sensor_dev_attr_pwm1_step_down_time.dev_attr.attr,
2414 &sensor_dev_attr_pwm1_start_output.dev_attr.attr,
2415 &sensor_dev_attr_pwm1_stop_output.dev_attr.attr,
2416 &sensor_dev_attr_pwm1_weight_temp_sel.dev_attr.attr,
2417 &sensor_dev_attr_pwm1_weight_temp_step.dev_attr.attr,
2418 &sensor_dev_attr_pwm1_weight_temp_step_tol.dev_attr.attr,
2419 &sensor_dev_attr_pwm1_weight_temp_step_base.dev_attr.attr,
2420 &sensor_dev_attr_pwm1_weight_duty_step.dev_attr.attr,
2424 &sensor_dev_attr_pwm2.dev_attr.attr,
2425 &sensor_dev_attr_pwm2_mode.dev_attr.attr,
2426 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2427 &sensor_dev_attr_pwm2_stop_output_enable.dev_attr.attr,
2428 &sensor_dev_attr_pwm2_weight_enable.dev_attr.attr,
2429 &sensor_dev_attr_pwm2_temp_sel.dev_attr.attr,
2430 &sensor_dev_attr_pwm2_target.dev_attr.attr,
2431 &sensor_dev_attr_pwm2_stop_time.dev_attr.attr,
2432 &sensor_dev_attr_pwm2_step_up_time.dev_attr.attr,
2433 &sensor_dev_attr_pwm2_step_down_time.dev_attr.attr,
2434 &sensor_dev_attr_pwm2_start_output.dev_attr.attr,
2435 &sensor_dev_attr_pwm2_stop_output.dev_attr.attr,
2436 &sensor_dev_attr_pwm2_weight_temp_sel.dev_attr.attr,
2437 &sensor_dev_attr_pwm2_weight_temp_step.dev_attr.attr,
2438 &sensor_dev_attr_pwm2_weight_temp_step_tol.dev_attr.attr,
2439 &sensor_dev_attr_pwm2_weight_temp_step_base.dev_attr.attr,
2440 &sensor_dev_attr_pwm2_weight_duty_step.dev_attr.attr,
2444 &sensor_dev_attr_pwm3.dev_attr.attr,
2445 &sensor_dev_attr_pwm3_mode.dev_attr.attr,
2446 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2447 &sensor_dev_attr_pwm3_stop_output_enable.dev_attr.attr,
2448 &sensor_dev_attr_pwm3_weight_enable.dev_attr.attr,
2449 &sensor_dev_attr_pwm3_temp_sel.dev_attr.attr,
2450 &sensor_dev_attr_pwm3_target.dev_attr.attr,
2451 &sensor_dev_attr_pwm3_stop_time.dev_attr.attr,
2452 &sensor_dev_attr_pwm3_step_up_time.dev_attr.attr,
2453 &sensor_dev_attr_pwm3_step_down_time.dev_attr.attr,
2454 &sensor_dev_attr_pwm3_start_output.dev_attr.attr,
2455 &sensor_dev_attr_pwm3_stop_output.dev_attr.attr,
2456 &sensor_dev_attr_pwm3_weight_temp_sel.dev_attr.attr,
2457 &sensor_dev_attr_pwm3_weight_temp_step.dev_attr.attr,
2458 &sensor_dev_attr_pwm3_weight_temp_step_tol.dev_attr.attr,
2459 &sensor_dev_attr_pwm3_weight_temp_step_base.dev_attr.attr,
2460 &sensor_dev_attr_pwm3_weight_duty_step.dev_attr.attr,
2464 &sensor_dev_attr_pwm4.dev_attr.attr,
2465 &sensor_dev_attr_pwm4_mode.dev_attr.attr,
2466 &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2467 &sensor_dev_attr_pwm4_stop_output_enable.dev_attr.attr,
2468 &sensor_dev_attr_pwm4_weight_enable.dev_attr.attr,
2469 &sensor_dev_attr_pwm4_temp_sel.dev_attr.attr,
2470 &sensor_dev_attr_pwm4_target.dev_attr.attr,
2471 &sensor_dev_attr_pwm4_stop_time.dev_attr.attr,
2472 &sensor_dev_attr_pwm4_step_up_time.dev_attr.attr,
2473 &sensor_dev_attr_pwm4_step_down_time.dev_attr.attr,
2474 &sensor_dev_attr_pwm4_start_output.dev_attr.attr,
2475 &sensor_dev_attr_pwm4_stop_output.dev_attr.attr,
2476 &sensor_dev_attr_pwm4_weight_temp_sel.dev_attr.attr,
2477 &sensor_dev_attr_pwm4_weight_temp_step.dev_attr.attr,
2478 &sensor_dev_attr_pwm4_weight_temp_step_tol.dev_attr.attr,
2479 &sensor_dev_attr_pwm4_weight_temp_step_base.dev_attr.attr,
2480 &sensor_dev_attr_pwm4_weight_duty_step.dev_attr.attr,
2484 &sensor_dev_attr_pwm5.dev_attr.attr,
2485 &sensor_dev_attr_pwm5_mode.dev_attr.attr,
2486 &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2487 &sensor_dev_attr_pwm5_stop_output_enable.dev_attr.attr,
2488 &sensor_dev_attr_pwm5_weight_enable.dev_attr.attr,
2489 &sensor_dev_attr_pwm5_temp_sel.dev_attr.attr,
2490 &sensor_dev_attr_pwm5_target.dev_attr.attr,
2491 &sensor_dev_attr_pwm5_stop_time.dev_attr.attr,
2492 &sensor_dev_attr_pwm5_step_up_time.dev_attr.attr,
2493 &sensor_dev_attr_pwm5_step_down_time.dev_attr.attr,
2494 &sensor_dev_attr_pwm5_start_output.dev_attr.attr,
2495 &sensor_dev_attr_pwm5_stop_output.dev_attr.attr,
2496 &sensor_dev_attr_pwm5_weight_temp_sel.dev_attr.attr,
2497 &sensor_dev_attr_pwm5_weight_temp_step.dev_attr.attr,
2498 &sensor_dev_attr_pwm5_weight_temp_step_tol.dev_attr.attr,
2499 &sensor_dev_attr_pwm5_weight_temp_step_base.dev_attr.attr,
2500 &sensor_dev_attr_pwm5_weight_duty_step.dev_attr.attr,
2505 static const struct attribute_group nct6775_group_pwm[5] = {
2506 { .attrs = nct6775_attributes_pwm[0] },
2507 { .attrs = nct6775_attributes_pwm[1] },
2508 { .attrs = nct6775_attributes_pwm[2] },
2509 { .attrs = nct6775_attributes_pwm[3] },
2510 { .attrs = nct6775_attributes_pwm[4] },
2514 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2516 struct nct6775_data *data = nct6775_update_device(dev);
2517 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2519 return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2523 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2524 const char *buf, size_t count)
2526 struct nct6775_data *data = dev_get_drvdata(dev);
2527 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2529 int point = sattr->index;
2534 err = kstrtoul(buf, 10, &val);
2540 if (point == data->auto_pwm_num) {
2541 if (data->kind != nct6775 && !val)
2543 if (data->kind != nct6779 && val)
2547 mutex_lock(&data->update_lock);
2548 data->auto_pwm[nr][point] = val;
2549 if (point < data->auto_pwm_num) {
2550 nct6775_write_value(data,
2551 NCT6775_AUTO_PWM(data, nr, point),
2552 data->auto_pwm[nr][point]);
2554 switch (data->kind) {
2556 /* disable if needed (pwm == 0) */
2557 reg = nct6775_read_value(data,
2558 NCT6775_REG_CRITICAL_ENAB[nr]);
2563 nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2567 break; /* always enabled, nothing to do */
2569 nct6775_write_value(data, NCT6779_REG_CRITICAL_PWM[nr],
2571 reg = nct6775_read_value(data,
2572 NCT6779_REG_CRITICAL_PWM_ENABLE[nr]);
2577 nct6775_write_value(data,
2578 NCT6779_REG_CRITICAL_PWM_ENABLE[nr],
2583 mutex_unlock(&data->update_lock);
2588 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2590 struct nct6775_data *data = nct6775_update_device(dev);
2591 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2593 int point = sattr->index;
2596 * We don't know for sure if the temperature is signed or unsigned.
2597 * Assume it is unsigned.
2599 return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2603 store_auto_temp(struct device *dev, struct device_attribute *attr,
2604 const char *buf, size_t count)
2606 struct nct6775_data *data = dev_get_drvdata(dev);
2607 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2609 int point = sattr->index;
2613 err = kstrtoul(buf, 10, &val);
2619 mutex_lock(&data->update_lock);
2620 data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2621 if (point < data->auto_pwm_num) {
2622 nct6775_write_value(data,
2623 NCT6775_AUTO_TEMP(data, nr, point),
2624 data->auto_temp[nr][point]);
2626 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2627 data->auto_temp[nr][point]);
2629 mutex_unlock(&data->update_lock);
2634 * The number of auto-point trip points is chip dependent.
2635 * Need to check support while generating/removing attribute files.
2637 static struct sensor_device_attribute_2 sda_auto_pwm_arrays[] = {
2638 SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IWUSR | S_IRUGO,
2639 show_auto_pwm, store_auto_pwm, 0, 0),
2640 SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IWUSR | S_IRUGO,
2641 show_auto_temp, store_auto_temp, 0, 0),
2642 SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IWUSR | S_IRUGO,
2643 show_auto_temp_hyst, store_auto_temp_hyst, 0, 0),
2644 SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IWUSR | S_IRUGO,
2645 show_auto_pwm, store_auto_pwm, 0, 1),
2646 SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IWUSR | S_IRUGO,
2647 show_auto_temp, store_auto_temp, 0, 1),
2648 SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IWUSR | S_IRUGO,
2649 show_auto_temp_hyst, store_auto_temp_hyst, 0, 1),
2650 SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IWUSR | S_IRUGO,
2651 show_auto_pwm, store_auto_pwm, 0, 2),
2652 SENSOR_ATTR_2(pwm1_auto_point3_temp, S_IWUSR | S_IRUGO,
2653 show_auto_temp, store_auto_temp, 0, 2),
2654 SENSOR_ATTR_2(pwm1_auto_point3_temp_hyst, S_IWUSR | S_IRUGO,
2655 show_auto_temp_hyst, store_auto_temp_hyst, 0, 2),
2656 SENSOR_ATTR_2(pwm1_auto_point4_pwm, S_IWUSR | S_IRUGO,
2657 show_auto_pwm, store_auto_pwm, 0, 3),
2658 SENSOR_ATTR_2(pwm1_auto_point4_temp, S_IWUSR | S_IRUGO,
2659 show_auto_temp, store_auto_temp, 0, 3),
2660 SENSOR_ATTR_2(pwm1_auto_point4_temp_hyst, S_IWUSR | S_IRUGO,
2661 show_auto_temp_hyst, store_auto_temp_hyst, 0, 3),
2662 SENSOR_ATTR_2(pwm1_auto_point5_pwm, S_IWUSR | S_IRUGO,
2663 show_auto_pwm, store_auto_pwm, 0, 4),
2664 SENSOR_ATTR_2(pwm1_auto_point5_temp, S_IWUSR | S_IRUGO,
2665 show_auto_temp, store_auto_temp, 0, 4),
2666 SENSOR_ATTR_2(pwm1_auto_point5_temp_hyst, S_IWUSR | S_IRUGO,
2667 show_auto_temp_hyst, store_auto_temp_hyst, 0, 4),
2668 SENSOR_ATTR_2(pwm1_auto_point6_pwm, S_IWUSR | S_IRUGO,
2669 show_auto_pwm, store_auto_pwm, 0, 5),
2670 SENSOR_ATTR_2(pwm1_auto_point6_temp, S_IWUSR | S_IRUGO,
2671 show_auto_temp, store_auto_temp, 0, 5),
2672 SENSOR_ATTR_2(pwm1_auto_point6_temp_hyst, S_IWUSR | S_IRUGO,
2673 show_auto_temp_hyst, store_auto_temp_hyst, 0, 5),
2674 SENSOR_ATTR_2(pwm1_auto_point7_pwm, S_IWUSR | S_IRUGO,
2675 show_auto_pwm, store_auto_pwm, 0, 6),
2676 SENSOR_ATTR_2(pwm1_auto_point7_temp, S_IWUSR | S_IRUGO,
2677 show_auto_temp, store_auto_temp, 0, 6),
2678 SENSOR_ATTR_2(pwm1_auto_point7_temp_hyst, S_IWUSR | S_IRUGO,
2679 show_auto_temp_hyst, store_auto_temp_hyst, 0, 6),
2681 SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IWUSR | S_IRUGO,
2682 show_auto_pwm, store_auto_pwm, 1, 0),
2683 SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IWUSR | S_IRUGO,
2684 show_auto_temp, store_auto_temp, 1, 0),
2685 SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IWUSR | S_IRUGO,
2686 show_auto_temp_hyst, store_auto_temp_hyst, 1, 0),
2687 SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IWUSR | S_IRUGO,
2688 show_auto_pwm, store_auto_pwm, 1, 1),
2689 SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IWUSR | S_IRUGO,
2690 show_auto_temp, store_auto_temp, 1, 1),
2691 SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IWUSR | S_IRUGO,
2692 show_auto_temp_hyst, store_auto_temp_hyst, 1, 1),
2693 SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IWUSR | S_IRUGO,
2694 show_auto_pwm, store_auto_pwm, 1, 2),
2695 SENSOR_ATTR_2(pwm2_auto_point3_temp, S_IWUSR | S_IRUGO,
2696 show_auto_temp, store_auto_temp, 1, 2),
2697 SENSOR_ATTR_2(pwm2_auto_point3_temp_hyst, S_IWUSR | S_IRUGO,
2698 show_auto_temp_hyst, store_auto_temp_hyst, 1, 2),
2699 SENSOR_ATTR_2(pwm2_auto_point4_pwm, S_IWUSR | S_IRUGO,
2700 show_auto_pwm, store_auto_pwm, 1, 3),
2701 SENSOR_ATTR_2(pwm2_auto_point4_temp, S_IWUSR | S_IRUGO,
2702 show_auto_temp, store_auto_temp, 1, 3),
2703 SENSOR_ATTR_2(pwm2_auto_point4_temp_hyst, S_IWUSR | S_IRUGO,
2704 show_auto_temp_hyst, store_auto_temp_hyst, 1, 3),
2705 SENSOR_ATTR_2(pwm2_auto_point5_pwm, S_IWUSR | S_IRUGO,
2706 show_auto_pwm, store_auto_pwm, 1, 4),
2707 SENSOR_ATTR_2(pwm2_auto_point5_temp, S_IWUSR | S_IRUGO,
2708 show_auto_temp, store_auto_temp, 1, 4),
2709 SENSOR_ATTR_2(pwm2_auto_point5_temp_hyst, S_IWUSR | S_IRUGO,
2710 show_auto_temp_hyst, store_auto_temp_hyst, 1, 4),
2711 SENSOR_ATTR_2(pwm2_auto_point6_pwm, S_IWUSR | S_IRUGO,
2712 show_auto_pwm, store_auto_pwm, 1, 5),
2713 SENSOR_ATTR_2(pwm2_auto_point6_temp, S_IWUSR | S_IRUGO,
2714 show_auto_temp, store_auto_temp, 1, 5),
2715 SENSOR_ATTR_2(pwm2_auto_point6_temp_hyst, S_IWUSR | S_IRUGO,
2716 show_auto_temp_hyst, store_auto_temp_hyst, 1, 5),
2717 SENSOR_ATTR_2(pwm2_auto_point7_pwm, S_IWUSR | S_IRUGO,
2718 show_auto_pwm, store_auto_pwm, 1, 6),
2719 SENSOR_ATTR_2(pwm2_auto_point7_temp, S_IWUSR | S_IRUGO,
2720 show_auto_temp, store_auto_temp, 1, 6),
2721 SENSOR_ATTR_2(pwm2_auto_point7_temp_hyst, S_IWUSR | S_IRUGO,
2722 show_auto_temp_hyst, store_auto_temp_hyst, 1, 6),
2724 SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IWUSR | S_IRUGO,
2725 show_auto_pwm, store_auto_pwm, 2, 0),
2726 SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IWUSR | S_IRUGO,
2727 show_auto_temp, store_auto_temp, 2, 0),
2728 SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IWUSR | S_IRUGO,
2729 show_auto_temp_hyst, store_auto_temp_hyst, 2, 0),
2730 SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IWUSR | S_IRUGO,
2731 show_auto_pwm, store_auto_pwm, 2, 1),
2732 SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IWUSR | S_IRUGO,
2733 show_auto_temp, store_auto_temp, 2, 1),
2734 SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IWUSR | S_IRUGO,
2735 show_auto_temp_hyst, store_auto_temp_hyst, 2, 1),
2736 SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IWUSR | S_IRUGO,
2737 show_auto_pwm, store_auto_pwm, 2, 2),
2738 SENSOR_ATTR_2(pwm3_auto_point3_temp, S_IWUSR | S_IRUGO,
2739 show_auto_temp, store_auto_temp, 2, 2),
2740 SENSOR_ATTR_2(pwm3_auto_point3_temp_hyst, S_IWUSR | S_IRUGO,
2741 show_auto_temp_hyst, store_auto_temp_hyst, 2, 2),
2742 SENSOR_ATTR_2(pwm3_auto_point4_pwm, S_IWUSR | S_IRUGO,
2743 show_auto_pwm, store_auto_pwm, 2, 3),
2744 SENSOR_ATTR_2(pwm3_auto_point4_temp, S_IWUSR | S_IRUGO,
2745 show_auto_temp, store_auto_temp, 2, 3),
2746 SENSOR_ATTR_2(pwm3_auto_point4_temp_hyst, S_IWUSR | S_IRUGO,
2747 show_auto_temp_hyst, store_auto_temp_hyst, 2, 3),
2748 SENSOR_ATTR_2(pwm3_auto_point5_pwm, S_IWUSR | S_IRUGO,
2749 show_auto_pwm, store_auto_pwm, 2, 4),
2750 SENSOR_ATTR_2(pwm3_auto_point5_temp, S_IWUSR | S_IRUGO,
2751 show_auto_temp, store_auto_temp, 2, 4),
2752 SENSOR_ATTR_2(pwm3_auto_point5_temp_hyst, S_IWUSR | S_IRUGO,
2753 show_auto_temp_hyst, store_auto_temp_hyst, 2, 4),
2754 SENSOR_ATTR_2(pwm3_auto_point6_pwm, S_IWUSR | S_IRUGO,
2755 show_auto_pwm, store_auto_pwm, 2, 5),
2756 SENSOR_ATTR_2(pwm3_auto_point6_temp, S_IWUSR | S_IRUGO,
2757 show_auto_temp, store_auto_temp, 2, 5),
2758 SENSOR_ATTR_2(pwm3_auto_point6_temp_hyst, S_IWUSR | S_IRUGO,
2759 show_auto_temp_hyst, store_auto_temp_hyst, 2, 5),
2760 SENSOR_ATTR_2(pwm3_auto_point7_pwm, S_IWUSR | S_IRUGO,
2761 show_auto_pwm, store_auto_pwm, 2, 6),
2762 SENSOR_ATTR_2(pwm3_auto_point7_temp, S_IWUSR | S_IRUGO,
2763 show_auto_temp, store_auto_temp, 2, 6),
2764 SENSOR_ATTR_2(pwm3_auto_point7_temp_hyst, S_IWUSR | S_IRUGO,
2765 show_auto_temp_hyst, store_auto_temp_hyst, 2, 6),
2767 SENSOR_ATTR_2(pwm4_auto_point1_pwm, S_IWUSR | S_IRUGO,
2768 show_auto_pwm, store_auto_pwm, 3, 0),
2769 SENSOR_ATTR_2(pwm4_auto_point1_temp, S_IWUSR | S_IRUGO,
2770 show_auto_temp, store_auto_temp, 3, 0),
2771 SENSOR_ATTR_2(pwm4_auto_point1_temp_hyst, S_IWUSR | S_IRUGO,
2772 show_auto_temp_hyst, store_auto_temp_hyst, 3, 0),
2773 SENSOR_ATTR_2(pwm4_auto_point2_pwm, S_IWUSR | S_IRUGO,
2774 show_auto_pwm, store_auto_pwm, 3, 1),
2775 SENSOR_ATTR_2(pwm4_auto_point2_temp, S_IWUSR | S_IRUGO,
2776 show_auto_temp, store_auto_temp, 3, 1),
2777 SENSOR_ATTR_2(pwm4_auto_point2_temp_hyst, S_IWUSR | S_IRUGO,
2778 show_auto_temp_hyst, store_auto_temp_hyst, 3, 1),
2779 SENSOR_ATTR_2(pwm4_auto_point3_pwm, S_IWUSR | S_IRUGO,
2780 show_auto_pwm, store_auto_pwm, 3, 2),
2781 SENSOR_ATTR_2(pwm4_auto_point3_temp, S_IWUSR | S_IRUGO,
2782 show_auto_temp, store_auto_temp, 3, 2),
2783 SENSOR_ATTR_2(pwm4_auto_point3_temp_hyst, S_IWUSR | S_IRUGO,
2784 show_auto_temp_hyst, store_auto_temp_hyst, 3, 2),
2785 SENSOR_ATTR_2(pwm4_auto_point4_pwm, S_IWUSR | S_IRUGO,
2786 show_auto_pwm, store_auto_pwm, 3, 3),
2787 SENSOR_ATTR_2(pwm4_auto_point4_temp, S_IWUSR | S_IRUGO,
2788 show_auto_temp, store_auto_temp, 3, 3),
2789 SENSOR_ATTR_2(pwm4_auto_point4_temp_hyst, S_IWUSR | S_IRUGO,
2790 show_auto_temp_hyst, store_auto_temp_hyst, 3, 3),
2791 SENSOR_ATTR_2(pwm4_auto_point5_pwm, S_IWUSR | S_IRUGO,
2792 show_auto_pwm, store_auto_pwm, 3, 4),
2793 SENSOR_ATTR_2(pwm4_auto_point5_temp, S_IWUSR | S_IRUGO,
2794 show_auto_temp, store_auto_temp, 3, 4),
2795 SENSOR_ATTR_2(pwm4_auto_point5_temp_hyst, S_IWUSR | S_IRUGO,
2796 show_auto_temp_hyst, store_auto_temp_hyst, 3, 4),
2797 SENSOR_ATTR_2(pwm4_auto_point6_pwm, S_IWUSR | S_IRUGO,
2798 show_auto_pwm, store_auto_pwm, 3, 5),
2799 SENSOR_ATTR_2(pwm4_auto_point6_temp, S_IWUSR | S_IRUGO,
2800 show_auto_temp, store_auto_temp, 3, 5),
2801 SENSOR_ATTR_2(pwm4_auto_point6_temp_hyst, S_IWUSR | S_IRUGO,
2802 show_auto_temp_hyst, store_auto_temp_hyst, 3, 5),
2803 SENSOR_ATTR_2(pwm4_auto_point7_pwm, S_IWUSR | S_IRUGO,
2804 show_auto_pwm, store_auto_pwm, 3, 6),
2805 SENSOR_ATTR_2(pwm4_auto_point7_temp, S_IWUSR | S_IRUGO,
2806 show_auto_temp, store_auto_temp, 3, 6),
2807 SENSOR_ATTR_2(pwm4_auto_point7_temp_hyst, S_IWUSR | S_IRUGO,
2808 show_auto_temp_hyst, store_auto_temp_hyst, 3, 6),
2810 SENSOR_ATTR_2(pwm5_auto_point1_pwm, S_IWUSR | S_IRUGO,
2811 show_auto_pwm, store_auto_pwm, 4, 0),
2812 SENSOR_ATTR_2(pwm5_auto_point1_temp, S_IWUSR | S_IRUGO,
2813 show_auto_temp, store_auto_temp, 4, 0),
2814 SENSOR_ATTR_2(pwm5_auto_point1_temp_hyst, S_IWUSR | S_IRUGO,
2815 show_auto_temp_hyst, store_auto_temp_hyst, 4, 0),
2816 SENSOR_ATTR_2(pwm5_auto_point2_pwm, S_IWUSR | S_IRUGO,
2817 show_auto_pwm, store_auto_pwm, 4, 1),
2818 SENSOR_ATTR_2(pwm5_auto_point2_temp, S_IWUSR | S_IRUGO,
2819 show_auto_temp, store_auto_temp, 4, 1),
2820 SENSOR_ATTR_2(pwm5_auto_point2_temp_hyst, S_IWUSR | S_IRUGO,
2821 show_auto_temp_hyst, store_auto_temp_hyst, 4, 1),
2822 SENSOR_ATTR_2(pwm5_auto_point3_pwm, S_IWUSR | S_IRUGO,
2823 show_auto_pwm, store_auto_pwm, 4, 2),
2824 SENSOR_ATTR_2(pwm5_auto_point3_temp, S_IWUSR | S_IRUGO,
2825 show_auto_temp, store_auto_temp, 4, 2),
2826 SENSOR_ATTR_2(pwm5_auto_point3_temp_hyst, S_IWUSR | S_IRUGO,
2827 show_auto_temp_hyst, store_auto_temp_hyst, 4, 2),
2828 SENSOR_ATTR_2(pwm5_auto_point4_pwm, S_IWUSR | S_IRUGO,
2829 show_auto_pwm, store_auto_pwm, 4, 3),
2830 SENSOR_ATTR_2(pwm5_auto_point4_temp, S_IWUSR | S_IRUGO,
2831 show_auto_temp, store_auto_temp, 4, 3),
2832 SENSOR_ATTR_2(pwm5_auto_point4_temp_hyst, S_IWUSR | S_IRUGO,
2833 show_auto_temp_hyst, store_auto_temp_hyst, 4, 3),
2834 SENSOR_ATTR_2(pwm5_auto_point5_pwm, S_IWUSR | S_IRUGO,
2835 show_auto_pwm, store_auto_pwm, 4, 4),
2836 SENSOR_ATTR_2(pwm5_auto_point5_temp, S_IWUSR | S_IRUGO,
2837 show_auto_temp, store_auto_temp, 4, 4),
2838 SENSOR_ATTR_2(pwm5_auto_point5_temp_hyst, S_IWUSR | S_IRUGO,
2839 show_auto_temp_hyst, store_auto_temp_hyst, 4, 4),
2840 SENSOR_ATTR_2(pwm5_auto_point6_pwm, S_IWUSR | S_IRUGO,
2841 show_auto_pwm, store_auto_pwm, 4, 5),
2842 SENSOR_ATTR_2(pwm5_auto_point6_temp, S_IWUSR | S_IRUGO,
2843 show_auto_temp, store_auto_temp, 4, 5),
2844 SENSOR_ATTR_2(pwm5_auto_point6_temp_hyst, S_IWUSR | S_IRUGO,
2845 show_auto_temp_hyst, store_auto_temp_hyst, 4, 5),
2846 SENSOR_ATTR_2(pwm5_auto_point7_pwm, S_IWUSR | S_IRUGO,
2847 show_auto_pwm, store_auto_pwm, 4, 6),
2848 SENSOR_ATTR_2(pwm5_auto_point7_temp, S_IWUSR | S_IRUGO,
2849 show_auto_temp, store_auto_temp, 4, 6),
2850 SENSOR_ATTR_2(pwm5_auto_point7_temp_hyst, S_IWUSR | S_IRUGO,
2851 show_auto_temp_hyst, store_auto_temp_hyst, 4, 6),
2855 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
2857 struct nct6775_data *data = dev_get_drvdata(dev);
2858 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
2861 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
2863 /* Case open detection */
2866 clear_caseopen(struct device *dev, struct device_attribute *attr,
2867 const char *buf, size_t count)
2869 struct nct6775_data *data = dev_get_drvdata(dev);
2870 struct nct6775_sio_data *sio_data = dev->platform_data;
2871 int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
2876 if (kstrtoul(buf, 10, &val) || val != 0)
2879 mutex_lock(&data->update_lock);
2882 * Use CR registers to clear caseopen status.
2883 * The CR registers are the same for all chips, and not all chips
2884 * support clearing the caseopen status through "regular" registers.
2886 ret = superio_enter(sio_data->sioreg);
2890 superio_select(sio_data->sioreg, NCT6775_LD_ACPI);
2891 reg = superio_inb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
2892 reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
2893 superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
2894 reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
2895 superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
2896 superio_exit(sio_data->sioreg);
2898 data->valid = 0; /* Force cache refresh */
2901 mutex_unlock(&data->update_lock);
2906 static struct sensor_device_attribute sda_caseopen[] = {
2907 SENSOR_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
2908 clear_caseopen, INTRUSION_ALARM_BASE),
2909 SENSOR_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
2910 clear_caseopen, INTRUSION_ALARM_BASE + 1),
2914 * Driver and device management
2917 static void nct6775_device_remove_files(struct device *dev)
2920 * some entries in the following arrays may not have been used in
2921 * device_create_file(), but device_remove_file() will ignore them
2924 struct nct6775_data *data = dev_get_drvdata(dev);
2926 for (i = 0; i < data->pwm_num; i++)
2927 sysfs_remove_group(&dev->kobj, &nct6775_group_pwm[i]);
2929 for (i = 0; i < ARRAY_SIZE(sda_max_output); i++)
2930 device_remove_file(dev, &sda_max_output[i].dev_attr);
2932 for (i = 0; i < ARRAY_SIZE(sda_step_output); i++)
2933 device_remove_file(dev, &sda_max_output[i].dev_attr);
2935 for (i = 0; i < ARRAY_SIZE(sda_weight_duty_base); i++)
2936 device_remove_file(dev, &sda_weight_duty_base[i].dev_attr);
2938 for (i = 0; i < ARRAY_SIZE(sda_auto_pwm_arrays); i++)
2939 device_remove_file(dev, &sda_auto_pwm_arrays[i].dev_attr);
2941 for (i = 0; i < data->in_num; i++)
2942 sysfs_remove_group(&dev->kobj, &nct6775_group_in[i]);
2944 for (i = 0; i < 5; i++) {
2945 device_remove_file(dev, &sda_fan_input[i].dev_attr);
2946 device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
2947 device_remove_file(dev, &sda_fan_div[i].dev_attr);
2948 device_remove_file(dev, &sda_fan_min[i].dev_attr);
2950 for (i = 0; i < NUM_TEMP; i++) {
2951 if (!(data->have_temp & (1 << i)))
2953 device_remove_file(dev, &sda_temp_input[i].dev_attr);
2954 device_remove_file(dev, &sda_temp_label[i].dev_attr);
2955 device_remove_file(dev, &sda_temp_max[i].dev_attr);
2956 device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);
2957 device_remove_file(dev, &sda_temp_crit[i].dev_attr);
2958 if (!(data->have_temp_fixed & (1 << i)))
2960 device_remove_file(dev, &sda_temp_type[i].dev_attr);
2961 device_remove_file(dev, &sda_temp_offset[i].dev_attr);
2962 if (i >= NUM_TEMP_ALARM)
2964 device_remove_file(dev, &sda_temp_alarm[i].dev_attr);
2967 device_remove_file(dev, &sda_caseopen[0].dev_attr);
2968 device_remove_file(dev, &sda_caseopen[1].dev_attr);
2970 device_remove_file(dev, &dev_attr_name);
2971 device_remove_file(dev, &dev_attr_cpu0_vid);
2974 /* Get the monitoring functions started */
2975 static inline void __devinit nct6775_init_device(struct nct6775_data *data)
2980 /* Start monitoring if needed */
2981 if (data->REG_CONFIG) {
2982 tmp = nct6775_read_value(data, data->REG_CONFIG);
2984 nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
2987 /* Enable temperature sensors if needed */
2988 for (i = 0; i < NUM_TEMP; i++) {
2989 if (!(data->have_temp & (1 << i)))
2991 if (!data->reg_temp_config[i])
2993 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
2995 nct6775_write_value(data, data->reg_temp_config[i],
2999 /* Enable VBAT monitoring if needed */
3000 tmp = nct6775_read_value(data, data->REG_VBAT);
3002 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3004 diode = nct6775_read_value(data, data->REG_DIODE);
3006 for (i = 0; i < data->temp_fixed_num; i++) {
3007 if (!(data->have_temp_fixed & (1 << i)))
3009 if ((tmp & (0x02 << i))) /* diode */
3010 data->temp_type[i] = 3 - ((diode >> i) & 0x02);
3011 else /* thermistor */
3012 data->temp_type[i] = 4;
3016 static int __devinit
3017 nct6775_check_fan_inputs(const struct nct6775_sio_data *sio_data,
3018 struct nct6775_data *data)
3021 bool fan3pin, fan3min, fan4pin, fan4min, fan5pin;
3022 bool pwm3pin, pwm4pin, pwm5pin;
3025 ret = superio_enter(sio_data->sioreg);
3029 /* fan4 and fan5 share some pins with the GPIO and serial flash */
3030 if (data->kind == nct6775) {
3031 regval = superio_inb(sio_data->sioreg, 0x2c);
3033 fan3pin = regval & (1 << 6);
3035 pwm3pin = regval & (1 << 7);
3037 /* On NCT6775, fan4 shares pins with the fdc interface */
3038 fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
3043 } else if (data->kind == nct6776) {
3044 bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80;
3046 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3047 regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE);
3052 fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
3057 fan4pin = superio_inb(sio_data->sioreg, 0x1C) & 0x01;
3062 fan5pin = superio_inb(sio_data->sioreg, 0x1C) & 0x02;
3069 } else { /* NCT6779D */
3070 regval = superio_inb(sio_data->sioreg, 0x1c);
3072 fan3pin = !(regval & (1 << 5));
3073 fan4pin = !(regval & (1 << 6));
3074 fan5pin = !(regval & (1 << 7));
3076 pwm3pin = !(regval & (1 << 0));
3077 pwm4pin = !(regval & (1 << 1));
3078 pwm5pin = !(regval & (1 << 2));
3084 superio_exit(sio_data->sioreg);
3086 data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
3087 data->has_fan |= fan3pin << 2;
3088 data->has_fan_min |= fan3min << 2;
3090 data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
3091 data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
3093 data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) | (pwm5pin << 4);
3098 static int __devinit nct6775_probe(struct platform_device *pdev)
3100 struct device *dev = &pdev->dev;
3101 struct nct6775_sio_data *sio_data = dev->platform_data;
3102 struct nct6775_data *data;
3103 struct resource *res;
3105 int src, mask, available;
3106 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3107 const u16 *reg_temp_alternate, *reg_temp_crit;
3110 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3111 if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3115 data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3120 data->kind = sio_data->kind;
3121 data->addr = res->start;
3122 mutex_init(&data->lock);
3123 mutex_init(&data->update_lock);
3124 data->name = nct6775_device_names[data->kind];
3125 platform_set_drvdata(pdev, data);
3127 switch (data->kind) {
3131 data->auto_pwm_num = 6;
3132 data->has_fan_div = true;
3133 data->temp_fixed_num = 3;
3135 data->ALARM_BITS = NCT6775_ALARM_BITS;
3137 data->fan_from_reg = fan_from_reg16;
3138 data->fan_from_reg_min = fan_from_reg8;
3140 data->temp_label = nct6775_temp_label;
3141 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3143 data->REG_CONFIG = NCT6775_REG_CONFIG;
3144 data->REG_VBAT = NCT6775_REG_VBAT;
3145 data->REG_DIODE = NCT6775_REG_DIODE;
3146 data->REG_VIN = NCT6775_REG_IN;
3147 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3148 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3149 data->REG_TARGET = NCT6775_REG_TARGET;
3150 data->REG_FAN = NCT6775_REG_FAN;
3151 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3152 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3153 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3154 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3155 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3156 data->REG_PWM[0] = NCT6775_REG_PWM;
3157 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3158 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3159 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3160 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3161 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3162 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3163 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3164 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3165 data->REG_TEMP_MON = NCT6775_REG_TEMP_MON;
3166 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3167 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3168 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3169 data->REG_CRITICAL_TEMP_TOLERANCE
3170 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3171 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3172 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3173 data->REG_TEMP_SEL[0] = NCT6775_REG_TEMP_SEL;
3174 data->REG_TEMP_SEL[1] = NCT6775_REG_WEIGHT_TEMP_SEL;
3175 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3176 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3177 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3178 data->REG_ALARM = NCT6775_REG_ALARM;
3180 reg_temp = NCT6775_REG_TEMP;
3181 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3182 reg_temp_over = NCT6775_REG_TEMP_OVER;
3183 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3184 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3185 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3186 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3192 data->auto_pwm_num = 4;
3193 data->has_fan_div = false;
3194 data->temp_fixed_num = 3;
3196 data->ALARM_BITS = NCT6776_ALARM_BITS;
3198 data->fan_from_reg = fan_from_reg13;
3199 data->fan_from_reg_min = fan_from_reg13;
3201 data->temp_label = nct6776_temp_label;
3202 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3204 data->REG_CONFIG = NCT6775_REG_CONFIG;
3205 data->REG_VBAT = NCT6775_REG_VBAT;
3206 data->REG_DIODE = NCT6775_REG_DIODE;
3207 data->REG_VIN = NCT6775_REG_IN;
3208 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3209 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3210 data->REG_TARGET = NCT6775_REG_TARGET;
3211 data->REG_FAN = NCT6775_REG_FAN;
3212 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3213 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3214 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3215 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3216 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3217 data->REG_PWM[0] = NCT6775_REG_PWM;
3218 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3219 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3220 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3221 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3222 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3223 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3224 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3225 data->REG_TEMP_MON = NCT6775_REG_TEMP_MON;
3226 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3227 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3228 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3229 data->REG_CRITICAL_TEMP_TOLERANCE
3230 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3231 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3232 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3233 data->REG_TEMP_SEL[0] = NCT6775_REG_TEMP_SEL;
3234 data->REG_TEMP_SEL[1] = NCT6775_REG_WEIGHT_TEMP_SEL;
3235 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3236 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3237 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3238 data->REG_ALARM = NCT6775_REG_ALARM;
3240 reg_temp = NCT6775_REG_TEMP;
3241 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3242 reg_temp_over = NCT6775_REG_TEMP_OVER;
3243 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3244 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3245 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3246 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3252 data->auto_pwm_num = 4;
3253 data->has_fan_div = false;
3254 data->temp_fixed_num = 6;
3256 data->ALARM_BITS = NCT6779_ALARM_BITS;
3258 data->fan_from_reg = fan_from_reg13;
3259 data->fan_from_reg_min = fan_from_reg13;
3261 data->temp_label = nct6779_temp_label;
3262 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3264 data->REG_CONFIG = NCT6775_REG_CONFIG;
3265 data->REG_VBAT = NCT6775_REG_VBAT;
3266 data->REG_DIODE = NCT6775_REG_DIODE;
3267 data->REG_VIN = NCT6779_REG_IN;
3268 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3269 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3270 data->REG_TARGET = NCT6775_REG_TARGET;
3271 data->REG_FAN = NCT6779_REG_FAN;
3272 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3273 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3274 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3275 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3276 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3277 data->REG_PWM[0] = NCT6775_REG_PWM;
3278 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3279 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3280 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3281 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3282 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3283 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3284 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3285 data->REG_TEMP_MON = NCT6775_REG_TEMP_MON;
3286 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3287 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3288 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3289 data->REG_CRITICAL_TEMP_TOLERANCE
3290 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3291 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3292 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3293 data->REG_TEMP_SEL[0] = NCT6775_REG_TEMP_SEL;
3294 data->REG_TEMP_SEL[1] = NCT6775_REG_WEIGHT_TEMP_SEL;
3295 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3296 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3297 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3298 data->REG_ALARM = NCT6779_REG_ALARM;
3300 reg_temp = NCT6779_REG_TEMP;
3301 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3302 reg_temp_over = NCT6779_REG_TEMP_OVER;
3303 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3304 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3305 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3306 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3312 data->have_in = (1 << data->in_num) - 1;
3313 data->have_temp = 0;
3316 * On some boards, not all available temperature sources are monitored,
3317 * even though some of the monitoring registers are unused.
3318 * Get list of unused monitoring registers, then detect if any fan
3319 * controls are configured to use unmonitored temperature sources.
3320 * If so, assign the unmonitored temperature sources to available
3321 * monitoring registers.
3325 for (i = 0; i < num_reg_temp; i++) {
3326 if (reg_temp[i] == 0)
3329 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3330 if (!src || (mask & (1 << src)))
3331 available |= 1 << i;
3337 * Now find unmonitored temperature registers and enable monitoring
3338 * if additional monitoring registers are available.
3340 for (i = 0; i < ARRAY_SIZE(data->REG_TEMP_SEL) && available; i++) {
3343 if (!data->REG_TEMP_SEL[i])
3345 for (j = 0; j < data->pwm_num && available; j++) {
3348 if (!data->REG_TEMP_SEL[i][j])
3350 src = nct6775_read_value(data,
3351 data->REG_TEMP_SEL[i][j]);
3353 if (!src || (mask & (1 << src)))
3355 if (src >= data->temp_label_num ||
3356 !strlen(data->temp_label[src])) {
3358 "Select source %d:%d reg 0x%x invalid (%d)\n",
3359 i, j, data->REG_TEMP_SEL[i][j], src);
3363 index = __ffs(available);
3364 nct6775_write_value(data,
3365 data->REG_TEMP_SOURCE[index],
3367 available &= ~(1 << index);
3373 s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */
3374 for (i = 0; i < num_reg_temp; i++) {
3375 if (reg_temp[i] == 0)
3378 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3379 if (!src || (mask & (1 << src)))
3382 if (src >= data->temp_label_num ||
3383 !strlen(data->temp_label[src])) {
3385 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3386 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3392 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3393 if (src <= data->temp_fixed_num) {
3394 data->have_temp |= 1 << (src - 1);
3395 data->have_temp_fixed |= 1 << (src - 1);
3396 data->reg_temp[0][src - 1] = reg_temp[i];
3397 data->reg_temp[1][src - 1] = reg_temp_over[i];
3398 data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3399 data->reg_temp_config[src - 1] = reg_temp_config[i];
3400 data->temp_src[src - 1] = src;
3407 /* Use dynamic index for other sources */
3408 data->have_temp |= 1 << s;
3409 data->reg_temp[0][s] = reg_temp[i];
3410 data->reg_temp[1][s] = reg_temp_over[i];
3411 data->reg_temp[2][s] = reg_temp_hyst[i];
3412 data->reg_temp_config[s] = reg_temp_config[i];
3413 if (reg_temp_crit[src - 1])
3414 data->reg_temp[3][s] = reg_temp_crit[src - 1];
3416 data->temp_src[s] = src;
3422 * Go through the list of alternate temp registers and enable
3424 * The temperature is already monitored if the respective bit in <mask>
3427 for (i = 0; i < data->temp_label_num - 1; i++) {
3428 if (!reg_temp_alternate[i])
3430 if (mask & (1 << (i + 1)))
3432 if (i < data->temp_fixed_num) {
3433 if (data->have_temp & (1 << i))
3435 data->have_temp |= 1 << i;
3436 data->have_temp_fixed |= 1 << i;
3437 data->reg_temp[0][i] = reg_temp_alternate[i];
3438 data->reg_temp[1][i] = reg_temp_over[i];
3439 data->reg_temp[2][i] = reg_temp_hyst[i];
3440 data->temp_src[i] = i + 1;
3444 if (s >= NUM_TEMP) /* Abort if no more space */
3447 data->have_temp |= 1 << s;
3448 data->reg_temp[0][s] = reg_temp_alternate[i];
3449 data->temp_src[s] = i + 1;
3452 #endif /* TESTING */
3454 switch (data->kind) {
3459 * On NCT6776, AUXTIN and VIN3 pins are shared.
3460 * Only way to detect it is to check if AUXTIN is used
3461 * as a temperature source, and if that source is
3464 * If that is the case, disable in6, which reports VIN3.
3465 * Otherwise disable temp3.
3467 if (data->have_temp & (1 << 2)) {
3468 u8 reg = nct6775_read_value(data,
3469 data->reg_temp_config[2]);
3471 data->have_temp &= ~(1 << 2);
3473 data->have_in &= ~(1 << 6);
3484 * There does not seem to be a clean way to detect if VINx or
3485 * AUXTINx is active, so for keep both sensor types enabled
3491 /* Initialize the chip */
3492 nct6775_init_device(data);
3494 data->vrm = vid_which_vrm();
3495 err = superio_enter(sio_data->sioreg);
3501 * We can get the VID input values directly at logical device D 0xe3.
3503 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3504 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3509 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3510 tmp = superio_inb(sio_data->sioreg,
3511 NCT6775_REG_CR_FAN_DEBOUNCE);
3512 switch (data->kind) {
3521 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3523 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3527 superio_exit(sio_data->sioreg);
3529 err = device_create_file(dev, &dev_attr_cpu0_vid);
3533 err = nct6775_check_fan_inputs(sio_data, data);
3537 /* Read fan clock dividers immediately */
3538 nct6775_update_fan_div_common(dev, data);
3540 /* Register sysfs hooks */
3541 for (i = 0; i < data->pwm_num; i++) {
3542 if (!(data->has_pwm & (1 << i)))
3545 err = sysfs_create_group(&dev->kobj, &nct6775_group_pwm[i]);
3549 if (data->REG_PWM[3]) {
3550 err = device_create_file(dev,
3551 &sda_max_output[i].dev_attr);
3555 if (data->REG_PWM[4]) {
3556 err = device_create_file(dev,
3557 &sda_step_output[i].dev_attr);
3561 if (data->REG_PWM[6]) {
3562 err = device_create_file(dev,
3563 &sda_weight_duty_base[i].dev_attr);
3568 for (i = 0; i < ARRAY_SIZE(sda_auto_pwm_arrays); i++) {
3569 struct sensor_device_attribute_2 *attr =
3570 &sda_auto_pwm_arrays[i];
3572 if (!(data->has_pwm & (1 << attr->nr)))
3574 if (attr->index > data->auto_pwm_num)
3576 err = device_create_file(dev, &attr->dev_attr);
3581 for (i = 0; i < data->in_num; i++) {
3582 if (!(data->have_in & (1 << i)))
3584 err = sysfs_create_group(&dev->kobj, &nct6775_group_in[i]);
3589 for (i = 0; i < 5; i++) {
3590 if (data->has_fan & (1 << i)) {
3591 err = device_create_file(dev,
3592 &sda_fan_input[i].dev_attr);
3595 err = device_create_file(dev,
3596 &sda_fan_alarm[i].dev_attr);
3599 if (data->kind != nct6776 &&
3600 data->kind != nct6779) {
3601 err = device_create_file(dev,
3602 &sda_fan_div[i].dev_attr);
3606 if (data->has_fan_min & (1 << i)) {
3607 err = device_create_file(dev,
3608 &sda_fan_min[i].dev_attr);
3615 for (i = 0; i < NUM_TEMP; i++) {
3616 if (!(data->have_temp & (1 << i)))
3618 err = device_create_file(dev, &sda_temp_input[i].dev_attr);
3621 if (data->temp_label) {
3622 err = device_create_file(dev,
3623 &sda_temp_label[i].dev_attr);
3627 if (data->reg_temp[1][i]) {
3628 err = device_create_file(dev,
3629 &sda_temp_max[i].dev_attr);
3633 if (data->reg_temp[2][i]) {
3634 err = device_create_file(dev,
3635 &sda_temp_max_hyst[i].dev_attr);
3639 if (data->reg_temp[3][i]) {
3640 err = device_create_file(dev,
3641 &sda_temp_crit[i].dev_attr);
3645 if (!(data->have_temp_fixed & (1 << i)))
3647 err = device_create_file(dev, &sda_temp_type[i].dev_attr);
3650 err = device_create_file(dev, &sda_temp_offset[i].dev_attr);
3653 if (i >= NUM_TEMP_ALARM ||
3654 data->ALARM_BITS[TEMP_ALARM_BASE + i] < 0)
3656 err = device_create_file(dev, &sda_temp_alarm[i].dev_attr);
3661 for (i = 0; i < ARRAY_SIZE(sda_caseopen); i++) {
3662 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + i] < 0)
3664 err = device_create_file(dev, &sda_caseopen[i].dev_attr);
3669 err = device_create_file(dev, &dev_attr_name);
3673 data->hwmon_dev = hwmon_device_register(dev);
3674 if (IS_ERR(data->hwmon_dev)) {
3675 err = PTR_ERR(data->hwmon_dev);
3682 nct6775_device_remove_files(dev);
3686 static int __devexit nct6775_remove(struct platform_device *pdev)
3688 struct nct6775_data *data = platform_get_drvdata(pdev);
3690 hwmon_device_unregister(data->hwmon_dev);
3691 nct6775_device_remove_files(&pdev->dev);
3696 static struct platform_driver nct6775_driver = {
3698 .owner = THIS_MODULE,
3701 .probe = nct6775_probe,
3702 .remove = __devexit_p(nct6775_remove),
3705 /* nct6775_find() looks for a '627 in the Super-I/O config space */
3706 static int __init nct6775_find(int sioaddr, unsigned short *addr,
3707 struct nct6775_sio_data *sio_data)
3709 static const char sio_name_NCT6775[] __initconst = "NCT6775F";
3710 static const char sio_name_NCT6776[] __initconst = "NCT6776F";
3711 static const char sio_name_NCT6779[] __initconst = "NCT6779D";
3714 const char *sio_name;
3717 err = superio_enter(sioaddr);
3724 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
3725 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
3726 switch (val & SIO_ID_MASK) {
3727 case SIO_NCT6775_ID:
3728 sio_data->kind = nct6775;
3729 sio_name = sio_name_NCT6775;
3731 case SIO_NCT6776_ID:
3732 sio_data->kind = nct6776;
3733 sio_name = sio_name_NCT6776;
3735 case SIO_NCT6779_ID:
3736 sio_data->kind = nct6779;
3737 sio_name = sio_name_NCT6779;
3741 pr_debug("unsupported chip ID: 0x%04x\n", val);
3742 superio_exit(sioaddr);
3746 /* We have a known chip, find the HWM I/O address */
3747 superio_select(sioaddr, NCT6775_LD_HWM);
3748 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
3749 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
3750 *addr = val & IOREGION_ALIGNMENT;
3752 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
3753 superio_exit(sioaddr);
3757 /* Activate logical device if needed */
3758 val = superio_inb(sioaddr, SIO_REG_ENABLE);
3759 if (!(val & 0x01)) {
3760 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
3761 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
3764 superio_exit(sioaddr);
3765 pr_info("Found %s chip at %#x\n", sio_name, *addr);
3766 sio_data->sioreg = sioaddr;
3772 * when Super-I/O functions move to a separate file, the Super-I/O
3773 * bus will manage the lifetime of the device and this module will only keep
3774 * track of the nct6775 driver. But since we platform_device_alloc(), we
3775 * must keep track of the device
3777 static struct platform_device *pdev;
3779 static int __init sensors_nct6775_init(void)
3782 unsigned short address;
3783 struct resource res;
3784 struct nct6775_sio_data sio_data;
3787 * initialize sio_data->kind and sio_data->sioreg.
3789 * when Super-I/O functions move to a separate file, the Super-I/O
3790 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
3791 * nct6775 hardware monitor, and call probe()
3793 if (nct6775_find(0x2e, &address, &sio_data) &&
3794 nct6775_find(0x4e, &address, &sio_data))
3797 err = platform_driver_register(&nct6775_driver);
3801 pdev = platform_device_alloc(DRVNAME, address);
3804 pr_err("Device allocation failed\n");
3805 goto exit_unregister;
3808 err = platform_device_add_data(pdev, &sio_data,
3809 sizeof(struct nct6775_sio_data));
3811 pr_err("Platform data allocation failed\n");
3812 goto exit_device_put;
3815 memset(&res, 0, sizeof(res));
3817 res.start = address + IOREGION_OFFSET;
3818 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
3819 res.flags = IORESOURCE_IO;
3821 err = acpi_check_resource_conflict(&res);
3823 goto exit_device_put;
3825 err = platform_device_add_resources(pdev, &res, 1);
3827 pr_err("Device resource addition failed (%d)\n", err);
3828 goto exit_device_put;
3831 /* platform_device_add calls probe() */
3832 err = platform_device_add(pdev);
3834 pr_err("Device addition failed (%d)\n", err);
3835 goto exit_device_put;
3841 platform_device_put(pdev);
3843 platform_driver_unregister(&nct6775_driver);
3848 static void __exit sensors_nct6775_exit(void)
3850 platform_device_unregister(pdev);
3851 platform_driver_unregister(&nct6775_driver);
3854 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
3855 MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
3856 MODULE_LICENSE("GPL");
3858 module_init(sensors_nct6775_init);
3859 module_exit(sensors_nct6775_exit);