1 /*****************************************************************************/
5 /* Environment independent low level optimizations */
9 /* (C) 2001-2009, Ullrich von Bassewitz */
10 /* Roemerstrasse 52 */
11 /* D-70794 Filderstadt */
12 /* EMail: uz@cc65.org */
15 /* This software is provided 'as-is', without any expressed or implied */
16 /* warranty. In no event will the authors be held liable for any damages */
17 /* arising from the use of this software. */
19 /* Permission is granted to anyone to use this software for any purpose, */
20 /* including commercial applications, and to alter it and redistribute it */
21 /* freely, subject to the following restrictions: */
23 /* 1. The origin of this software must not be misrepresented; you must not */
24 /* claim that you wrote the original software. If you use this software */
25 /* in a product, an acknowledgment in the product documentation would be */
26 /* appreciated but is not required. */
27 /* 2. Altered source versions must be plainly marked as such, and must not */
28 /* be misrepresented as being the original software. */
29 /* 3. This notice may not be removed or altered from any source */
32 /*****************************************************************************/
48 /*****************************************************************************/
49 /* Helper functions */
50 /*****************************************************************************/
54 static int MemAccess (CodeSeg* S, unsigned From, unsigned To, const char* Arg)
55 /* Checks a range of code entries if there are any memory accesses to Arg.
56 * Note: This function is not 100% safe, because there is more than one way
57 * to express a memory location ("foo" and "foo+0" comes to mind) and there
58 * may be other accesses through pointers. For the code generated by cc65 and
59 * for the purpose of the caller (OptPushPop) it is assumed to be safe enough
63 /* Walk over all code entries */
66 /* Get the next entry */
67 CodeEntry* E = CS_GetEntry (S, From);
69 /* For simplicity, we just check if there is an argument and if this
70 * argument equals Arg.
72 if (E->Arg && strcmp (E->Arg, Arg) == 0) {
87 static int GetBranchDist (CodeSeg* S, unsigned From, CodeEntry* To)
88 /* Get the branch distance between the two entries and return it. The distance
89 * will be negative for backward jumps and positive for forward jumps.
92 /* Get the index of the branch target */
93 unsigned TI = CS_GetEntryIndex (S, To);
95 /* Determine the branch distance */
98 /* Forward branch, do not count the current insn */
101 CodeEntry* N = CS_GetEntry (S, J++);
105 /* Backward branch */
108 CodeEntry* N = CS_GetEntry (S, J++);
113 /* Return the calculated distance */
119 static int IsShortDist (int Distance)
120 /* Return true if the given distance is a short branch distance */
122 return (Distance >= -125 && Distance <= 125);
127 static short ZPRegVal (unsigned short Use, const RegContents* RC)
128 /* Return the contents of the given zeropage register */
130 if ((Use & REG_TMP1) != 0) {
132 } else if ((Use & REG_PTR1_LO) != 0) {
134 } else if ((Use & REG_PTR1_HI) != 0) {
136 } else if ((Use & REG_SREG_LO) != 0) {
138 } else if ((Use & REG_SREG_HI) != 0) {
141 return UNKNOWN_REGVAL;
147 static short RegVal (unsigned short Use, const RegContents* RC)
148 /* Return the contents of the given register */
150 if ((Use & REG_A) != 0) {
152 } else if ((Use & REG_X) != 0) {
154 } else if ((Use & REG_Y) != 0) {
157 return ZPRegVal (Use, RC);
163 /*****************************************************************************/
164 /* Replace jumps to RTS by RTS */
165 /*****************************************************************************/
169 unsigned OptRTSJumps1 (CodeSeg* S)
170 /* Replace jumps to RTS by RTS */
172 unsigned Changes = 0;
174 /* Walk over all entries minus the last one */
176 while (I < CS_GetEntryCount (S)) {
178 /* Get the next entry */
179 CodeEntry* E = CS_GetEntry (S, I);
181 /* Check if it's an unconditional branch to a local target */
182 if ((E->Info & OF_UBRA) != 0 &&
184 E->JumpTo->Owner->OPC == OP65_RTS) {
186 /* Insert an RTS instruction */
187 CodeEntry* X = NewCodeEntry (OP65_RTS, AM65_IMP, 0, 0, E->LI);
188 CS_InsertEntry (S, X, I+1);
190 /* Delete the jump */
193 /* Remember, we had changes */
203 /* Return the number of changes made */
209 unsigned OptRTSJumps2 (CodeSeg* S)
210 /* Replace long conditional jumps to RTS */
212 unsigned Changes = 0;
214 /* Walk over all entries minus the last one */
216 while (I < CS_GetEntryCount (S)) {
220 /* Get the next entry */
221 CodeEntry* E = CS_GetEntry (S, I);
223 /* Check if it's an unconditional branch to a local target */
224 if ((E->Info & OF_CBRA) != 0 && /* Conditional branch */
225 (E->Info & OF_LBRA) != 0 && /* Long branch */
226 E->JumpTo != 0 && /* Local label */
227 E->JumpTo->Owner->OPC == OP65_RTS && /* Target is an RTS */
228 (N = CS_GetNextEntry (S, I)) != 0) { /* There is a next entry */
234 /* We will create a jump around an RTS instead of the long branch */
235 X = NewCodeEntry (OP65_RTS, AM65_IMP, 0, 0, E->JumpTo->Owner->LI);
236 CS_InsertEntry (S, X, I+1);
238 /* Get the new branch opcode */
239 NewBranch = MakeShortBranch (GetInverseBranch (E->OPC));
241 /* Get the label attached to N, create a new one if needed */
242 LN = CS_GenLabel (S, N);
244 /* Generate the branch */
245 X = NewCodeEntry (NewBranch, AM65_BRA, LN->Name, LN, E->LI);
246 CS_InsertEntry (S, X, I+1);
248 /* Delete the long branch */
251 /* Remember, we had changes */
261 /* Return the number of changes made */
267 /*****************************************************************************/
268 /* Remove dead jumps */
269 /*****************************************************************************/
273 unsigned OptDeadJumps (CodeSeg* S)
274 /* Remove dead jumps (jumps to the next instruction) */
276 unsigned Changes = 0;
278 /* Walk over all entries minus the last one */
280 while (I < CS_GetEntryCount (S)) {
282 /* Get the next entry */
283 CodeEntry* E = CS_GetEntry (S, I);
285 /* Check if it's a branch, if it has a local target, and if the target
286 * is the next instruction.
288 if (E->AM == AM65_BRA &&
290 E->JumpTo->Owner == CS_GetNextEntry (S, I)) {
292 /* Delete the dead jump */
295 /* Remember, we had changes */
306 /* Return the number of changes made */
312 /*****************************************************************************/
313 /* Remove dead code */
314 /*****************************************************************************/
318 unsigned OptDeadCode (CodeSeg* S)
319 /* Remove dead code (code that follows an unconditional jump or an rts/rti
323 unsigned Changes = 0;
325 /* Walk over all entries */
327 while (I < CS_GetEntryCount (S)) {
333 CodeEntry* E = CS_GetEntry (S, I);
335 /* Check if it's an unconditional branch, and if the next entry has
336 * no labels attached, or if the label is just used so that the insn
337 * can jump to itself.
339 if ((E->Info & OF_DEAD) != 0 && /* Dead code follows */
340 (N = CS_GetNextEntry (S, I)) != 0 && /* Has next entry */
341 (!CE_HasLabel (N) || /* Don't has a label */
342 ((N->Info & OF_UBRA) != 0 && /* Uncond branch */
343 (LN = N->JumpTo) != 0 && /* Jumps to known label */
344 LN->Owner == N && /* Attached to insn */
345 CL_GetRefCount (LN) == 1))) { /* Only reference */
347 /* Delete the next entry */
348 CS_DelEntry (S, I+1);
350 /* Remember, we had changes */
361 /* Return the number of changes made */
367 /*****************************************************************************/
368 /* Optimize jump cascades */
369 /*****************************************************************************/
373 unsigned OptJumpCascades (CodeSeg* S)
374 /* Optimize jump cascades (jumps to jumps). In such a case, the jump is
375 * replaced by a jump to the final location. This will in some cases produce
376 * worse code, because some jump targets are no longer reachable by short
377 * branches, but this is quite rare, so there are more advantages than
381 unsigned Changes = 0;
383 /* Walk over all entries */
385 while (I < CS_GetEntryCount (S)) {
391 CodeEntry* E = CS_GetEntry (S, I);
393 /* Check if it's a branch, if it has a jump label, if this jump
394 * label is not attached to the instruction itself, and if the
395 * target instruction is itself a branch.
397 if ((E->Info & OF_BRA) != 0 &&
398 (OldLabel = E->JumpTo) != 0 &&
399 (N = OldLabel->Owner) != E &&
400 (N->Info & OF_BRA) != 0) {
402 /* Check if we can use the final target label. This is the case,
403 * if the target branch is an absolut branch, or if it is a
404 * conditional branch checking the same condition as the first one.
406 if ((N->Info & OF_UBRA) != 0 ||
407 ((E->Info & OF_CBRA) != 0 &&
408 GetBranchCond (E->OPC) == GetBranchCond (N->OPC))) {
410 /* This is a jump cascade and we may jump to the final target,
411 * provided that the other insn does not jump to itself. If
412 * this is the case, we can also jump to ourselves, otherwise
413 * insert a jump to the new instruction and remove the old one.
416 CodeLabel* LN = N->JumpTo;
418 if (LN != 0 && LN->Owner == N) {
420 /* We found a jump to a jump to itself. Replace our jump
421 * by a jump to itself.
423 CodeLabel* LE = CS_GenLabel (S, E);
424 X = NewCodeEntry (E->OPC, E->AM, LE->Name, LE, E->LI);
428 /* Jump to the final jump target */
429 X = NewCodeEntry (E->OPC, E->AM, N->Arg, N->JumpTo, E->LI);
433 /* Insert it behind E */
434 CS_InsertEntry (S, X, I+1);
439 /* Remember, we had changes */
442 /* Check if both are conditional branches, and the condition of
443 * the second is the inverse of that of the first. In this case,
444 * the second branch will never be taken, and we may jump directly
445 * to the instruction behind this one.
447 } else if ((E->Info & OF_CBRA) != 0 && (N->Info & OF_CBRA) != 0) {
449 CodeEntry* X; /* Instruction behind N */
450 CodeLabel* LX; /* Label attached to X */
452 /* Get the branch conditions of both branches */
453 bc_t BC1 = GetBranchCond (E->OPC);
454 bc_t BC2 = GetBranchCond (N->OPC);
456 /* Check the branch conditions */
457 if (BC1 != GetInverseCond (BC2)) {
458 /* Condition not met */
462 /* We may jump behind this conditional branch. Get the
463 * pointer to the next instruction
465 if ((X = CS_GetNextEntry (S, CS_GetEntryIndex (S, N))) == 0) {
466 /* N is the last entry, bail out */
470 /* Get the label attached to X, create a new one if needed */
471 LX = CS_GenLabel (S, X);
473 /* Move the reference from E to the new label */
474 CS_MoveLabelRef (S, E, LX);
476 /* Remember, we had changes */
487 /* Return the number of changes made */
493 /*****************************************************************************/
494 /* Optimize jsr/rts */
495 /*****************************************************************************/
499 unsigned OptRTS (CodeSeg* S)
500 /* Optimize subroutine calls followed by an RTS. The subroutine call will get
501 * replaced by a jump. Don't bother to delete the RTS if it does not have a
502 * label, the dead code elimination should take care of it.
505 unsigned Changes = 0;
507 /* Walk over all entries minus the last one */
509 while (I < CS_GetEntryCount (S)) {
514 CodeEntry* E = CS_GetEntry (S, I);
516 /* Check if it's a subroutine call and if the following insn is RTS */
517 if (E->OPC == OP65_JSR &&
518 (N = CS_GetNextEntry (S, I)) != 0 &&
519 N->OPC == OP65_RTS) {
521 /* Change the jsr to a jmp and use the additional info for a jump */
523 CE_ReplaceOPC (E, OP65_JMP);
525 /* Remember, we had changes */
535 /* Return the number of changes made */
541 /*****************************************************************************/
542 /* Optimize jump targets */
543 /*****************************************************************************/
547 unsigned OptJumpTarget1 (CodeSeg* S)
548 /* If the instruction preceeding an unconditional branch is the same as the
549 * instruction preceeding the jump target, the jump target may be moved
550 * one entry back. This is a size optimization, since the instruction before
551 * the branch gets removed.
554 unsigned Changes = 0;
555 CodeEntry* E1; /* Entry 1 */
556 CodeEntry* E2; /* Entry 2 */
557 CodeEntry* T1; /* Jump target entry 1 */
558 CodeLabel* TL1; /* Target label 1 */
560 /* Walk over the entries */
562 while (I < CS_GetEntryCount (S)) {
565 E2 = CS_GetNextEntry (S, I);
567 /* Check if we have a jump or branch, and a matching label, which
568 * is not attached to the jump itself
571 (E2->Info & OF_UBRA) != 0 &&
573 E2->JumpTo->Owner != E2) {
575 /* Get the entry preceeding the branch target */
576 T1 = CS_GetPrevEntry (S, CS_GetEntryIndex (S, E2->JumpTo->Owner));
578 /* There is no such entry */
582 /* Get the entry preceeding the jump */
583 E1 = CS_GetEntry (S, I);
585 /* Check if both preceeding instructions are identical */
586 if (!CodeEntriesAreEqual (E1, T1)) {
587 /* Not equal, try next */
591 /* Get the label for the instruction preceeding the jump target.
592 * This routine will create a new label if the instruction does
593 * not already have one.
595 TL1 = CS_GenLabel (S, T1);
597 /* Change the jump target to point to this new label */
598 CS_MoveLabelRef (S, E2, TL1);
600 /* If the instruction preceeding the jump has labels attached,
601 * move references to this label to the new label.
603 if (CE_HasLabel (E1)) {
604 CS_MoveLabels (S, E1, T1);
607 /* Remove the entry preceeding the jump */
610 /* Remember, we had changes */
620 /* Return the number of changes made */
626 unsigned OptJumpTarget2 (CodeSeg* S)
627 /* If a bcs jumps to a sec insn or a bcc jumps to clc, skip this insn, since
628 * it's job is already done.
631 unsigned Changes = 0;
633 /* Walk over the entries */
635 while (I < CS_GetEntryCount (S)) {
637 /* OP that may be skipped */
640 /* Jump target insn, old and new */
648 CodeEntry* E = CS_GetEntry (S, I);
650 /* Check if this is a bcc insn */
651 if (E->OPC == OP65_BCC || E->OPC == OP65_JCC) {
653 } else if (E->OPC == OP65_BCS || E->OPC == OP65_JCS) {
656 /* Not what we're looking for */
660 /* Must have a jump target */
661 if (E->JumpTo == 0) {
665 /* Get the owner insn of the jump target and check if it's the one, we
666 * will skip if present.
668 T = E->JumpTo->Owner;
673 /* Get the entry following the branch target */
674 N = CS_GetNextEntry (S, CS_GetEntryIndex (S, T));
676 /* There is no such entry */
680 /* Get the label for the instruction following the jump target.
681 * This routine will create a new label if the instruction does
682 * not already have one.
684 L = CS_GenLabel (S, N);
686 /* Change the jump target to point to this new label */
687 CS_MoveLabelRef (S, E, L);
689 /* Remember that we had changes */
697 /* Return the number of changes made */
703 /*****************************************************************************/
704 /* Optimize conditional branches */
705 /*****************************************************************************/
709 unsigned OptCondBranches1 (CodeSeg* S)
710 /* Performs several optimization steps:
712 * - If an immidiate load of a register is followed by a conditional jump that
713 * is never taken because the load of the register sets the flags in such a
714 * manner, remove the conditional branch.
715 * - If the conditional branch is always taken because of the register load,
716 * replace it by a jmp.
717 * - If a conditional branch jumps around an unconditional branch, remove the
718 * conditional branch and make the jump a conditional branch with the
719 * inverse condition of the first one.
722 unsigned Changes = 0;
724 /* Walk over the entries */
726 while (I < CS_GetEntryCount (S)) {
732 CodeEntry* E = CS_GetEntry (S, I);
734 /* Check if it's a register load */
735 if ((E->Info & OF_LOAD) != 0 && /* It's a load instruction */
736 E->AM == AM65_IMM && /* ..with immidiate addressing */
737 (E->Flags & CEF_NUMARG) != 0 && /* ..and a numeric argument. */
738 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a following entry */
739 (N->Info & OF_CBRA) != 0 && /* ..which is a conditional branch */
740 !CE_HasLabel (N)) { /* ..and does not have a label */
742 /* Get the branch condition */
743 bc_t BC = GetBranchCond (N->OPC);
745 /* Check the argument against the branch condition */
746 if ((BC == BC_EQ && E->Num != 0) ||
747 (BC == BC_NE && E->Num == 0) ||
748 (BC == BC_PL && (E->Num & 0x80) != 0) ||
749 (BC == BC_MI && (E->Num & 0x80) == 0)) {
751 /* Remove the conditional branch */
752 CS_DelEntry (S, I+1);
754 /* Remember, we had changes */
757 } else if ((BC == BC_EQ && E->Num == 0) ||
758 (BC == BC_NE && E->Num != 0) ||
759 (BC == BC_PL && (E->Num & 0x80) == 0) ||
760 (BC == BC_MI && (E->Num & 0x80) != 0)) {
762 /* The branch is always taken, replace it by a jump */
763 CE_ReplaceOPC (N, OP65_JMP);
765 /* Remember, we had changes */
771 if ((E->Info & OF_CBRA) != 0 && /* It's a conditional branch */
772 (L = E->JumpTo) != 0 && /* ..referencing a local label */
773 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a following entry */
774 (N->Info & OF_UBRA) != 0 && /* ..which is an uncond branch, */
775 !CE_HasLabel (N) && /* ..has no label attached */
776 L->Owner == CS_GetNextEntry (S, I+1)) {/* ..and jump target follows */
778 /* Replace the jump by a conditional branch with the inverse branch
779 * condition than the branch around it.
781 CE_ReplaceOPC (N, GetInverseBranch (E->OPC));
783 /* Remove the conditional branch */
786 /* Remember, we had changes */
796 /* Return the number of changes made */
802 unsigned OptCondBranches2 (CodeSeg* S)
803 /* If on entry to a "rol a" instruction the accu is zero, and a beq/bne follows,
804 * we can remove the rol and branch on the state of the carry flag.
807 unsigned Changes = 0;
809 /* Generate register info for this step */
812 /* Walk over the entries */
814 while (I < CS_GetEntryCount (S)) {
819 CodeEntry* E = CS_GetEntry (S, I);
821 /* Check if it's a rol insn with A in accu and a branch follows */
822 if (E->OPC == OP65_ROL &&
824 E->RI->In.RegA == 0 &&
826 (N = CS_GetNextEntry (S, I)) != 0 &&
827 (N->Info & OF_ZBRA) != 0 &&
828 !RegAUsed (S, I+1)) {
830 /* Replace the branch condition */
831 switch (GetBranchCond (N->OPC)) {
832 case BC_EQ: CE_ReplaceOPC (N, OP65_JCC); break;
833 case BC_NE: CE_ReplaceOPC (N, OP65_JCS); break;
834 default: Internal ("Unknown branch condition in OptCondBranches2");
837 /* Delete the rol insn */
840 /* Remember, we had changes */
848 /* Free register info */
851 /* Return the number of changes made */
857 /*****************************************************************************/
858 /* Remove unused loads and stores */
859 /*****************************************************************************/
863 unsigned OptUnusedLoads (CodeSeg* S)
864 /* Remove loads of registers where the value loaded is not used later. */
866 unsigned Changes = 0;
868 /* Walk over the entries */
870 while (I < CS_GetEntryCount (S)) {
875 CodeEntry* E = CS_GetEntry (S, I);
877 /* Check if it's a register load or transfer insn */
878 if ((E->Info & (OF_LOAD | OF_XFR | OF_REG_INCDEC)) != 0 &&
879 (N = CS_GetNextEntry (S, I)) != 0 &&
880 !CE_UseLoadFlags (N)) {
882 /* Check which sort of load or transfer it is */
889 case OP65_TYA: R = REG_A; break;
893 case OP65_TAX: R = REG_X; break;
897 case OP65_TAY: R = REG_Y; break;
898 default: goto NextEntry; /* OOPS */
901 /* Get register usage and check if the register value is used later */
902 if ((GetRegInfo (S, I+1, R) & R) == 0) {
904 /* Register value is not used, remove the load */
907 /* Remember, we had changes. Account the deleted entry in I. */
920 /* Return the number of changes made */
926 unsigned OptUnusedStores (CodeSeg* S)
927 /* Remove stores into zero page registers that aren't used later */
929 unsigned Changes = 0;
931 /* Walk over the entries */
933 while (I < CS_GetEntryCount (S)) {
936 CodeEntry* E = CS_GetEntry (S, I);
938 /* Check if it's a register load or transfer insn */
939 if ((E->Info & OF_STORE) != 0 &&
941 (E->Chg & REG_ZP) != 0) {
943 /* Check for the zero page location. We know that there cannot be
944 * more than one zero page location involved in the store.
946 unsigned R = E->Chg & REG_ZP;
948 /* Get register usage and check if the register value is used later */
949 if ((GetRegInfo (S, I+1, R) & R) == 0) {
951 /* Register value is not used, remove the load */
954 /* Remember, we had changes */
957 /* Continue with next insn */
967 /* Return the number of changes made */
973 unsigned OptDupLoads (CodeSeg* S)
974 /* Remove loads of registers where the value loaded is already in the register. */
976 unsigned Changes = 0;
979 /* Generate register info for this step */
982 /* Walk over the entries */
984 while (I < CS_GetEntryCount (S)) {
989 CodeEntry* E = CS_GetEntry (S, I);
991 /* Assume we won't delete the entry */
994 /* Get a pointer to the input registers of the insn */
995 const RegContents* In = &E->RI->In;
997 /* Handle the different instructions */
1001 if (RegValIsKnown (In->RegA) && /* Value of A is known */
1002 CE_IsKnownImm (E, In->RegA) && /* Value to be loaded is known */
1003 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a next entry */
1004 !CE_UseLoadFlags (N)) { /* Which does not use the flags */
1010 if (RegValIsKnown (In->RegX) && /* Value of X is known */
1011 CE_IsKnownImm (E, In->RegX) && /* Value to be loaded is known */
1012 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a next entry */
1013 !CE_UseLoadFlags (N)) { /* Which does not use the flags */
1019 if (RegValIsKnown (In->RegY) && /* Value of Y is known */
1020 CE_IsKnownImm (E, In->RegY) && /* Value to be loaded is known */
1021 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a next entry */
1022 !CE_UseLoadFlags (N)) { /* Which does not use the flags */
1028 /* If we store into a known zero page location, and this
1029 * location does already contain the value to be stored,
1032 if (RegValIsKnown (In->RegA) && /* Value of A is known */
1033 E->AM == AM65_ZP && /* Store into zp */
1034 In->RegA == ZPRegVal (E->Chg, In)) { /* Value identical */
1041 /* If we store into a known zero page location, and this
1042 * location does already contain the value to be stored,
1045 if (RegValIsKnown (In->RegX) && /* Value of A is known */
1046 E->AM == AM65_ZP && /* Store into zp */
1047 In->RegX == ZPRegVal (E->Chg, In)) { /* Value identical */
1051 /* If the value in the X register is known and the same as
1052 * that in the A register, replace the store by a STA. The
1053 * optimizer will then remove the load instruction for X
1054 * later. STX does support the zeropage,y addressing mode,
1055 * so be sure to check for that.
1057 } else if (RegValIsKnown (In->RegX) &&
1058 In->RegX == In->RegA &&
1059 E->AM != AM65_ABSY &&
1060 E->AM != AM65_ZPY) {
1061 /* Use the A register instead */
1062 CE_ReplaceOPC (E, OP65_STA);
1067 /* If we store into a known zero page location, and this
1068 * location does already contain the value to be stored,
1071 if (RegValIsKnown (In->RegY) && /* Value of Y is known */
1072 E->AM == AM65_ZP && /* Store into zp */
1073 In->RegY == ZPRegVal (E->Chg, In)) { /* Value identical */
1077 /* If the value in the Y register is known and the same as
1078 * that in the A register, replace the store by a STA. The
1079 * optimizer will then remove the load instruction for Y
1080 * later. If replacement by A is not possible try a
1081 * replacement by X, but check for invalid addressing modes
1084 } else if (RegValIsKnown (In->RegY)) {
1085 if (In->RegY == In->RegA) {
1086 CE_ReplaceOPC (E, OP65_STA);
1087 } else if (In->RegY == In->RegX &&
1088 E->AM != AM65_ABSX &&
1089 E->AM != AM65_ZPX) {
1090 CE_ReplaceOPC (E, OP65_STX);
1096 /* If we store into a known zero page location, and this
1097 * location does already contain the value to be stored,
1100 if ((CPUIsets[CPU] & CPU_ISET_65SC02) != 0 && E->AM == AM65_ZP) {
1101 if (ZPRegVal (E->Chg, In) == 0) {
1108 if (RegValIsKnown (In->RegA) &&
1109 In->RegA == In->RegX &&
1110 (N = CS_GetNextEntry (S, I)) != 0 &&
1111 !CE_UseLoadFlags (N)) {
1112 /* Value is identical and not followed by a branch */
1118 if (RegValIsKnown (In->RegA) &&
1119 In->RegA == In->RegY &&
1120 (N = CS_GetNextEntry (S, I)) != 0 &&
1121 !CE_UseLoadFlags (N)) {
1122 /* Value is identical and not followed by a branch */
1128 if (RegValIsKnown (In->RegX) &&
1129 In->RegX == In->RegA &&
1130 (N = CS_GetNextEntry (S, I)) != 0 &&
1131 !CE_UseLoadFlags (N)) {
1132 /* Value is identical and not followed by a branch */
1138 if (RegValIsKnown (In->RegY) &&
1139 In->RegY == In->RegA &&
1140 (N = CS_GetNextEntry (S, I)) != 0 &&
1141 !CE_UseLoadFlags (N)) {
1142 /* Value is identical and not followed by a branch */
1152 /* Delete the entry if requested */
1155 /* Register value is not used, remove the load */
1158 /* Remember, we had changes */
1170 /* Free register info */
1173 /* Return the number of changes made */
1179 unsigned OptStoreLoad (CodeSeg* S)
1180 /* Remove a store followed by a load from the same location. */
1182 unsigned Changes = 0;
1184 /* Walk over the entries */
1186 while (I < CS_GetEntryCount (S)) {
1191 /* Get next entry */
1192 CodeEntry* E = CS_GetEntry (S, I);
1194 /* Check if it is a store instruction followed by a load from the
1195 * same address which is itself not followed by a conditional branch.
1197 if ((E->Info & OF_STORE) != 0 &&
1198 (N = CS_GetNextEntry (S, I)) != 0 &&
1201 ((E->OPC == OP65_STA && N->OPC == OP65_LDA) ||
1202 (E->OPC == OP65_STX && N->OPC == OP65_LDX) ||
1203 (E->OPC == OP65_STY && N->OPC == OP65_LDY)) &&
1204 strcmp (E->Arg, N->Arg) == 0 &&
1205 (X = CS_GetNextEntry (S, I+1)) != 0 &&
1206 !CE_UseLoadFlags (X)) {
1208 /* Register has already the correct value, remove the load */
1209 CS_DelEntry (S, I+1);
1211 /* Remember, we had changes */
1221 /* Return the number of changes made */
1227 unsigned OptTransfers1 (CodeSeg* S)
1228 /* Remove transfers from one register to another and back */
1230 unsigned Changes = 0;
1232 /* Walk over the entries */
1234 while (I < CS_GetEntryCount (S)) {
1240 /* Get next entry */
1241 CodeEntry* E = CS_GetEntry (S, I);
1243 /* Check if we have two transfer instructions */
1244 if ((E->Info & OF_XFR) != 0 &&
1245 (N = CS_GetNextEntry (S, I)) != 0 &&
1247 (N->Info & OF_XFR) != 0) {
1249 /* Check if it's a transfer and back */
1250 if ((E->OPC == OP65_TAX && N->OPC == OP65_TXA && !RegXUsed (S, I+2)) ||
1251 (E->OPC == OP65_TAY && N->OPC == OP65_TYA && !RegYUsed (S, I+2)) ||
1252 (E->OPC == OP65_TXA && N->OPC == OP65_TAX && !RegAUsed (S, I+2)) ||
1253 (E->OPC == OP65_TYA && N->OPC == OP65_TAY && !RegAUsed (S, I+2))) {
1255 /* If the next insn is a conditional branch, check if the insn
1256 * preceeding the first xfr will set the flags right, otherwise we
1257 * may not remove the sequence.
1259 if ((X = CS_GetNextEntry (S, I+1)) == 0) {
1262 if (CE_UseLoadFlags (X)) {
1264 /* No preceeding entry */
1267 P = CS_GetEntry (S, I-1);
1268 if ((P->Info & OF_SETF) == 0) {
1269 /* Does not set the flags */
1274 /* Remove both transfers */
1275 CS_DelEntry (S, I+1);
1278 /* Remember, we had changes */
1289 /* Return the number of changes made */
1295 unsigned OptTransfers2 (CodeSeg* S)
1296 /* Replace loads followed by a register transfer by a load with the second
1297 * register if possible.
1300 unsigned Changes = 0;
1302 /* Walk over the entries */
1304 while (I < CS_GetEntryCount (S)) {
1308 /* Get next entry */
1309 CodeEntry* E = CS_GetEntry (S, I);
1311 /* Check if we have a load followed by a transfer where the loaded
1312 * register is not used later.
1314 if ((E->Info & OF_LOAD) != 0 &&
1315 (N = CS_GetNextEntry (S, I)) != 0 &&
1317 (N->Info & OF_XFR) != 0 &&
1318 GetRegInfo (S, I+2, E->Chg) != E->Chg) {
1322 if (E->OPC == OP65_LDA && N->OPC == OP65_TAX) {
1323 /* LDA/TAX - check for the right addressing modes */
1324 if (E->AM == AM65_IMM ||
1326 E->AM == AM65_ABS ||
1327 E->AM == AM65_ABSY) {
1329 X = NewCodeEntry (OP65_LDX, E->AM, E->Arg, 0, N->LI);
1331 } else if (E->OPC == OP65_LDA && N->OPC == OP65_TAY) {
1332 /* LDA/TAY - check for the right addressing modes */
1333 if (E->AM == AM65_IMM ||
1335 E->AM == AM65_ZPX ||
1336 E->AM == AM65_ABS ||
1337 E->AM == AM65_ABSX) {
1339 X = NewCodeEntry (OP65_LDY, E->AM, E->Arg, 0, N->LI);
1341 } else if (E->OPC == OP65_LDY && N->OPC == OP65_TYA) {
1342 /* LDY/TYA. LDA supports all addressing modes LDY does */
1343 X = NewCodeEntry (OP65_LDA, E->AM, E->Arg, 0, N->LI);
1344 } else if (E->OPC == OP65_LDX && N->OPC == OP65_TXA) {
1345 /* LDX/TXA. LDA doesn't support zp,y, so we must map it to
1348 am_t AM = (E->AM == AM65_ZPY)? AM65_ABSY : E->AM;
1349 X = NewCodeEntry (OP65_LDA, AM, E->Arg, 0, N->LI);
1352 /* If we have a load entry, add it and remove the old stuff */
1354 CS_InsertEntry (S, X, I+2);
1355 CS_DelEntries (S, I, 2);
1357 --I; /* Correct for one entry less */
1365 /* Return the number of changes made */
1371 unsigned OptTransfers3 (CodeSeg* S)
1372 /* Replace a register transfer followed by a store of the second register by a
1373 * store of the first register if this is possible.
1376 unsigned Changes = 0;
1377 unsigned UsedRegs = REG_NONE; /* Track used registers */
1378 unsigned Xfer = 0; /* Index of transfer insn */
1379 unsigned Store = 0; /* Index of store insn */
1380 CodeEntry* XferEntry = 0; /* Pointer to xfer insn */
1381 CodeEntry* StoreEntry = 0; /* Pointer to store insn */
1388 } State = Initialize;
1390 /* Walk over the entries. Look for a xfer instruction that is followed by
1391 * a store later, where the value of the register is not used later.
1394 while (I < CS_GetEntryCount (S)) {
1396 /* Get next entry */
1397 CodeEntry* E = CS_GetEntry (S, I);
1402 /* Clear the list of used registers */
1403 UsedRegs = REG_NONE;
1407 if (E->Info & OF_XFR) {
1408 /* Found start of sequence */
1416 /* If we find a conditional jump, abort the sequence, since
1417 * handling them makes things really complicated.
1419 if (E->Info & OF_CBRA) {
1421 /* Switch back to searching */
1425 /* Does this insn use the target register of the transfer? */
1426 } else if ((E->Use & XferEntry->Chg) != 0) {
1428 /* It it's a store instruction, and the block is a basic
1429 * block, proceed. Otherwise restart
1431 if ((E->Info & OF_STORE) != 0 &&
1432 CS_IsBasicBlock (S, Xfer, I)) {
1441 /* Does this insn change the target register of the transfer? */
1442 } else if (E->Chg & XferEntry->Chg) {
1444 /* We *may* add code here to remove the transfer, but I'm
1445 * currently not sure about the consequences, so I won't
1446 * do that and bail out instead.
1451 /* Does this insn have a label? */
1452 } else if (CE_HasLabel (E)) {
1454 /* Too complex to handle - bail out */
1459 /* Track used registers */
1465 /* We are at the instruction behind the store. If the register
1466 * isn't used later, and we have an address mode match, we can
1467 * replace the transfer by a store and remove the store here.
1469 if ((GetRegInfo (S, I, XferEntry->Chg) & XferEntry->Chg) == 0 &&
1470 (StoreEntry->AM == AM65_ABS ||
1471 StoreEntry->AM == AM65_ZP) &&
1472 (StoreEntry->AM != AM65_ZP ||
1473 (StoreEntry->Chg & UsedRegs) == 0) &&
1474 !MemAccess (S, Xfer+1, Store-1, StoreEntry->Arg)) {
1476 /* Generate the replacement store insn */
1478 switch (XferEntry->OPC) {
1481 X = NewCodeEntry (OP65_STX,
1489 X = NewCodeEntry (OP65_STA,
1497 X = NewCodeEntry (OP65_STY,
1505 X = NewCodeEntry (OP65_STA,
1516 /* If we have a replacement store, change the code */
1518 /* Insert after the xfer insn */
1519 CS_InsertEntry (S, X, Xfer+1);
1521 /* Remove the xfer instead */
1522 CS_DelEntry (S, Xfer);
1524 /* Remove the final store */
1525 CS_DelEntry (S, Store);
1527 /* Correct I so we continue with the next insn */
1530 /* Remember we had changes */
1533 /* Restart after last xfer insn */
1537 /* Restart after last xfer insn */
1549 /* Return the number of changes made */
1555 unsigned OptTransfers4 (CodeSeg* S)
1556 /* Replace a load of a register followed by a transfer insn of the same register
1557 * by a load of the second register if possible.
1560 unsigned Changes = 0;
1561 unsigned Load = 0; /* Index of load insn */
1562 unsigned Xfer = 0; /* Index of transfer insn */
1563 CodeEntry* LoadEntry = 0; /* Pointer to load insn */
1564 CodeEntry* XferEntry = 0; /* Pointer to xfer insn */
1572 /* Walk over the entries. Look for a load instruction that is followed by
1576 while (I < CS_GetEntryCount (S)) {
1578 /* Get next entry */
1579 CodeEntry* E = CS_GetEntry (S, I);
1584 if (E->Info & OF_LOAD) {
1585 /* Found start of sequence */
1593 /* If we find a conditional jump, abort the sequence, since
1594 * handling them makes things really complicated.
1596 if (E->Info & OF_CBRA) {
1598 /* Switch back to searching */
1602 /* Does this insn use the target register of the load? */
1603 } else if ((E->Use & LoadEntry->Chg) != 0) {
1605 /* It it's a xfer instruction, and the block is a basic
1606 * block, proceed. Otherwise restart
1608 if ((E->Info & OF_XFR) != 0 &&
1609 CS_IsBasicBlock (S, Load, I)) {
1618 /* Does this insn change the target register of the load? */
1619 } else if (E->Chg & LoadEntry->Chg) {
1621 /* We *may* add code here to remove the load, but I'm
1622 * currently not sure about the consequences, so I won't
1623 * do that and bail out instead.
1631 /* We are at the instruction behind the xfer. If the register
1632 * isn't used later, and we have an address mode match, we can
1633 * replace the transfer by a load and remove the initial load.
1635 if ((GetRegInfo (S, I, LoadEntry->Chg) & LoadEntry->Chg) == 0 &&
1636 (LoadEntry->AM == AM65_ABS ||
1637 LoadEntry->AM == AM65_ZP ||
1638 LoadEntry->AM == AM65_IMM) &&
1639 !MemAccess (S, Load+1, Xfer-1, LoadEntry->Arg)) {
1641 /* Generate the replacement load insn */
1643 switch (XferEntry->OPC) {
1647 X = NewCodeEntry (OP65_LDA,
1655 X = NewCodeEntry (OP65_LDX,
1663 X = NewCodeEntry (OP65_LDY,
1674 /* If we have a replacement load, change the code */
1676 /* Insert after the xfer insn */
1677 CS_InsertEntry (S, X, Xfer+1);
1679 /* Remove the xfer instead */
1680 CS_DelEntry (S, Xfer);
1682 /* Remove the initial load */
1683 CS_DelEntry (S, Load);
1685 /* Correct I so we continue with the next insn */
1688 /* Remember we had changes */
1691 /* Restart after last xfer insn */
1695 /* Restart after last xfer insn */
1707 /* Return the number of changes made */
1713 unsigned OptPushPop (CodeSeg* S)
1714 /* Remove a PHA/PLA sequence were A is not used later */
1716 unsigned Changes = 0;
1717 unsigned Push = 0; /* Index of push insn */
1718 unsigned Pop = 0; /* Index of pop insn */
1723 } State = Searching;
1725 /* Walk over the entries. Look for a push instruction that is followed by
1726 * a pop later, where the pop is not followed by an conditional branch,
1727 * and where the value of the A register is not used later on.
1728 * Look out for the following problems:
1730 * - There may be another PHA/PLA inside the sequence: Restart it.
1731 * - If the PLA has a label, all jumps to this label must be inside
1732 * the sequence, otherwise we cannot remove the PHA/PLA.
1735 while (I < CS_GetEntryCount (S)) {
1739 /* Get next entry */
1740 CodeEntry* E = CS_GetEntry (S, I);
1745 if (E->OPC == OP65_PHA) {
1746 /* Found start of sequence */
1753 if (E->OPC == OP65_PHA) {
1754 /* Inner push/pop, restart */
1756 } else if (E->OPC == OP65_PLA) {
1757 /* Found a matching pop */
1759 /* Check that the block between Push and Pop is a basic
1760 * block (one entry, one exit). Otherwise ignore it.
1762 if (CS_IsBasicBlock (S, Push, Pop)) {
1765 /* Go into searching mode again */
1772 /* We're at the instruction after the PLA.
1773 * Check for the following conditions:
1774 * - If this instruction is a store of A, and A is not used
1775 * later, we may replace the PHA by the store and remove
1776 * pla if several other conditions are met.
1777 * - If this instruction is not a conditional branch, and A
1778 * is unused later, we may remove PHA and PLA.
1780 if (E->OPC == OP65_STA &&
1781 !RegAUsed (S, I+1) &&
1782 !MemAccess (S, Push+1, Pop-1, E->Arg)) {
1784 /* Insert a STA after the PHA */
1785 X = NewCodeEntry (E->OPC, E->AM, E->Arg, E->JumpTo, E->LI);
1786 CS_InsertEntry (S, X, Push+1);
1788 /* Remove the PHA instead */
1789 CS_DelEntry (S, Push);
1791 /* Remove the PLA/STA sequence */
1792 CS_DelEntries (S, Pop, 2);
1794 /* Correct I so we continue with the next insn */
1797 /* Remember we had changes */
1800 } else if ((E->Info & OF_CBRA) == 0 &&
1803 /* We can remove the PHA and PLA instructions */
1804 CS_DelEntry (S, Pop);
1805 CS_DelEntry (S, Push);
1807 /* Correct I so we continue with the next insn */
1810 /* Remember we had changes */
1814 /* Go into search mode again */
1824 /* Return the number of changes made */
1830 unsigned OptPrecalc (CodeSeg* S)
1831 /* Replace immediate operations with the accu where the current contents are
1832 * known by a load of the final value.
1835 unsigned Changes = 0;
1838 /* Generate register info for this step */
1841 /* Walk over the entries */
1843 while (I < CS_GetEntryCount (S)) {
1845 /* Get next entry */
1846 CodeEntry* E = CS_GetEntry (S, I);
1848 /* Get pointers to the input and output registers of the insn */
1849 const RegContents* Out = &E->RI->Out;
1850 const RegContents* In = &E->RI->In;
1852 /* Argument for LDn and flag */
1853 const char* Arg = 0;
1854 opc_t OPC = OP65_LDA;
1856 /* Handle the different instructions */
1860 if (E->AM != AM65_IMM && RegValIsKnown (Out->RegA)) {
1861 /* Result of load is known */
1862 Arg = MakeHexArg (Out->RegA);
1867 if (E->AM != AM65_IMM && RegValIsKnown (Out->RegX)) {
1868 /* Result of load is known but register is X */
1869 Arg = MakeHexArg (Out->RegX);
1875 if (E->AM != AM65_IMM && RegValIsKnown (Out->RegY)) {
1876 /* Result of load is known but register is Y */
1877 Arg = MakeHexArg (Out->RegY);
1887 if (RegValIsKnown (Out->RegA)) {
1888 /* Accu op zp with known contents */
1889 Arg = MakeHexArg (Out->RegA);
1894 if (CE_IsKnownImm (E, 0xFF)) {
1895 /* AND with 0xFF, remove */
1898 } else if (CE_IsKnownImm (E, 0x00)) {
1899 /* AND with 0x00, replace by lda #$00 */
1900 Arg = MakeHexArg (0x00);
1901 } else if (RegValIsKnown (Out->RegA)) {
1902 /* Accu AND zp with known contents */
1903 Arg = MakeHexArg (Out->RegA);
1904 } else if (In->RegA == 0xFF) {
1905 /* AND but A contains 0xFF - replace by lda */
1906 CE_ReplaceOPC (E, OP65_LDA);
1912 if (CE_IsKnownImm (E, 0x00)) {
1913 /* ORA with zero, remove */
1916 } else if (CE_IsKnownImm (E, 0xFF)) {
1917 /* ORA with 0xFF, replace by lda #$ff */
1918 Arg = MakeHexArg (0xFF);
1919 } else if (RegValIsKnown (Out->RegA)) {
1920 /* Accu AND zp with known contents */
1921 Arg = MakeHexArg (Out->RegA);
1922 } else if (In->RegA == 0) {
1923 /* ORA but A contains 0x00 - replace by lda */
1924 CE_ReplaceOPC (E, OP65_LDA);
1934 /* Check if we have to replace the insn by LDA */
1936 CodeEntry* X = NewCodeEntry (OPC, AM65_IMM, Arg, 0, E->LI);
1937 CS_InsertEntry (S, X, I+1);
1946 /* Free register info */
1949 /* Return the number of changes made */
1955 /*****************************************************************************/
1956 /* Optimize branch types */
1957 /*****************************************************************************/
1961 unsigned OptBranchDist (CodeSeg* S)
1962 /* Change branches for the distance needed. */
1964 unsigned Changes = 0;
1966 /* Walk over the entries */
1968 while (I < CS_GetEntryCount (S)) {
1970 /* Get next entry */
1971 CodeEntry* E = CS_GetEntry (S, I);
1973 /* Check if it's a conditional branch to a local label. */
1974 if (E->Info & OF_CBRA) {
1976 /* Is this a branch to a local symbol? */
1977 if (E->JumpTo != 0) {
1979 /* Check if the branch distance is short */
1980 int IsShort = IsShortDist (GetBranchDist (S, I, E->JumpTo->Owner));
1982 /* Make the branch short/long according to distance */
1983 if ((E->Info & OF_LBRA) == 0 && !IsShort) {
1984 /* Short branch but long distance */
1985 CE_ReplaceOPC (E, MakeLongBranch (E->OPC));
1987 } else if ((E->Info & OF_LBRA) != 0 && IsShort) {
1988 /* Long branch but short distance */
1989 CE_ReplaceOPC (E, MakeShortBranch (E->OPC));
1993 } else if ((E->Info & OF_LBRA) == 0) {
1995 /* Short branch to external symbol - make it long */
1996 CE_ReplaceOPC (E, MakeLongBranch (E->OPC));
2001 } else if ((CPUIsets[CPU] & CPU_ISET_65SC02) != 0 &&
2002 (E->Info & OF_UBRA) != 0 &&
2004 IsShortDist (GetBranchDist (S, I, E->JumpTo->Owner))) {
2006 /* The jump is short and may be replaced by a BRA on the 65C02 CPU */
2007 CE_ReplaceOPC (E, OP65_BRA);
2016 /* Return the number of changes made */