1 /*****************************************************************************/
5 /* Environment independent low level optimizations */
9 /* (C) 2001-2009, Ullrich von Bassewitz */
10 /* Roemerstrasse 52 */
11 /* D-70794 Filderstadt */
12 /* EMail: uz@cc65.org */
15 /* This software is provided 'as-is', without any expressed or implied */
16 /* warranty. In no event will the authors be held liable for any damages */
17 /* arising from the use of this software. */
19 /* Permission is granted to anyone to use this software for any purpose, */
20 /* including commercial applications, and to alter it and redistribute it */
21 /* freely, subject to the following restrictions: */
23 /* 1. The origin of this software must not be misrepresented; you must not */
24 /* claim that you wrote the original software. If you use this software */
25 /* in a product, an acknowledgment in the product documentation would be */
26 /* appreciated but is not required. */
27 /* 2. Altered source versions must be plainly marked as such, and must not */
28 /* be misrepresented as being the original software. */
29 /* 3. This notice may not be removed or altered from any source */
32 /*****************************************************************************/
48 /*****************************************************************************/
49 /* Helper functions */
50 /*****************************************************************************/
54 static int MemAccess (CodeSeg* S, unsigned From, unsigned To, const char* Arg)
55 /* Checks a range of code entries if there are any memory accesses to Arg.
56 * Note: This function is not 100% safe, because there is more than one way
57 * to express a memory location ("foo" and "foo+0" comes to mind) and there
58 * may be other accesses through pointers. For the code generated by cc65 and
59 * for the purpose of the caller (OptPushPop) it is assumed to be safe enough
63 /* Walk over all code entries */
66 /* Get the next entry */
67 CodeEntry* E = CS_GetEntry (S, From);
69 /* For simplicity, we just check if there is an argument and if this
70 * argument equals Arg.
72 if (E->Arg && strcmp (E->Arg, Arg) == 0) {
87 static int GetBranchDist (CodeSeg* S, unsigned From, CodeEntry* To)
88 /* Get the branch distance between the two entries and return it. The distance
89 * will be negative for backward jumps and positive for forward jumps.
92 /* Get the index of the branch target */
93 unsigned TI = CS_GetEntryIndex (S, To);
95 /* Determine the branch distance */
98 /* Forward branch, do not count the current insn */
101 CodeEntry* N = CS_GetEntry (S, J++);
105 /* Backward branch */
108 CodeEntry* N = CS_GetEntry (S, J++);
113 /* Return the calculated distance */
119 static int IsShortDist (int Distance)
120 /* Return true if the given distance is a short branch distance */
122 return (Distance >= -125 && Distance <= 125);
127 static short ZPRegVal (unsigned short Use, const RegContents* RC)
128 /* Return the contents of the given zeropage register */
130 if ((Use & REG_TMP1) != 0) {
132 } else if ((Use & REG_PTR1_LO) != 0) {
134 } else if ((Use & REG_PTR1_HI) != 0) {
136 } else if ((Use & REG_SREG_LO) != 0) {
138 } else if ((Use & REG_SREG_HI) != 0) {
141 return UNKNOWN_REGVAL;
147 static short RegVal (unsigned short Use, const RegContents* RC)
148 /* Return the contents of the given register */
150 if ((Use & REG_A) != 0) {
152 } else if ((Use & REG_X) != 0) {
154 } else if ((Use & REG_Y) != 0) {
157 return ZPRegVal (Use, RC);
163 /*****************************************************************************/
164 /* Replace jumps to RTS by RTS */
165 /*****************************************************************************/
169 unsigned OptRTSJumps1 (CodeSeg* S)
170 /* Replace jumps to RTS by RTS */
172 unsigned Changes = 0;
174 /* Walk over all entries minus the last one */
176 while (I < CS_GetEntryCount (S)) {
178 /* Get the next entry */
179 CodeEntry* E = CS_GetEntry (S, I);
181 /* Check if it's an unconditional branch to a local target */
182 if ((E->Info & OF_UBRA) != 0 &&
184 E->JumpTo->Owner->OPC == OP65_RTS) {
186 /* Insert an RTS instruction */
187 CodeEntry* X = NewCodeEntry (OP65_RTS, AM65_IMP, 0, 0, E->LI);
188 CS_InsertEntry (S, X, I+1);
190 /* Delete the jump */
193 /* Remember, we had changes */
203 /* Return the number of changes made */
209 unsigned OptRTSJumps2 (CodeSeg* S)
210 /* Replace long conditional jumps to RTS */
212 unsigned Changes = 0;
214 /* Walk over all entries minus the last one */
216 while (I < CS_GetEntryCount (S)) {
220 /* Get the next entry */
221 CodeEntry* E = CS_GetEntry (S, I);
223 /* Check if it's an unconditional branch to a local target */
224 if ((E->Info & OF_CBRA) != 0 && /* Conditional branch */
225 (E->Info & OF_LBRA) != 0 && /* Long branch */
226 E->JumpTo != 0 && /* Local label */
227 E->JumpTo->Owner->OPC == OP65_RTS && /* Target is an RTS */
228 (N = CS_GetNextEntry (S, I)) != 0) { /* There is a next entry */
234 /* We will create a jump around an RTS instead of the long branch */
235 X = NewCodeEntry (OP65_RTS, AM65_IMP, 0, 0, E->JumpTo->Owner->LI);
236 CS_InsertEntry (S, X, I+1);
238 /* Get the new branch opcode */
239 NewBranch = MakeShortBranch (GetInverseBranch (E->OPC));
241 /* Get the label attached to N, create a new one if needed */
242 LN = CS_GenLabel (S, N);
244 /* Generate the branch */
245 X = NewCodeEntry (NewBranch, AM65_BRA, LN->Name, LN, E->LI);
246 CS_InsertEntry (S, X, I+1);
248 /* Delete the long branch */
251 /* Remember, we had changes */
261 /* Return the number of changes made */
267 /*****************************************************************************/
268 /* Remove dead jumps */
269 /*****************************************************************************/
273 unsigned OptDeadJumps (CodeSeg* S)
274 /* Remove dead jumps (jumps to the next instruction) */
276 unsigned Changes = 0;
278 /* Walk over all entries minus the last one */
280 while (I < CS_GetEntryCount (S)) {
282 /* Get the next entry */
283 CodeEntry* E = CS_GetEntry (S, I);
285 /* Check if it's a branch, if it has a local target, and if the target
286 * is the next instruction.
288 if (E->AM == AM65_BRA &&
290 E->JumpTo->Owner == CS_GetNextEntry (S, I)) {
292 /* Delete the dead jump */
295 /* Remember, we had changes */
306 /* Return the number of changes made */
312 /*****************************************************************************/
313 /* Remove dead code */
314 /*****************************************************************************/
318 unsigned OptDeadCode (CodeSeg* S)
319 /* Remove dead code (code that follows an unconditional jump or an rts/rti
323 unsigned Changes = 0;
325 /* Walk over all entries */
327 while (I < CS_GetEntryCount (S)) {
333 CodeEntry* E = CS_GetEntry (S, I);
335 /* Check if it's an unconditional branch, and if the next entry has
336 * no labels attached, or if the label is just used so that the insn
337 * can jump to itself.
339 if ((E->Info & OF_DEAD) != 0 && /* Dead code follows */
340 (N = CS_GetNextEntry (S, I)) != 0 && /* Has next entry */
341 (!CE_HasLabel (N) || /* Don't has a label */
342 ((N->Info & OF_UBRA) != 0 && /* Uncond branch */
343 (LN = N->JumpTo) != 0 && /* Jumps to known label */
344 LN->Owner == N && /* Attached to insn */
345 CL_GetRefCount (LN) == 1))) { /* Only reference */
347 /* Delete the next entry */
348 CS_DelEntry (S, I+1);
350 /* Remember, we had changes */
361 /* Return the number of changes made */
367 /*****************************************************************************/
368 /* Optimize jump cascades */
369 /*****************************************************************************/
373 unsigned OptJumpCascades (CodeSeg* S)
374 /* Optimize jump cascades (jumps to jumps). In such a case, the jump is
375 * replaced by a jump to the final location. This will in some cases produce
376 * worse code, because some jump targets are no longer reachable by short
377 * branches, but this is quite rare, so there are more advantages than
381 unsigned Changes = 0;
383 /* Walk over all entries */
385 while (I < CS_GetEntryCount (S)) {
391 CodeEntry* E = CS_GetEntry (S, I);
393 /* Check if it's a branch, if it has a jump label, if this jump
394 * label is not attached to the instruction itself, and if the
395 * target instruction is itself a branch.
397 if ((E->Info & OF_BRA) != 0 &&
398 (OldLabel = E->JumpTo) != 0 &&
399 (N = OldLabel->Owner) != E &&
400 (N->Info & OF_BRA) != 0) {
402 /* Check if we can use the final target label. This is the case,
403 * if the target branch is an absolut branch, or if it is a
404 * conditional branch checking the same condition as the first one.
406 if ((N->Info & OF_UBRA) != 0 ||
407 ((E->Info & OF_CBRA) != 0 &&
408 GetBranchCond (E->OPC) == GetBranchCond (N->OPC))) {
410 /* This is a jump cascade and we may jump to the final target,
411 * provided that the other insn does not jump to itself. If
412 * this is the case, we can also jump to ourselves, otherwise
413 * insert a jump to the new instruction and remove the old one.
416 CodeLabel* LN = N->JumpTo;
418 if (LN != 0 && LN->Owner == N) {
420 /* We found a jump to a jump to itself. Replace our jump
421 * by a jump to itself.
423 CodeLabel* LE = CS_GenLabel (S, E);
424 X = NewCodeEntry (E->OPC, E->AM, LE->Name, LE, E->LI);
428 /* Jump to the final jump target */
429 X = NewCodeEntry (E->OPC, E->AM, N->Arg, N->JumpTo, E->LI);
433 /* Insert it behind E */
434 CS_InsertEntry (S, X, I+1);
439 /* Remember, we had changes */
442 /* Check if both are conditional branches, and the condition of
443 * the second is the inverse of that of the first. In this case,
444 * the second branch will never be taken, and we may jump directly
445 * to the instruction behind this one.
447 } else if ((E->Info & OF_CBRA) != 0 && (N->Info & OF_CBRA) != 0) {
449 CodeEntry* X; /* Instruction behind N */
450 CodeLabel* LX; /* Label attached to X */
452 /* Get the branch conditions of both branches */
453 bc_t BC1 = GetBranchCond (E->OPC);
454 bc_t BC2 = GetBranchCond (N->OPC);
456 /* Check the branch conditions */
457 if (BC1 != GetInverseCond (BC2)) {
458 /* Condition not met */
462 /* We may jump behind this conditional branch. Get the
463 * pointer to the next instruction
465 if ((X = CS_GetNextEntry (S, CS_GetEntryIndex (S, N))) == 0) {
466 /* N is the last entry, bail out */
470 /* Get the label attached to X, create a new one if needed */
471 LX = CS_GenLabel (S, X);
473 /* Move the reference from E to the new label */
474 CS_MoveLabelRef (S, E, LX);
476 /* Remember, we had changes */
487 /* Return the number of changes made */
493 /*****************************************************************************/
494 /* Optimize jsr/rts */
495 /*****************************************************************************/
499 unsigned OptRTS (CodeSeg* S)
500 /* Optimize subroutine calls followed by an RTS. The subroutine call will get
501 * replaced by a jump. Don't bother to delete the RTS if it does not have a
502 * label, the dead code elimination should take care of it.
505 unsigned Changes = 0;
507 /* Walk over all entries minus the last one */
509 while (I < CS_GetEntryCount (S)) {
514 CodeEntry* E = CS_GetEntry (S, I);
516 /* Check if it's a subroutine call and if the following insn is RTS */
517 if (E->OPC == OP65_JSR &&
518 (N = CS_GetNextEntry (S, I)) != 0 &&
519 N->OPC == OP65_RTS) {
521 /* Change the jsr to a jmp and use the additional info for a jump */
523 CE_ReplaceOPC (E, OP65_JMP);
525 /* Remember, we had changes */
535 /* Return the number of changes made */
541 /*****************************************************************************/
542 /* Optimize jump targets */
543 /*****************************************************************************/
547 unsigned OptJumpTarget (CodeSeg* S)
548 /* If the instruction preceeding an unconditional branch is the same as the
549 * instruction preceeding the jump target, the jump target may be moved
550 * one entry back. This is a size optimization, since the instruction before
551 * the branch gets removed.
554 unsigned Changes = 0;
555 CodeEntry* E1; /* Entry 1 */
556 CodeEntry* E2; /* Entry 2 */
557 CodeEntry* T1; /* Jump target entry 1 */
558 CodeLabel* TL1; /* Target label 1 */
560 /* Walk over the entries */
562 while (I < CS_GetEntryCount (S)) {
565 E2 = CS_GetNextEntry (S, I);
567 /* Check if we have a jump or branch, and a matching label, which
568 * is not attached to the jump itself
571 (E2->Info & OF_UBRA) != 0 &&
573 E2->JumpTo->Owner != E2) {
575 /* Get the entry preceeding the branch target */
576 T1 = CS_GetPrevEntry (S, CS_GetEntryIndex (S, E2->JumpTo->Owner));
578 /* There is no such entry */
582 /* Get the entry preceeding the jump */
583 E1 = CS_GetEntry (S, I);
585 /* Check if both preceeding instructions are identical */
586 if (!CodeEntriesAreEqual (E1, T1)) {
587 /* Not equal, try next */
591 /* Get the label for the instruction preceeding the jump target.
592 * This routine will create a new label if the instruction does
593 * not already have one.
595 TL1 = CS_GenLabel (S, T1);
597 /* Change the jump target to point to this new label */
598 CS_MoveLabelRef (S, E2, TL1);
600 /* If the instruction preceeding the jump has labels attached,
601 * move references to this label to the new label.
603 if (CE_HasLabel (E1)) {
604 CS_MoveLabels (S, E1, T1);
607 /* Remove the entry preceeding the jump */
610 /* Remember, we had changes */
620 /* Return the number of changes made */
626 /*****************************************************************************/
627 /* Optimize conditional branches */
628 /*****************************************************************************/
632 unsigned OptCondBranches (CodeSeg* S)
633 /* Performs several optimization steps:
635 * - If an immidiate load of a register is followed by a conditional jump that
636 * is never taken because the load of the register sets the flags in such a
637 * manner, remove the conditional branch.
638 * - If the conditional branch is always taken because of the register load,
639 * replace it by a jmp.
640 * - If a conditional branch jumps around an unconditional branch, remove the
641 * conditional branch and make the jump a conditional branch with the
642 * inverse condition of the first one.
645 unsigned Changes = 0;
647 /* Walk over the entries */
649 while (I < CS_GetEntryCount (S)) {
655 CodeEntry* E = CS_GetEntry (S, I);
657 /* Check if it's a register load */
658 if ((E->Info & OF_LOAD) != 0 && /* It's a load instruction */
659 E->AM == AM65_IMM && /* ..with immidiate addressing */
660 (E->Flags & CEF_NUMARG) != 0 && /* ..and a numeric argument. */
661 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a following entry */
662 (N->Info & OF_CBRA) != 0 && /* ..which is a conditional branch */
663 !CE_HasLabel (N)) { /* ..and does not have a label */
665 /* Get the branch condition */
666 bc_t BC = GetBranchCond (N->OPC);
668 /* Check the argument against the branch condition */
669 if ((BC == BC_EQ && E->Num != 0) ||
670 (BC == BC_NE && E->Num == 0) ||
671 (BC == BC_PL && (E->Num & 0x80) != 0) ||
672 (BC == BC_MI && (E->Num & 0x80) == 0)) {
674 /* Remove the conditional branch */
675 CS_DelEntry (S, I+1);
677 /* Remember, we had changes */
680 } else if ((BC == BC_EQ && E->Num == 0) ||
681 (BC == BC_NE && E->Num != 0) ||
682 (BC == BC_PL && (E->Num & 0x80) == 0) ||
683 (BC == BC_MI && (E->Num & 0x80) != 0)) {
685 /* The branch is always taken, replace it by a jump */
686 CE_ReplaceOPC (N, OP65_JMP);
688 /* Remember, we had changes */
694 if ((E->Info & OF_CBRA) != 0 && /* It's a conditional branch */
695 (L = E->JumpTo) != 0 && /* ..referencing a local label */
696 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a following entry */
697 (N->Info & OF_UBRA) != 0 && /* ..which is an uncond branch, */
698 !CE_HasLabel (N) && /* ..has no label attached */
699 L->Owner == CS_GetNextEntry (S, I+1)) {/* ..and jump target follows */
701 /* Replace the jump by a conditional branch with the inverse branch
702 * condition than the branch around it.
704 CE_ReplaceOPC (N, GetInverseBranch (E->OPC));
706 /* Remove the conditional branch */
709 /* Remember, we had changes */
719 /* Return the number of changes made */
725 /*****************************************************************************/
726 /* Remove unused loads and stores */
727 /*****************************************************************************/
731 unsigned OptUnusedLoads (CodeSeg* S)
732 /* Remove loads of registers where the value loaded is not used later. */
734 unsigned Changes = 0;
736 /* Walk over the entries */
738 while (I < CS_GetEntryCount (S)) {
743 CodeEntry* E = CS_GetEntry (S, I);
745 /* Check if it's a register load or transfer insn */
746 if ((E->Info & (OF_LOAD | OF_XFR | OF_REG_INCDEC)) != 0 &&
747 (N = CS_GetNextEntry (S, I)) != 0 &&
748 !CE_UseLoadFlags (N)) {
750 /* Check which sort of load or transfer it is */
757 case OP65_TYA: R = REG_A; break;
761 case OP65_TAX: R = REG_X; break;
765 case OP65_TAY: R = REG_Y; break;
766 default: goto NextEntry; /* OOPS */
769 /* Get register usage and check if the register value is used later */
770 if ((GetRegInfo (S, I+1, R) & R) == 0) {
772 /* Register value is not used, remove the load */
775 /* Remember, we had changes. Account the deleted entry in I. */
788 /* Return the number of changes made */
794 unsigned OptUnusedStores (CodeSeg* S)
795 /* Remove stores into zero page registers that aren't used later */
797 unsigned Changes = 0;
799 /* Walk over the entries */
801 while (I < CS_GetEntryCount (S)) {
804 CodeEntry* E = CS_GetEntry (S, I);
806 /* Check if it's a register load or transfer insn */
807 if ((E->Info & OF_STORE) != 0 &&
809 (E->Chg & REG_ZP) != 0) {
811 /* Check for the zero page location. We know that there cannot be
812 * more than one zero page location involved in the store.
814 unsigned R = E->Chg & REG_ZP;
816 /* Get register usage and check if the register value is used later */
817 if ((GetRegInfo (S, I+1, R) & R) == 0) {
819 /* Register value is not used, remove the load */
822 /* Remember, we had changes */
833 /* Return the number of changes made */
839 unsigned OptDupLoads (CodeSeg* S)
840 /* Remove loads of registers where the value loaded is already in the register. */
842 unsigned Changes = 0;
845 /* Generate register info for this step */
848 /* Walk over the entries */
850 while (I < CS_GetEntryCount (S)) {
855 CodeEntry* E = CS_GetEntry (S, I);
857 /* Assume we won't delete the entry */
860 /* Get a pointer to the input registers of the insn */
861 const RegContents* In = &E->RI->In;
863 /* Handle the different instructions */
867 if (RegValIsKnown (In->RegA) && /* Value of A is known */
868 CE_IsKnownImm (E, In->RegA) && /* Value to be loaded is known */
869 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a next entry */
870 !CE_UseLoadFlags (N)) { /* Which does not use the flags */
876 if (RegValIsKnown (In->RegX) && /* Value of X is known */
877 CE_IsKnownImm (E, In->RegX) && /* Value to be loaded is known */
878 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a next entry */
879 !CE_UseLoadFlags (N)) { /* Which does not use the flags */
885 if (RegValIsKnown (In->RegY) && /* Value of Y is known */
886 CE_IsKnownImm (E, In->RegY) && /* Value to be loaded is known */
887 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a next entry */
888 !CE_UseLoadFlags (N)) { /* Which does not use the flags */
894 /* If we store into a known zero page location, and this
895 * location does already contain the value to be stored,
898 if (RegValIsKnown (In->RegA) && /* Value of A is known */
899 E->AM == AM65_ZP && /* Store into zp */
900 In->RegA == ZPRegVal (E->Chg, In)) { /* Value identical */
907 /* If we store into a known zero page location, and this
908 * location does already contain the value to be stored,
911 if (RegValIsKnown (In->RegX) && /* Value of A is known */
912 E->AM == AM65_ZP && /* Store into zp */
913 In->RegX == ZPRegVal (E->Chg, In)) { /* Value identical */
917 /* If the value in the X register is known and the same as
918 * that in the A register, replace the store by a STA. The
919 * optimizer will then remove the load instruction for X
920 * later. STX does support the zeropage,y addressing mode,
921 * so be sure to check for that.
923 } else if (RegValIsKnown (In->RegX) &&
924 In->RegX == In->RegA &&
925 E->AM != AM65_ABSY &&
927 /* Use the A register instead */
928 CE_ReplaceOPC (E, OP65_STA);
933 /* If we store into a known zero page location, and this
934 * location does already contain the value to be stored,
937 if (RegValIsKnown (In->RegY) && /* Value of Y is known */
938 E->AM == AM65_ZP && /* Store into zp */
939 In->RegY == ZPRegVal (E->Chg, In)) { /* Value identical */
943 /* If the value in the Y register is known and the same as
944 * that in the A register, replace the store by a STA. The
945 * optimizer will then remove the load instruction for Y
946 * later. If replacement by A is not possible try a
947 * replacement by X, but check for invalid addressing modes
950 } else if (RegValIsKnown (In->RegY)) {
951 if (In->RegY == In->RegA) {
952 CE_ReplaceOPC (E, OP65_STA);
953 } else if (In->RegY == In->RegX &&
954 E->AM != AM65_ABSX &&
956 CE_ReplaceOPC (E, OP65_STX);
962 /* If we store into a known zero page location, and this
963 * location does already contain the value to be stored,
966 if ((CPUIsets[CPU] & CPU_ISET_65SC02) != 0 && E->AM == AM65_ZP) {
967 if (ZPRegVal (E->Chg, In) == 0) {
974 if (RegValIsKnown (In->RegA) &&
975 In->RegA == In->RegX &&
976 (N = CS_GetNextEntry (S, I)) != 0 &&
977 !CE_UseLoadFlags (N)) {
978 /* Value is identical and not followed by a branch */
984 if (RegValIsKnown (In->RegA) &&
985 In->RegA == In->RegY &&
986 (N = CS_GetNextEntry (S, I)) != 0 &&
987 !CE_UseLoadFlags (N)) {
988 /* Value is identical and not followed by a branch */
994 if (RegValIsKnown (In->RegX) &&
995 In->RegX == In->RegA &&
996 (N = CS_GetNextEntry (S, I)) != 0 &&
997 !CE_UseLoadFlags (N)) {
998 /* Value is identical and not followed by a branch */
1004 if (RegValIsKnown (In->RegY) &&
1005 In->RegY == In->RegA &&
1006 (N = CS_GetNextEntry (S, I)) != 0 &&
1007 !CE_UseLoadFlags (N)) {
1008 /* Value is identical and not followed by a branch */
1018 /* Delete the entry if requested */
1021 /* Register value is not used, remove the load */
1024 /* Remember, we had changes */
1036 /* Free register info */
1039 /* Return the number of changes made */
1045 unsigned OptStoreLoad (CodeSeg* S)
1046 /* Remove a store followed by a load from the same location. */
1048 unsigned Changes = 0;
1050 /* Walk over the entries */
1052 while (I < CS_GetEntryCount (S)) {
1057 /* Get next entry */
1058 CodeEntry* E = CS_GetEntry (S, I);
1060 /* Check if it is a store instruction followed by a load from the
1061 * same address which is itself not followed by a conditional branch.
1063 if ((E->Info & OF_STORE) != 0 &&
1064 (N = CS_GetNextEntry (S, I)) != 0 &&
1067 ((E->OPC == OP65_STA && N->OPC == OP65_LDA) ||
1068 (E->OPC == OP65_STX && N->OPC == OP65_LDX) ||
1069 (E->OPC == OP65_STY && N->OPC == OP65_LDY)) &&
1070 strcmp (E->Arg, N->Arg) == 0 &&
1071 (X = CS_GetNextEntry (S, I+1)) != 0 &&
1072 !CE_UseLoadFlags (X)) {
1074 /* Register has already the correct value, remove the load */
1075 CS_DelEntry (S, I+1);
1077 /* Remember, we had changes */
1087 /* Return the number of changes made */
1093 unsigned OptTransfers1 (CodeSeg* S)
1094 /* Remove transfers from one register to another and back */
1096 unsigned Changes = 0;
1098 /* Walk over the entries */
1100 while (I < CS_GetEntryCount (S)) {
1106 /* Get next entry */
1107 CodeEntry* E = CS_GetEntry (S, I);
1109 /* Check if we have two transfer instructions */
1110 if ((E->Info & OF_XFR) != 0 &&
1111 (N = CS_GetNextEntry (S, I)) != 0 &&
1113 (N->Info & OF_XFR) != 0) {
1115 /* Check if it's a transfer and back */
1116 if ((E->OPC == OP65_TAX && N->OPC == OP65_TXA && !RegXUsed (S, I+2)) ||
1117 (E->OPC == OP65_TAY && N->OPC == OP65_TYA && !RegYUsed (S, I+2)) ||
1118 (E->OPC == OP65_TXA && N->OPC == OP65_TAX && !RegAUsed (S, I+2)) ||
1119 (E->OPC == OP65_TYA && N->OPC == OP65_TAY && !RegAUsed (S, I+2))) {
1121 /* If the next insn is a conditional branch, check if the insn
1122 * preceeding the first xfr will set the flags right, otherwise we
1123 * may not remove the sequence.
1125 if ((X = CS_GetNextEntry (S, I+1)) == 0) {
1128 if (CE_UseLoadFlags (X)) {
1130 /* No preceeding entry */
1133 P = CS_GetEntry (S, I-1);
1134 if ((P->Info & OF_SETF) == 0) {
1135 /* Does not set the flags */
1140 /* Remove both transfers */
1141 CS_DelEntry (S, I+1);
1144 /* Remember, we had changes */
1155 /* Return the number of changes made */
1161 unsigned OptTransfers2 (CodeSeg* S)
1162 /* Replace loads followed by a register transfer by a load with the second
1163 * register if possible.
1166 unsigned Changes = 0;
1168 /* Walk over the entries */
1170 while (I < CS_GetEntryCount (S)) {
1174 /* Get next entry */
1175 CodeEntry* E = CS_GetEntry (S, I);
1177 /* Check if we have a load followed by a transfer where the loaded
1178 * register is not used later.
1180 if ((E->Info & OF_LOAD) != 0 &&
1181 (N = CS_GetNextEntry (S, I)) != 0 &&
1183 (N->Info & OF_XFR) != 0 &&
1184 GetRegInfo (S, I+2, E->Chg) != E->Chg) {
1188 if (E->OPC == OP65_LDA && N->OPC == OP65_TAX) {
1189 /* LDA/TAX - check for the right addressing modes */
1190 if (E->AM == AM65_IMM ||
1192 E->AM == AM65_ABS ||
1193 E->AM == AM65_ABSY) {
1195 X = NewCodeEntry (OP65_LDX, E->AM, E->Arg, 0, N->LI);
1197 } else if (E->OPC == OP65_LDA && N->OPC == OP65_TAY) {
1198 /* LDA/TAY - check for the right addressing modes */
1199 if (E->AM == AM65_IMM ||
1201 E->AM == AM65_ZPX ||
1202 E->AM == AM65_ABS ||
1203 E->AM == AM65_ABSX) {
1205 X = NewCodeEntry (OP65_LDY, E->AM, E->Arg, 0, N->LI);
1207 } else if (E->OPC == OP65_LDY && N->OPC == OP65_TYA) {
1208 /* LDY/TYA. LDA supports all addressing modes LDY does */
1209 X = NewCodeEntry (OP65_LDA, E->AM, E->Arg, 0, N->LI);
1210 } else if (E->OPC == OP65_LDX && N->OPC == OP65_TXA) {
1211 /* LDX/TXA. LDA doesn't support zp,y, so we must map it to
1214 am_t AM = (E->AM == AM65_ZPY)? AM65_ABSY : E->AM;
1215 X = NewCodeEntry (OP65_LDA, AM, E->Arg, 0, N->LI);
1218 /* If we have a load entry, add it and remove the old stuff */
1220 CS_InsertEntry (S, X, I+2);
1221 CS_DelEntries (S, I, 2);
1223 --I; /* Correct for one entry less */
1231 /* Return the number of changes made */
1237 unsigned OptTransfers3 (CodeSeg* S)
1238 /* Replace a register transfer followed by a store of the second register by a
1239 * store of the first register if this is possible.
1242 unsigned Changes = 0;
1243 unsigned Xfer = 0; /* Index of transfer insn */
1244 unsigned Store = 0; /* Index of store insn */
1245 CodeEntry* XferEntry = 0; /* Pointer to xfer insn */
1246 CodeEntry* StoreEntry = 0; /* Pointer to store insn */
1252 } State = Searching;
1254 /* Walk over the entries. Look for a xfer instruction that is followed by
1255 * a store later, where the value of the register is not used later.
1258 while (I < CS_GetEntryCount (S)) {
1260 /* Get next entry */
1261 CodeEntry* E = CS_GetEntry (S, I);
1266 if (E->Info & OF_XFR) {
1267 /* Found start of sequence */
1275 /* If we find a conditional jump, abort the sequence, since
1276 * handling them makes things really complicated.
1278 if (E->Info & OF_CBRA) {
1280 /* Switch back to searching */
1284 /* Does this insn use the target register of the transfer? */
1285 } else if ((E->Use & XferEntry->Chg) != 0) {
1287 /* It it's a store instruction, and the block is a basic
1288 * block, proceed. Otherwise restart
1290 if ((E->Info & OF_STORE) != 0 &&
1291 CS_IsBasicBlock (S, Xfer, I)) {
1300 /* Does this insn change the target register of the transfer? */
1301 } else if (E->Chg & XferEntry->Chg) {
1303 /* We *may* add code here to remove the transfer, but I'm
1304 * currently not sure about the consequences, so I won't
1305 * do that and bail out instead.
1313 /* We are at the instruction behind the store. If the register
1314 * isn't used later, and we have an address mode match, we can
1315 * replace the transfer by a store and remove the store here.
1317 if ((GetRegInfo (S, I, XferEntry->Chg) & XferEntry->Chg) == 0 &&
1318 (StoreEntry->AM == AM65_ABS || StoreEntry->AM == AM65_ZP) &&
1319 !MemAccess (S, Xfer+1, Store-1, StoreEntry->Arg)) {
1321 /* Generate the replacement store insn */
1323 switch (XferEntry->OPC) {
1326 X = NewCodeEntry (OP65_STX,
1334 X = NewCodeEntry (OP65_STA,
1342 X = NewCodeEntry (OP65_STY,
1350 X = NewCodeEntry (OP65_STA,
1361 /* If we have a replacement store, change the code */
1363 /* Insert before the xfer insn */
1364 CS_InsertEntry (S, X, Xfer);
1366 /* Remove the xfer instead */
1367 CS_DelEntry (S, Xfer+1);
1369 /* Remove the final store */
1370 CS_DelEntry (S, Store);
1372 /* Correct I so we continue with the next insn */
1375 /* Remember we had changes */
1378 /* Restart after last xfer insn */
1382 /* Restart after last xfer insn */
1394 /* Return the number of changes made */
1400 unsigned OptTransfers4 (CodeSeg* S)
1401 /* Replace a load of a register followed by a transfer insn of the same register
1402 * by a load of the second register if possible.
1405 unsigned Changes = 0;
1406 unsigned Load = 0; /* Index of load insn */
1407 unsigned Xfer = 0; /* Index of transfer insn */
1408 CodeEntry* LoadEntry = 0; /* Pointer to load insn */
1409 CodeEntry* XferEntry = 0; /* Pointer to xfer insn */
1415 } State = Searching;
1417 /* Walk over the entries. Look for a load instruction that is followed by
1421 while (I < CS_GetEntryCount (S)) {
1423 /* Get next entry */
1424 CodeEntry* E = CS_GetEntry (S, I);
1429 if (E->Info & OF_LOAD) {
1430 /* Found start of sequence */
1438 /* If we find a conditional jump, abort the sequence, since
1439 * handling them makes things really complicated.
1441 if (E->Info & OF_CBRA) {
1443 /* Switch back to searching */
1447 /* Does this insn use the target register of the load? */
1448 } else if ((E->Use & LoadEntry->Chg) != 0) {
1450 /* It it's a xfer instruction, and the block is a basic
1451 * block, proceed. Otherwise restart
1453 if ((E->Info & OF_XFR) != 0 &&
1454 CS_IsBasicBlock (S, Load, I)) {
1463 /* Does this insn change the target register of the load? */
1464 } else if (E->Chg & LoadEntry->Chg) {
1466 /* We *may* add code here to remove the load, but I'm
1467 * currently not sure about the consequences, so I won't
1468 * do that and bail out instead.
1476 /* We are at the instruction behind the xfer. If the register
1477 * isn't used later, and we have an address mode match, we can
1478 * replace the transfer by a load and remove the initial load.
1480 if ((GetRegInfo (S, I, LoadEntry->Chg) & LoadEntry->Chg) == 0 &&
1481 (LoadEntry->AM == AM65_ABS ||
1482 LoadEntry->AM == AM65_ZP ||
1483 LoadEntry->AM == AM65_IMM) &&
1484 !MemAccess (S, Load+1, Xfer-1, LoadEntry->Arg)) {
1486 /* Generate the replacement load insn */
1488 switch (XferEntry->OPC) {
1492 X = NewCodeEntry (OP65_LDA,
1500 X = NewCodeEntry (OP65_LDX,
1508 X = NewCodeEntry (OP65_LDY,
1519 /* If we have a replacement load, change the code */
1521 /* Insert before the xfer insn */
1522 CS_InsertEntry (S, X, Xfer);
1524 /* Remove the xfer instead */
1525 CS_DelEntry (S, Xfer+1);
1527 /* Remove the initial load */
1528 CS_DelEntry (S, Load);
1530 /* Correct I so we continue with the next insn */
1533 /* Remember we had changes */
1536 /* Restart after last xfer insn */
1540 /* Restart after last xfer insn */
1552 /* Return the number of changes made */
1558 unsigned OptPushPop (CodeSeg* S)
1559 /* Remove a PHA/PLA sequence were A is not used later */
1561 unsigned Changes = 0;
1562 unsigned Push = 0; /* Index of push insn */
1563 unsigned Pop = 0; /* Index of pop insn */
1568 } State = Searching;
1570 /* Walk over the entries. Look for a push instruction that is followed by
1571 * a pop later, where the pop is not followed by an conditional branch,
1572 * and where the value of the A register is not used later on.
1573 * Look out for the following problems:
1575 * - There may be another PHA/PLA inside the sequence: Restart it.
1576 * - If the PLA has a label, all jumps to this label must be inside
1577 * the sequence, otherwise we cannot remove the PHA/PLA.
1580 while (I < CS_GetEntryCount (S)) {
1584 /* Get next entry */
1585 CodeEntry* E = CS_GetEntry (S, I);
1590 if (E->OPC == OP65_PHA) {
1591 /* Found start of sequence */
1598 if (E->OPC == OP65_PHA) {
1599 /* Inner push/pop, restart */
1601 } else if (E->OPC == OP65_PLA) {
1602 /* Found a matching pop */
1604 /* Check that the block between Push and Pop is a basic
1605 * block (one entry, one exit). Otherwise ignore it.
1607 if (CS_IsBasicBlock (S, Push, Pop)) {
1610 /* Go into searching mode again */
1617 /* We're at the instruction after the PLA.
1618 * Check for the following conditions:
1619 * - If this instruction is a store of A, and A is not used
1620 * later, we may replace the PHA by the store and remove
1621 * pla if several other conditions are met.
1622 * - If this instruction is not a conditional branch, and A
1623 * is unused later, we may remove PHA and PLA.
1625 if (E->OPC == OP65_STA &&
1626 !RegAUsed (S, I+1) &&
1627 !MemAccess (S, Push+1, Pop-1, E->Arg)) {
1629 /* Insert a STA before the PHA */
1630 X = NewCodeEntry (E->OPC, E->AM, E->Arg, E->JumpTo, E->LI);
1631 CS_InsertEntry (S, X, Push);
1633 /* Remove the PHA instead */
1634 CS_DelEntry (S, Push+1);
1636 /* Remove the PLA/STA sequence */
1637 CS_DelEntries (S, Pop, 2);
1639 /* Correct I so we continue with the next insn */
1642 /* Remember we had changes */
1645 } else if ((E->Info & OF_CBRA) == 0 &&
1648 /* We can remove the PHA and PLA instructions */
1649 CS_DelEntry (S, Pop);
1650 CS_DelEntry (S, Push);
1652 /* Correct I so we continue with the next insn */
1655 /* Remember we had changes */
1659 /* Go into search mode again */
1669 /* Return the number of changes made */
1675 unsigned OptPrecalc (CodeSeg* S)
1676 /* Replace immediate operations with the accu where the current contents are
1677 * known by a load of the final value.
1680 unsigned Changes = 0;
1683 /* Generate register info for this step */
1686 /* Walk over the entries */
1688 while (I < CS_GetEntryCount (S)) {
1690 /* Get next entry */
1691 CodeEntry* E = CS_GetEntry (S, I);
1693 /* Get a pointer to the output registers of the insn */
1694 const RegContents* Out = &E->RI->Out;
1696 /* Argument for LDn and flag */
1697 const char* Arg = 0;
1698 opc_t OPC = OP65_LDA;
1700 /* Handle the different instructions */
1704 if (E->AM != AM65_IMM && RegValIsKnown (Out->RegA)) {
1705 /* Result of load is known */
1706 Arg = MakeHexArg (Out->RegA);
1711 if (E->AM != AM65_IMM && RegValIsKnown (Out->RegX)) {
1712 /* Result of load is known but register is X */
1713 Arg = MakeHexArg (Out->RegX);
1719 if (E->AM != AM65_IMM && RegValIsKnown (Out->RegY)) {
1720 /* Result of load is known but register is Y */
1721 Arg = MakeHexArg (Out->RegY);
1731 if (RegValIsKnown (Out->RegA)) {
1732 /* Accu op zp with known contents */
1733 Arg = MakeHexArg (Out->RegA);
1738 if (CE_IsKnownImm (E, 0xFF)) {
1739 /* AND with 0xFF, remove */
1742 } else if (RegValIsKnown (Out->RegA)) {
1743 /* Accu AND zp with known contents */
1744 Arg = MakeHexArg (Out->RegA);
1749 if (CE_IsKnownImm (E, 0x00)) {
1750 /* ORA with zero, remove */
1753 } else if (RegValIsKnown (Out->RegA)) {
1754 /* Accu AND zp with known contents */
1755 Arg = MakeHexArg (Out->RegA);
1764 /* Check if we have to replace the insn by LDA */
1766 CodeEntry* X = NewCodeEntry (OPC, AM65_IMM, Arg, 0, E->LI);
1767 CS_InsertEntry (S, X, I+1);
1776 /* Free register info */
1779 /* Return the number of changes made */
1785 /*****************************************************************************/
1786 /* Optimize branch types */
1787 /*****************************************************************************/
1791 unsigned OptBranchDist (CodeSeg* S)
1792 /* Change branches for the distance needed. */
1794 unsigned Changes = 0;
1796 /* Walk over the entries */
1798 while (I < CS_GetEntryCount (S)) {
1800 /* Get next entry */
1801 CodeEntry* E = CS_GetEntry (S, I);
1803 /* Check if it's a conditional branch to a local label. */
1804 if (E->Info & OF_CBRA) {
1806 /* Is this a branch to a local symbol? */
1807 if (E->JumpTo != 0) {
1809 /* Check if the branch distance is short */
1810 int IsShort = IsShortDist (GetBranchDist (S, I, E->JumpTo->Owner));
1812 /* Make the branch short/long according to distance */
1813 if ((E->Info & OF_LBRA) == 0 && !IsShort) {
1814 /* Short branch but long distance */
1815 CE_ReplaceOPC (E, MakeLongBranch (E->OPC));
1817 } else if ((E->Info & OF_LBRA) != 0 && IsShort) {
1818 /* Long branch but short distance */
1819 CE_ReplaceOPC (E, MakeShortBranch (E->OPC));
1823 } else if ((E->Info & OF_LBRA) == 0) {
1825 /* Short branch to external symbol - make it long */
1826 CE_ReplaceOPC (E, MakeLongBranch (E->OPC));
1831 } else if ((CPUIsets[CPU] & CPU_ISET_65SC02) != 0 &&
1832 (E->Info & OF_UBRA) != 0 &&
1834 IsShortDist (GetBranchDist (S, I, E->JumpTo->Owner))) {
1836 /* The jump is short and may be replaced by a BRA on the 65C02 CPU */
1837 CE_ReplaceOPC (E, OP65_BRA);
1846 /* Return the number of changes made */