1 /*****************************************************************************/
5 /* Environment independent low level optimizations */
9 /* (C) 2001-2009, Ullrich von Bassewitz */
10 /* Roemerstrasse 52 */
11 /* D-70794 Filderstadt */
12 /* EMail: uz@cc65.org */
15 /* This software is provided 'as-is', without any expressed or implied */
16 /* warranty. In no event will the authors be held liable for any damages */
17 /* arising from the use of this software. */
19 /* Permission is granted to anyone to use this software for any purpose, */
20 /* including commercial applications, and to alter it and redistribute it */
21 /* freely, subject to the following restrictions: */
23 /* 1. The origin of this software must not be misrepresented; you must not */
24 /* claim that you wrote the original software. If you use this software */
25 /* in a product, an acknowledgment in the product documentation would be */
26 /* appreciated but is not required. */
27 /* 2. Altered source versions must be plainly marked as such, and must not */
28 /* be misrepresented as being the original software. */
29 /* 3. This notice may not be removed or altered from any source */
32 /*****************************************************************************/
48 /*****************************************************************************/
49 /* Helper functions */
50 /*****************************************************************************/
54 static int MemAccess (CodeSeg* S, unsigned From, unsigned To, const char* Arg)
55 /* Checks a range of code entries if there are any memory accesses to Arg.
56 * Note: This function is not 100% safe, because there is more than one way
57 * to express a memory location ("foo" and "foo+0" comes to mind) and there
58 * may be other accesses through pointers. For the code generated by cc65 and
59 * for the purpose of the caller (OptPushPop) it is assumed to be safe enough
63 /* Walk over all code entries */
66 /* Get the next entry */
67 CodeEntry* E = CS_GetEntry (S, From);
69 /* For simplicity, we just check if there is an argument and if this
70 * argument equals Arg.
72 if (E->Arg && strcmp (E->Arg, Arg) == 0) {
87 static int GetBranchDist (CodeSeg* S, unsigned From, CodeEntry* To)
88 /* Get the branch distance between the two entries and return it. The distance
89 * will be negative for backward jumps and positive for forward jumps.
92 /* Get the index of the branch target */
93 unsigned TI = CS_GetEntryIndex (S, To);
95 /* Determine the branch distance */
98 /* Forward branch, do not count the current insn */
101 CodeEntry* N = CS_GetEntry (S, J++);
105 /* Backward branch */
108 CodeEntry* N = CS_GetEntry (S, J++);
113 /* Return the calculated distance */
119 static int IsShortDist (int Distance)
120 /* Return true if the given distance is a short branch distance */
122 return (Distance >= -125 && Distance <= 125);
127 static short ZPRegVal (unsigned short Use, const RegContents* RC)
128 /* Return the contents of the given zeropage register */
130 if ((Use & REG_TMP1) != 0) {
132 } else if ((Use & REG_PTR1_LO) != 0) {
134 } else if ((Use & REG_PTR1_HI) != 0) {
136 } else if ((Use & REG_SREG_LO) != 0) {
138 } else if ((Use & REG_SREG_HI) != 0) {
141 return UNKNOWN_REGVAL;
147 static short RegVal (unsigned short Use, const RegContents* RC)
148 /* Return the contents of the given register */
150 if ((Use & REG_A) != 0) {
152 } else if ((Use & REG_X) != 0) {
154 } else if ((Use & REG_Y) != 0) {
157 return ZPRegVal (Use, RC);
163 /*****************************************************************************/
164 /* Replace jumps to RTS by RTS */
165 /*****************************************************************************/
169 unsigned OptRTSJumps1 (CodeSeg* S)
170 /* Replace jumps to RTS by RTS */
172 unsigned Changes = 0;
174 /* Walk over all entries minus the last one */
176 while (I < CS_GetEntryCount (S)) {
178 /* Get the next entry */
179 CodeEntry* E = CS_GetEntry (S, I);
181 /* Check if it's an unconditional branch to a local target */
182 if ((E->Info & OF_UBRA) != 0 &&
184 E->JumpTo->Owner->OPC == OP65_RTS) {
186 /* Insert an RTS instruction */
187 CodeEntry* X = NewCodeEntry (OP65_RTS, AM65_IMP, 0, 0, E->LI);
188 CS_InsertEntry (S, X, I+1);
190 /* Delete the jump */
193 /* Remember, we had changes */
203 /* Return the number of changes made */
209 unsigned OptRTSJumps2 (CodeSeg* S)
210 /* Replace long conditional jumps to RTS */
212 unsigned Changes = 0;
214 /* Walk over all entries minus the last one */
216 while (I < CS_GetEntryCount (S)) {
220 /* Get the next entry */
221 CodeEntry* E = CS_GetEntry (S, I);
223 /* Check if it's an unconditional branch to a local target */
224 if ((E->Info & OF_CBRA) != 0 && /* Conditional branch */
225 (E->Info & OF_LBRA) != 0 && /* Long branch */
226 E->JumpTo != 0 && /* Local label */
227 E->JumpTo->Owner->OPC == OP65_RTS && /* Target is an RTS */
228 (N = CS_GetNextEntry (S, I)) != 0) { /* There is a next entry */
234 /* We will create a jump around an RTS instead of the long branch */
235 X = NewCodeEntry (OP65_RTS, AM65_IMP, 0, 0, E->JumpTo->Owner->LI);
236 CS_InsertEntry (S, X, I+1);
238 /* Get the new branch opcode */
239 NewBranch = MakeShortBranch (GetInverseBranch (E->OPC));
241 /* Get the label attached to N, create a new one if needed */
242 LN = CS_GenLabel (S, N);
244 /* Generate the branch */
245 X = NewCodeEntry (NewBranch, AM65_BRA, LN->Name, LN, E->LI);
246 CS_InsertEntry (S, X, I+1);
248 /* Delete the long branch */
251 /* Remember, we had changes */
261 /* Return the number of changes made */
267 /*****************************************************************************/
268 /* Remove dead jumps */
269 /*****************************************************************************/
273 unsigned OptDeadJumps (CodeSeg* S)
274 /* Remove dead jumps (jumps to the next instruction) */
276 unsigned Changes = 0;
278 /* Walk over all entries minus the last one */
280 while (I < CS_GetEntryCount (S)) {
282 /* Get the next entry */
283 CodeEntry* E = CS_GetEntry (S, I);
285 /* Check if it's a branch, if it has a local target, and if the target
286 * is the next instruction.
288 if (E->AM == AM65_BRA &&
290 E->JumpTo->Owner == CS_GetNextEntry (S, I)) {
292 /* Delete the dead jump */
295 /* Remember, we had changes */
306 /* Return the number of changes made */
312 /*****************************************************************************/
313 /* Remove dead code */
314 /*****************************************************************************/
318 unsigned OptDeadCode (CodeSeg* S)
319 /* Remove dead code (code that follows an unconditional jump or an rts/rti
323 unsigned Changes = 0;
325 /* Walk over all entries */
327 while (I < CS_GetEntryCount (S)) {
333 CodeEntry* E = CS_GetEntry (S, I);
335 /* Check if it's an unconditional branch, and if the next entry has
336 * no labels attached, or if the label is just used so that the insn
337 * can jump to itself.
339 if ((E->Info & OF_DEAD) != 0 && /* Dead code follows */
340 (N = CS_GetNextEntry (S, I)) != 0 && /* Has next entry */
341 (!CE_HasLabel (N) || /* Don't has a label */
342 ((N->Info & OF_UBRA) != 0 && /* Uncond branch */
343 (LN = N->JumpTo) != 0 && /* Jumps to known label */
344 LN->Owner == N && /* Attached to insn */
345 CL_GetRefCount (LN) == 1))) { /* Only reference */
347 /* Delete the next entry */
348 CS_DelEntry (S, I+1);
350 /* Remember, we had changes */
361 /* Return the number of changes made */
367 /*****************************************************************************/
368 /* Optimize jump cascades */
369 /*****************************************************************************/
373 unsigned OptJumpCascades (CodeSeg* S)
374 /* Optimize jump cascades (jumps to jumps). In such a case, the jump is
375 * replaced by a jump to the final location. This will in some cases produce
376 * worse code, because some jump targets are no longer reachable by short
377 * branches, but this is quite rare, so there are more advantages than
381 unsigned Changes = 0;
383 /* Walk over all entries */
385 while (I < CS_GetEntryCount (S)) {
391 CodeEntry* E = CS_GetEntry (S, I);
393 /* Check if it's a branch, if it has a jump label, if this jump
394 * label is not attached to the instruction itself, and if the
395 * target instruction is itself a branch.
397 if ((E->Info & OF_BRA) != 0 &&
398 (OldLabel = E->JumpTo) != 0 &&
399 (N = OldLabel->Owner) != E &&
400 (N->Info & OF_BRA) != 0) {
402 /* Check if we can use the final target label. This is the case,
403 * if the target branch is an absolut branch, or if it is a
404 * conditional branch checking the same condition as the first one.
406 if ((N->Info & OF_UBRA) != 0 ||
407 ((E->Info & OF_CBRA) != 0 &&
408 GetBranchCond (E->OPC) == GetBranchCond (N->OPC))) {
410 /* This is a jump cascade and we may jump to the final target,
411 * provided that the other insn does not jump to itself. If
412 * this is the case, we can also jump to ourselves, otherwise
413 * insert a jump to the new instruction and remove the old one.
416 CodeLabel* LN = N->JumpTo;
418 if (LN != 0 && LN->Owner == N) {
420 /* We found a jump to a jump to itself. Replace our jump
421 * by a jump to itself.
423 CodeLabel* LE = CS_GenLabel (S, E);
424 X = NewCodeEntry (E->OPC, E->AM, LE->Name, LE, E->LI);
428 /* Jump to the final jump target */
429 X = NewCodeEntry (E->OPC, E->AM, N->Arg, N->JumpTo, E->LI);
433 /* Insert it behind E */
434 CS_InsertEntry (S, X, I+1);
439 /* Remember, we had changes */
442 /* Check if both are conditional branches, and the condition of
443 * the second is the inverse of that of the first. In this case,
444 * the second branch will never be taken, and we may jump directly
445 * to the instruction behind this one.
447 } else if ((E->Info & OF_CBRA) != 0 && (N->Info & OF_CBRA) != 0) {
449 CodeEntry* X; /* Instruction behind N */
450 CodeLabel* LX; /* Label attached to X */
452 /* Get the branch conditions of both branches */
453 bc_t BC1 = GetBranchCond (E->OPC);
454 bc_t BC2 = GetBranchCond (N->OPC);
456 /* Check the branch conditions */
457 if (BC1 != GetInverseCond (BC2)) {
458 /* Condition not met */
462 /* We may jump behind this conditional branch. Get the
463 * pointer to the next instruction
465 if ((X = CS_GetNextEntry (S, CS_GetEntryIndex (S, N))) == 0) {
466 /* N is the last entry, bail out */
470 /* Get the label attached to X, create a new one if needed */
471 LX = CS_GenLabel (S, X);
473 /* Move the reference from E to the new label */
474 CS_MoveLabelRef (S, E, LX);
476 /* Remember, we had changes */
487 /* Return the number of changes made */
493 /*****************************************************************************/
494 /* Optimize jsr/rts */
495 /*****************************************************************************/
499 unsigned OptRTS (CodeSeg* S)
500 /* Optimize subroutine calls followed by an RTS. The subroutine call will get
501 * replaced by a jump. Don't bother to delete the RTS if it does not have a
502 * label, the dead code elimination should take care of it.
505 unsigned Changes = 0;
507 /* Walk over all entries minus the last one */
509 while (I < CS_GetEntryCount (S)) {
514 CodeEntry* E = CS_GetEntry (S, I);
516 /* Check if it's a subroutine call and if the following insn is RTS */
517 if (E->OPC == OP65_JSR &&
518 (N = CS_GetNextEntry (S, I)) != 0 &&
519 N->OPC == OP65_RTS) {
521 /* Change the jsr to a jmp and use the additional info for a jump */
523 CE_ReplaceOPC (E, OP65_JMP);
525 /* Remember, we had changes */
535 /* Return the number of changes made */
541 /*****************************************************************************/
542 /* Optimize jump targets */
543 /*****************************************************************************/
547 unsigned OptJumpTarget1 (CodeSeg* S)
548 /* If the instruction preceeding an unconditional branch is the same as the
549 * instruction preceeding the jump target, the jump target may be moved
550 * one entry back. This is a size optimization, since the instruction before
551 * the branch gets removed.
554 unsigned Changes = 0;
555 CodeEntry* E1; /* Entry 1 */
556 CodeEntry* E2; /* Entry 2 */
557 CodeEntry* T1; /* Jump target entry 1 */
558 CodeLabel* TL1; /* Target label 1 */
560 /* Walk over the entries */
562 while (I < CS_GetEntryCount (S)) {
565 E2 = CS_GetNextEntry (S, I);
567 /* Check if we have a jump or branch without a label attached, and
568 * a jump target, which is not attached to the jump itself
571 (E2->Info & OF_UBRA) != 0 &&
574 E2->JumpTo->Owner != E2) {
576 /* Get the entry preceeding the branch target */
577 T1 = CS_GetPrevEntry (S, CS_GetEntryIndex (S, E2->JumpTo->Owner));
579 /* There is no such entry */
583 /* The entry preceeding the branch target may not be the branch
590 /* Get the entry preceeding the jump */
591 E1 = CS_GetEntry (S, I);
593 /* Check if both preceeding instructions are identical */
594 if (!CodeEntriesAreEqual (E1, T1)) {
595 /* Not equal, try next */
599 /* Get the label for the instruction preceeding the jump target.
600 * This routine will create a new label if the instruction does
601 * not already have one.
603 TL1 = CS_GenLabel (S, T1);
604 printf ("Generated label %s\n", TL1->Name);
606 /* Change the jump target to point to this new label */
607 CS_MoveLabelRef (S, E2, TL1);
609 /* If the instruction preceeding the jump has labels attached,
610 * move references to this label to the new label.
612 if (CE_HasLabel (E1)) {
613 CS_MoveLabels (S, E1, T1);
616 /* Remove the entry preceeding the jump */
619 /* Remember, we had changes */
629 /* Return the number of changes made */
635 unsigned OptJumpTarget2 (CodeSeg* S)
636 /* If a bcs jumps to a sec insn or a bcc jumps to clc, skip this insn, since
637 * it's job is already done.
640 unsigned Changes = 0;
642 /* Walk over the entries */
644 while (I < CS_GetEntryCount (S)) {
646 /* OP that may be skipped */
649 /* Jump target insn, old and new */
657 CodeEntry* E = CS_GetEntry (S, I);
659 /* Check if this is a bcc insn */
660 if (E->OPC == OP65_BCC || E->OPC == OP65_JCC) {
662 } else if (E->OPC == OP65_BCS || E->OPC == OP65_JCS) {
665 /* Not what we're looking for */
669 /* Must have a jump target */
670 if (E->JumpTo == 0) {
674 /* Get the owner insn of the jump target and check if it's the one, we
675 * will skip if present.
677 T = E->JumpTo->Owner;
682 /* Get the entry following the branch target */
683 N = CS_GetNextEntry (S, CS_GetEntryIndex (S, T));
685 /* There is no such entry */
689 /* Get the label for the instruction following the jump target.
690 * This routine will create a new label if the instruction does
691 * not already have one.
693 L = CS_GenLabel (S, N);
695 /* Change the jump target to point to this new label */
696 CS_MoveLabelRef (S, E, L);
698 /* Remember that we had changes */
706 /* Return the number of changes made */
712 /*****************************************************************************/
713 /* Optimize conditional branches */
714 /*****************************************************************************/
718 unsigned OptCondBranches1 (CodeSeg* S)
719 /* Performs several optimization steps:
721 * - If an immidiate load of a register is followed by a conditional jump that
722 * is never taken because the load of the register sets the flags in such a
723 * manner, remove the conditional branch.
724 * - If the conditional branch is always taken because of the register load,
725 * replace it by a jmp.
726 * - If a conditional branch jumps around an unconditional branch, remove the
727 * conditional branch and make the jump a conditional branch with the
728 * inverse condition of the first one.
731 unsigned Changes = 0;
733 /* Walk over the entries */
735 while (I < CS_GetEntryCount (S)) {
741 CodeEntry* E = CS_GetEntry (S, I);
743 /* Check if it's a register load */
744 if ((E->Info & OF_LOAD) != 0 && /* It's a load instruction */
745 E->AM == AM65_IMM && /* ..with immidiate addressing */
746 (E->Flags & CEF_NUMARG) != 0 && /* ..and a numeric argument. */
747 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a following entry */
748 (N->Info & OF_CBRA) != 0 && /* ..which is a conditional branch */
749 !CE_HasLabel (N)) { /* ..and does not have a label */
751 /* Get the branch condition */
752 bc_t BC = GetBranchCond (N->OPC);
754 /* Check the argument against the branch condition */
755 if ((BC == BC_EQ && E->Num != 0) ||
756 (BC == BC_NE && E->Num == 0) ||
757 (BC == BC_PL && (E->Num & 0x80) != 0) ||
758 (BC == BC_MI && (E->Num & 0x80) == 0)) {
760 /* Remove the conditional branch */
761 CS_DelEntry (S, I+1);
763 /* Remember, we had changes */
766 } else if ((BC == BC_EQ && E->Num == 0) ||
767 (BC == BC_NE && E->Num != 0) ||
768 (BC == BC_PL && (E->Num & 0x80) == 0) ||
769 (BC == BC_MI && (E->Num & 0x80) != 0)) {
771 /* The branch is always taken, replace it by a jump */
772 CE_ReplaceOPC (N, OP65_JMP);
774 /* Remember, we had changes */
780 if ((E->Info & OF_CBRA) != 0 && /* It's a conditional branch */
781 (L = E->JumpTo) != 0 && /* ..referencing a local label */
782 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a following entry */
783 (N->Info & OF_UBRA) != 0 && /* ..which is an uncond branch, */
784 !CE_HasLabel (N) && /* ..has no label attached */
785 L->Owner == CS_GetNextEntry (S, I+1)) {/* ..and jump target follows */
787 /* Replace the jump by a conditional branch with the inverse branch
788 * condition than the branch around it.
790 CE_ReplaceOPC (N, GetInverseBranch (E->OPC));
792 /* Remove the conditional branch */
795 /* Remember, we had changes */
805 /* Return the number of changes made */
811 unsigned OptCondBranches2 (CodeSeg* S)
812 /* If on entry to a "rol a" instruction the accu is zero, and a beq/bne follows,
813 * we can remove the rol and branch on the state of the carry flag.
816 unsigned Changes = 0;
819 /* Generate register info for this step */
822 /* Walk over the entries */
824 while (I < CS_GetEntryCount (S)) {
829 CodeEntry* E = CS_GetEntry (S, I);
831 /* Check if it's a rol insn with A in accu and a branch follows */
832 if (E->OPC == OP65_ROL &&
834 E->RI->In.RegA == 0 &&
836 (N = CS_GetNextEntry (S, I)) != 0 &&
837 (N->Info & OF_ZBRA) != 0 &&
838 !RegAUsed (S, I+1)) {
840 /* Replace the branch condition */
841 switch (GetBranchCond (N->OPC)) {
842 case BC_EQ: CE_ReplaceOPC (N, OP65_JCC); break;
843 case BC_NE: CE_ReplaceOPC (N, OP65_JCS); break;
844 default: Internal ("Unknown branch condition in OptCondBranches2");
847 /* Delete the rol insn */
850 /* Remember, we had changes */
858 /* Free register info */
861 /* Return the number of changes made */
867 /*****************************************************************************/
868 /* Remove unused loads and stores */
869 /*****************************************************************************/
873 unsigned OptUnusedLoads (CodeSeg* S)
874 /* Remove loads of registers where the value loaded is not used later. */
876 unsigned Changes = 0;
878 /* Walk over the entries */
880 while (I < CS_GetEntryCount (S)) {
885 CodeEntry* E = CS_GetEntry (S, I);
887 /* Check if it's a register load or transfer insn */
888 if ((E->Info & (OF_LOAD | OF_XFR | OF_REG_INCDEC)) != 0 &&
889 (N = CS_GetNextEntry (S, I)) != 0 &&
890 !CE_UseLoadFlags (N)) {
892 /* Check which sort of load or transfer it is */
899 case OP65_TYA: R = REG_A; break;
903 case OP65_TAX: R = REG_X; break;
907 case OP65_TAY: R = REG_Y; break;
908 default: goto NextEntry; /* OOPS */
911 /* Get register usage and check if the register value is used later */
912 if ((GetRegInfo (S, I+1, R) & R) == 0) {
914 /* Register value is not used, remove the load */
917 /* Remember, we had changes. Account the deleted entry in I. */
930 /* Return the number of changes made */
936 unsigned OptUnusedStores (CodeSeg* S)
937 /* Remove stores into zero page registers that aren't used later */
939 unsigned Changes = 0;
941 /* Walk over the entries */
943 while (I < CS_GetEntryCount (S)) {
946 CodeEntry* E = CS_GetEntry (S, I);
948 /* Check if it's a register load or transfer insn */
949 if ((E->Info & OF_STORE) != 0 &&
951 (E->Chg & REG_ZP) != 0) {
953 /* Check for the zero page location. We know that there cannot be
954 * more than one zero page location involved in the store.
956 unsigned R = E->Chg & REG_ZP;
958 /* Get register usage and check if the register value is used later */
959 if ((GetRegInfo (S, I+1, R) & R) == 0) {
961 /* Register value is not used, remove the load */
964 /* Remember, we had changes */
967 /* Continue with next insn */
977 /* Return the number of changes made */
983 unsigned OptDupLoads (CodeSeg* S)
984 /* Remove loads of registers where the value loaded is already in the register. */
986 unsigned Changes = 0;
989 /* Generate register info for this step */
992 /* Walk over the entries */
994 while (I < CS_GetEntryCount (S)) {
999 CodeEntry* E = CS_GetEntry (S, I);
1001 /* Assume we won't delete the entry */
1004 /* Get a pointer to the input registers of the insn */
1005 const RegContents* In = &E->RI->In;
1007 /* Handle the different instructions */
1011 if (RegValIsKnown (In->RegA) && /* Value of A is known */
1012 CE_IsKnownImm (E, In->RegA) && /* Value to be loaded is known */
1013 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a next entry */
1014 !CE_UseLoadFlags (N)) { /* Which does not use the flags */
1020 if (RegValIsKnown (In->RegX) && /* Value of X is known */
1021 CE_IsKnownImm (E, In->RegX) && /* Value to be loaded is known */
1022 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a next entry */
1023 !CE_UseLoadFlags (N)) { /* Which does not use the flags */
1029 if (RegValIsKnown (In->RegY) && /* Value of Y is known */
1030 CE_IsKnownImm (E, In->RegY) && /* Value to be loaded is known */
1031 (N = CS_GetNextEntry (S, I)) != 0 && /* There is a next entry */
1032 !CE_UseLoadFlags (N)) { /* Which does not use the flags */
1038 /* If we store into a known zero page location, and this
1039 * location does already contain the value to be stored,
1042 if (RegValIsKnown (In->RegA) && /* Value of A is known */
1043 E->AM == AM65_ZP && /* Store into zp */
1044 In->RegA == ZPRegVal (E->Chg, In)) { /* Value identical */
1051 /* If we store into a known zero page location, and this
1052 * location does already contain the value to be stored,
1055 if (RegValIsKnown (In->RegX) && /* Value of A is known */
1056 E->AM == AM65_ZP && /* Store into zp */
1057 In->RegX == ZPRegVal (E->Chg, In)) { /* Value identical */
1061 /* If the value in the X register is known and the same as
1062 * that in the A register, replace the store by a STA. The
1063 * optimizer will then remove the load instruction for X
1064 * later. STX does support the zeropage,y addressing mode,
1065 * so be sure to check for that.
1067 } else if (RegValIsKnown (In->RegX) &&
1068 In->RegX == In->RegA &&
1069 E->AM != AM65_ABSY &&
1070 E->AM != AM65_ZPY) {
1071 /* Use the A register instead */
1072 CE_ReplaceOPC (E, OP65_STA);
1077 /* If we store into a known zero page location, and this
1078 * location does already contain the value to be stored,
1081 if (RegValIsKnown (In->RegY) && /* Value of Y is known */
1082 E->AM == AM65_ZP && /* Store into zp */
1083 In->RegY == ZPRegVal (E->Chg, In)) { /* Value identical */
1087 /* If the value in the Y register is known and the same as
1088 * that in the A register, replace the store by a STA. The
1089 * optimizer will then remove the load instruction for Y
1090 * later. If replacement by A is not possible try a
1091 * replacement by X, but check for invalid addressing modes
1094 } else if (RegValIsKnown (In->RegY)) {
1095 if (In->RegY == In->RegA) {
1096 CE_ReplaceOPC (E, OP65_STA);
1097 } else if (In->RegY == In->RegX &&
1098 E->AM != AM65_ABSX &&
1099 E->AM != AM65_ZPX) {
1100 CE_ReplaceOPC (E, OP65_STX);
1106 /* If we store into a known zero page location, and this
1107 * location does already contain the value to be stored,
1110 if ((CPUIsets[CPU] & CPU_ISET_65SC02) != 0 && E->AM == AM65_ZP) {
1111 if (ZPRegVal (E->Chg, In) == 0) {
1118 if (RegValIsKnown (In->RegA) &&
1119 In->RegA == In->RegX &&
1120 (N = CS_GetNextEntry (S, I)) != 0 &&
1121 !CE_UseLoadFlags (N)) {
1122 /* Value is identical and not followed by a branch */
1128 if (RegValIsKnown (In->RegA) &&
1129 In->RegA == In->RegY &&
1130 (N = CS_GetNextEntry (S, I)) != 0 &&
1131 !CE_UseLoadFlags (N)) {
1132 /* Value is identical and not followed by a branch */
1138 if (RegValIsKnown (In->RegX) &&
1139 In->RegX == In->RegA &&
1140 (N = CS_GetNextEntry (S, I)) != 0 &&
1141 !CE_UseLoadFlags (N)) {
1142 /* Value is identical and not followed by a branch */
1148 if (RegValIsKnown (In->RegY) &&
1149 In->RegY == In->RegA &&
1150 (N = CS_GetNextEntry (S, I)) != 0 &&
1151 !CE_UseLoadFlags (N)) {
1152 /* Value is identical and not followed by a branch */
1162 /* Delete the entry if requested */
1165 /* Register value is not used, remove the load */
1168 /* Remember, we had changes */
1180 /* Free register info */
1183 /* Return the number of changes made */
1189 unsigned OptStoreLoad (CodeSeg* S)
1190 /* Remove a store followed by a load from the same location. */
1192 unsigned Changes = 0;
1194 /* Walk over the entries */
1196 while (I < CS_GetEntryCount (S)) {
1201 /* Get next entry */
1202 CodeEntry* E = CS_GetEntry (S, I);
1204 /* Check if it is a store instruction followed by a load from the
1205 * same address which is itself not followed by a conditional branch.
1207 if ((E->Info & OF_STORE) != 0 &&
1208 (N = CS_GetNextEntry (S, I)) != 0 &&
1211 ((E->OPC == OP65_STA && N->OPC == OP65_LDA) ||
1212 (E->OPC == OP65_STX && N->OPC == OP65_LDX) ||
1213 (E->OPC == OP65_STY && N->OPC == OP65_LDY)) &&
1214 strcmp (E->Arg, N->Arg) == 0 &&
1215 (X = CS_GetNextEntry (S, I+1)) != 0 &&
1216 !CE_UseLoadFlags (X)) {
1218 /* Register has already the correct value, remove the load */
1219 CS_DelEntry (S, I+1);
1221 /* Remember, we had changes */
1231 /* Return the number of changes made */
1237 unsigned OptTransfers1 (CodeSeg* S)
1238 /* Remove transfers from one register to another and back */
1240 unsigned Changes = 0;
1242 /* Walk over the entries */
1244 while (I < CS_GetEntryCount (S)) {
1250 /* Get next entry */
1251 CodeEntry* E = CS_GetEntry (S, I);
1253 /* Check if we have two transfer instructions */
1254 if ((E->Info & OF_XFR) != 0 &&
1255 (N = CS_GetNextEntry (S, I)) != 0 &&
1257 (N->Info & OF_XFR) != 0) {
1259 /* Check if it's a transfer and back */
1260 if ((E->OPC == OP65_TAX && N->OPC == OP65_TXA && !RegXUsed (S, I+2)) ||
1261 (E->OPC == OP65_TAY && N->OPC == OP65_TYA && !RegYUsed (S, I+2)) ||
1262 (E->OPC == OP65_TXA && N->OPC == OP65_TAX && !RegAUsed (S, I+2)) ||
1263 (E->OPC == OP65_TYA && N->OPC == OP65_TAY && !RegAUsed (S, I+2))) {
1265 /* If the next insn is a conditional branch, check if the insn
1266 * preceeding the first xfr will set the flags right, otherwise we
1267 * may not remove the sequence.
1269 if ((X = CS_GetNextEntry (S, I+1)) == 0) {
1272 if (CE_UseLoadFlags (X)) {
1274 /* No preceeding entry */
1277 P = CS_GetEntry (S, I-1);
1278 if ((P->Info & OF_SETF) == 0) {
1279 /* Does not set the flags */
1284 /* Remove both transfers */
1285 CS_DelEntry (S, I+1);
1288 /* Remember, we had changes */
1299 /* Return the number of changes made */
1305 unsigned OptTransfers2 (CodeSeg* S)
1306 /* Replace loads followed by a register transfer by a load with the second
1307 * register if possible.
1310 unsigned Changes = 0;
1312 /* Walk over the entries */
1314 while (I < CS_GetEntryCount (S)) {
1318 /* Get next entry */
1319 CodeEntry* E = CS_GetEntry (S, I);
1321 /* Check if we have a load followed by a transfer where the loaded
1322 * register is not used later.
1324 if ((E->Info & OF_LOAD) != 0 &&
1325 (N = CS_GetNextEntry (S, I)) != 0 &&
1327 (N->Info & OF_XFR) != 0 &&
1328 GetRegInfo (S, I+2, E->Chg) != E->Chg) {
1332 if (E->OPC == OP65_LDA && N->OPC == OP65_TAX) {
1333 /* LDA/TAX - check for the right addressing modes */
1334 if (E->AM == AM65_IMM ||
1336 E->AM == AM65_ABS ||
1337 E->AM == AM65_ABSY) {
1339 X = NewCodeEntry (OP65_LDX, E->AM, E->Arg, 0, N->LI);
1341 } else if (E->OPC == OP65_LDA && N->OPC == OP65_TAY) {
1342 /* LDA/TAY - check for the right addressing modes */
1343 if (E->AM == AM65_IMM ||
1345 E->AM == AM65_ZPX ||
1346 E->AM == AM65_ABS ||
1347 E->AM == AM65_ABSX) {
1349 X = NewCodeEntry (OP65_LDY, E->AM, E->Arg, 0, N->LI);
1351 } else if (E->OPC == OP65_LDY && N->OPC == OP65_TYA) {
1352 /* LDY/TYA. LDA supports all addressing modes LDY does */
1353 X = NewCodeEntry (OP65_LDA, E->AM, E->Arg, 0, N->LI);
1354 } else if (E->OPC == OP65_LDX && N->OPC == OP65_TXA) {
1355 /* LDX/TXA. LDA doesn't support zp,y, so we must map it to
1358 am_t AM = (E->AM == AM65_ZPY)? AM65_ABSY : E->AM;
1359 X = NewCodeEntry (OP65_LDA, AM, E->Arg, 0, N->LI);
1362 /* If we have a load entry, add it and remove the old stuff */
1364 CS_InsertEntry (S, X, I+2);
1365 CS_DelEntries (S, I, 2);
1367 --I; /* Correct for one entry less */
1375 /* Return the number of changes made */
1381 unsigned OptTransfers3 (CodeSeg* S)
1382 /* Replace a register transfer followed by a store of the second register by a
1383 * store of the first register if this is possible.
1386 unsigned Changes = 0;
1387 unsigned UsedRegs = REG_NONE; /* Track used registers */
1388 unsigned Xfer = 0; /* Index of transfer insn */
1389 unsigned Store = 0; /* Index of store insn */
1390 CodeEntry* XferEntry = 0; /* Pointer to xfer insn */
1391 CodeEntry* StoreEntry = 0; /* Pointer to store insn */
1398 } State = Initialize;
1400 /* Walk over the entries. Look for a xfer instruction that is followed by
1401 * a store later, where the value of the register is not used later.
1404 while (I < CS_GetEntryCount (S)) {
1406 /* Get next entry */
1407 CodeEntry* E = CS_GetEntry (S, I);
1412 /* Clear the list of used registers */
1413 UsedRegs = REG_NONE;
1417 if (E->Info & OF_XFR) {
1418 /* Found start of sequence */
1426 /* If we find a conditional jump, abort the sequence, since
1427 * handling them makes things really complicated.
1429 if (E->Info & OF_CBRA) {
1431 /* Switch back to searching */
1435 /* Does this insn use the target register of the transfer? */
1436 } else if ((E->Use & XferEntry->Chg) != 0) {
1438 /* It it's a store instruction, and the block is a basic
1439 * block, proceed. Otherwise restart
1441 if ((E->Info & OF_STORE) != 0 &&
1442 CS_IsBasicBlock (S, Xfer, I)) {
1451 /* Does this insn change the target register of the transfer? */
1452 } else if (E->Chg & XferEntry->Chg) {
1454 /* We *may* add code here to remove the transfer, but I'm
1455 * currently not sure about the consequences, so I won't
1456 * do that and bail out instead.
1461 /* Does this insn have a label? */
1462 } else if (CE_HasLabel (E)) {
1464 /* Too complex to handle - bail out */
1469 /* Track used registers */
1475 /* We are at the instruction behind the store. If the register
1476 * isn't used later, and we have an address mode match, we can
1477 * replace the transfer by a store and remove the store here.
1479 if ((GetRegInfo (S, I, XferEntry->Chg) & XferEntry->Chg) == 0 &&
1480 (StoreEntry->AM == AM65_ABS ||
1481 StoreEntry->AM == AM65_ZP) &&
1482 (StoreEntry->AM != AM65_ZP ||
1483 (StoreEntry->Chg & UsedRegs) == 0) &&
1484 !MemAccess (S, Xfer+1, Store-1, StoreEntry->Arg)) {
1486 /* Generate the replacement store insn */
1488 switch (XferEntry->OPC) {
1491 X = NewCodeEntry (OP65_STX,
1499 X = NewCodeEntry (OP65_STA,
1507 X = NewCodeEntry (OP65_STY,
1515 X = NewCodeEntry (OP65_STA,
1526 /* If we have a replacement store, change the code */
1528 /* Insert after the xfer insn */
1529 CS_InsertEntry (S, X, Xfer+1);
1531 /* Remove the xfer instead */
1532 CS_DelEntry (S, Xfer);
1534 /* Remove the final store */
1535 CS_DelEntry (S, Store);
1537 /* Correct I so we continue with the next insn */
1540 /* Remember we had changes */
1543 /* Restart after last xfer insn */
1547 /* Restart after last xfer insn */
1559 /* Return the number of changes made */
1565 unsigned OptTransfers4 (CodeSeg* S)
1566 /* Replace a load of a register followed by a transfer insn of the same register
1567 * by a load of the second register if possible.
1570 unsigned Changes = 0;
1571 unsigned Load = 0; /* Index of load insn */
1572 unsigned Xfer = 0; /* Index of transfer insn */
1573 CodeEntry* LoadEntry = 0; /* Pointer to load insn */
1574 CodeEntry* XferEntry = 0; /* Pointer to xfer insn */
1582 /* Walk over the entries. Look for a load instruction that is followed by
1586 while (I < CS_GetEntryCount (S)) {
1588 /* Get next entry */
1589 CodeEntry* E = CS_GetEntry (S, I);
1594 if (E->Info & OF_LOAD) {
1595 /* Found start of sequence */
1603 /* If we find a conditional jump, abort the sequence, since
1604 * handling them makes things really complicated.
1606 if (E->Info & OF_CBRA) {
1608 /* Switch back to searching */
1612 /* Does this insn use the target register of the load? */
1613 } else if ((E->Use & LoadEntry->Chg) != 0) {
1615 /* It it's a xfer instruction, and the block is a basic
1616 * block, proceed. Otherwise restart
1618 if ((E->Info & OF_XFR) != 0 &&
1619 CS_IsBasicBlock (S, Load, I)) {
1628 /* Does this insn change the target register of the load? */
1629 } else if (E->Chg & LoadEntry->Chg) {
1631 /* We *may* add code here to remove the load, but I'm
1632 * currently not sure about the consequences, so I won't
1633 * do that and bail out instead.
1641 /* We are at the instruction behind the xfer. If the register
1642 * isn't used later, and we have an address mode match, we can
1643 * replace the transfer by a load and remove the initial load.
1645 if ((GetRegInfo (S, I, LoadEntry->Chg) & LoadEntry->Chg) == 0 &&
1646 (LoadEntry->AM == AM65_ABS ||
1647 LoadEntry->AM == AM65_ZP ||
1648 LoadEntry->AM == AM65_IMM) &&
1649 !MemAccess (S, Load+1, Xfer-1, LoadEntry->Arg)) {
1651 /* Generate the replacement load insn */
1653 switch (XferEntry->OPC) {
1657 X = NewCodeEntry (OP65_LDA,
1665 X = NewCodeEntry (OP65_LDX,
1673 X = NewCodeEntry (OP65_LDY,
1684 /* If we have a replacement load, change the code */
1686 /* Insert after the xfer insn */
1687 CS_InsertEntry (S, X, Xfer+1);
1689 /* Remove the xfer instead */
1690 CS_DelEntry (S, Xfer);
1692 /* Remove the initial load */
1693 CS_DelEntry (S, Load);
1695 /* Correct I so we continue with the next insn */
1698 /* Remember we had changes */
1701 /* Restart after last xfer insn */
1705 /* Restart after last xfer insn */
1717 /* Return the number of changes made */
1723 unsigned OptPushPop (CodeSeg* S)
1724 /* Remove a PHA/PLA sequence were A is not used later */
1726 unsigned Changes = 0;
1727 unsigned Push = 0; /* Index of push insn */
1728 unsigned Pop = 0; /* Index of pop insn */
1729 unsigned ChgA = 0; /* Flag for A changed */
1734 } State = Searching;
1736 /* Walk over the entries. Look for a push instruction that is followed by
1737 * a pop later, where the pop is not followed by an conditional branch,
1738 * and where the value of the A register is not used later on.
1739 * Look out for the following problems:
1741 * - There may be another PHA/PLA inside the sequence: Restart it.
1742 * - If the PLA has a label, all jumps to this label must be inside
1743 * the sequence, otherwise we cannot remove the PHA/PLA.
1746 while (I < CS_GetEntryCount (S)) {
1750 /* Get next entry */
1751 CodeEntry* E = CS_GetEntry (S, I);
1756 if (E->OPC == OP65_PHA) {
1757 /* Found start of sequence */
1765 if (E->OPC == OP65_PHA) {
1766 /* Inner push/pop, restart */
1769 } else if (E->OPC == OP65_PLA) {
1770 /* Found a matching pop */
1772 /* Check that the block between Push and Pop is a basic
1773 * block (one entry, one exit). Otherwise ignore it.
1775 if (CS_IsBasicBlock (S, Push, Pop)) {
1778 /* Go into searching mode again */
1781 } else if (E->Chg & REG_A) {
1787 /* We're at the instruction after the PLA.
1788 * Check for the following conditions:
1789 * - If this instruction is a store of A, and A is not used
1790 * later, we may replace the PHA by the store and remove
1791 * pla if several other conditions are met.
1792 * - If this instruction is not a conditional branch, and A
1793 * is either unused later, or not changed by the code
1794 * between push and pop, we may remove PHA and PLA.
1796 if (E->OPC == OP65_STA &&
1797 !RegAUsed (S, I+1) &&
1798 !MemAccess (S, Push+1, Pop-1, E->Arg)) {
1800 /* Insert a STA after the PHA */
1801 X = NewCodeEntry (E->OPC, E->AM, E->Arg, E->JumpTo, E->LI);
1802 CS_InsertEntry (S, X, Push+1);
1804 /* Remove the PHA instead */
1805 CS_DelEntry (S, Push);
1807 /* Remove the PLA/STA sequence */
1808 CS_DelEntries (S, Pop, 2);
1810 /* Correct I so we continue with the next insn */
1813 /* Remember we had changes */
1816 } else if ((E->Info & OF_CBRA) == 0 &&
1817 (!RegAUsed (S, I) || !ChgA)) {
1819 /* We can remove the PHA and PLA instructions */
1820 CS_DelEntry (S, Pop);
1821 CS_DelEntry (S, Push);
1823 /* Correct I so we continue with the next insn */
1826 /* Remember we had changes */
1830 /* Go into search mode again */
1840 /* Return the number of changes made */
1846 unsigned OptPrecalc (CodeSeg* S)
1847 /* Replace immediate operations with the accu where the current contents are
1848 * known by a load of the final value.
1851 unsigned Changes = 0;
1854 /* Generate register info for this step */
1857 /* Walk over the entries */
1859 while (I < CS_GetEntryCount (S)) {
1861 /* Get next entry */
1862 CodeEntry* E = CS_GetEntry (S, I);
1864 /* Get pointers to the input and output registers of the insn */
1865 const RegContents* Out = &E->RI->Out;
1866 const RegContents* In = &E->RI->In;
1868 /* Argument for LDn and flag */
1869 const char* Arg = 0;
1870 opc_t OPC = OP65_LDA;
1872 /* Handle the different instructions */
1876 if (E->AM != AM65_IMM && RegValIsKnown (Out->RegA)) {
1877 /* Result of load is known */
1878 Arg = MakeHexArg (Out->RegA);
1883 if (E->AM != AM65_IMM && RegValIsKnown (Out->RegX)) {
1884 /* Result of load is known but register is X */
1885 Arg = MakeHexArg (Out->RegX);
1891 if (E->AM != AM65_IMM && RegValIsKnown (Out->RegY)) {
1892 /* Result of load is known but register is Y */
1893 Arg = MakeHexArg (Out->RegY);
1899 if (RegValIsKnown (Out->RegA)) {
1900 /* Accu op zp with known contents */
1901 Arg = MakeHexArg (Out->RegA);
1907 /* If this is an operation with an immediate operand of zero,
1908 * and the register is zero, the operation won't give us any
1909 * results we don't already have (including the flags), so
1910 * remove it. Something like this is generated as a result of
1911 * a compare where parts of the values are known to be zero.
1913 if (In->RegA == 0 && CE_IsKnownImm (E, 0x00)) {
1914 /* 0-0 or 0+0 -> remove */
1921 if (CE_IsKnownImm (E, 0xFF)) {
1922 /* AND with 0xFF, remove */
1925 } else if (CE_IsKnownImm (E, 0x00)) {
1926 /* AND with 0x00, replace by lda #$00 */
1927 Arg = MakeHexArg (0x00);
1928 } else if (RegValIsKnown (Out->RegA)) {
1929 /* Accu AND zp with known contents */
1930 Arg = MakeHexArg (Out->RegA);
1931 } else if (In->RegA == 0xFF) {
1932 /* AND but A contains 0xFF - replace by lda */
1933 CE_ReplaceOPC (E, OP65_LDA);
1939 if (CE_IsKnownImm (E, 0x00)) {
1940 /* ORA with zero, remove */
1943 } else if (CE_IsKnownImm (E, 0xFF)) {
1944 /* ORA with 0xFF, replace by lda #$ff */
1945 Arg = MakeHexArg (0xFF);
1946 } else if (RegValIsKnown (Out->RegA)) {
1947 /* Accu AND zp with known contents */
1948 Arg = MakeHexArg (Out->RegA);
1949 } else if (In->RegA == 0) {
1950 /* ORA but A contains 0x00 - replace by lda */
1951 CE_ReplaceOPC (E, OP65_LDA);
1961 /* Check if we have to replace the insn by LDA */
1963 CodeEntry* X = NewCodeEntry (OPC, AM65_IMM, Arg, 0, E->LI);
1964 CS_InsertEntry (S, X, I+1);
1973 /* Free register info */
1976 /* Return the number of changes made */
1982 /*****************************************************************************/
1983 /* Optimize branch types */
1984 /*****************************************************************************/
1988 unsigned OptBranchDist (CodeSeg* S)
1989 /* Change branches for the distance needed. */
1991 unsigned Changes = 0;
1993 /* Walk over the entries */
1995 while (I < CS_GetEntryCount (S)) {
1997 /* Get next entry */
1998 CodeEntry* E = CS_GetEntry (S, I);
2000 /* Check if it's a conditional branch to a local label. */
2001 if (E->Info & OF_CBRA) {
2003 /* Is this a branch to a local symbol? */
2004 if (E->JumpTo != 0) {
2006 /* Check if the branch distance is short */
2007 int IsShort = IsShortDist (GetBranchDist (S, I, E->JumpTo->Owner));
2009 /* Make the branch short/long according to distance */
2010 if ((E->Info & OF_LBRA) == 0 && !IsShort) {
2011 /* Short branch but long distance */
2012 CE_ReplaceOPC (E, MakeLongBranch (E->OPC));
2014 } else if ((E->Info & OF_LBRA) != 0 && IsShort) {
2015 /* Long branch but short distance */
2016 CE_ReplaceOPC (E, MakeShortBranch (E->OPC));
2020 } else if ((E->Info & OF_LBRA) == 0) {
2022 /* Short branch to external symbol - make it long */
2023 CE_ReplaceOPC (E, MakeLongBranch (E->OPC));
2028 } else if ((CPUIsets[CPU] & CPU_ISET_65SC02) != 0 &&
2029 (E->Info & OF_UBRA) != 0 &&
2031 IsShortDist (GetBranchDist (S, I, E->JumpTo->Owner))) {
2033 /* The jump is short and may be replaced by a BRA on the 65C02 CPU */
2034 CE_ReplaceOPC (E, OP65_BRA);
2043 /* Return the number of changes made */
2049 /*****************************************************************************/
2050 /* Optimize indirect loads */
2051 /*****************************************************************************/
2055 unsigned OptIndLoads1 (CodeSeg* S)
2064 * provided that x and y are both zero.
2067 unsigned Changes = 0;
2070 /* Generate register info for this step */
2073 /* Walk over the entries */
2075 while (I < CS_GetEntryCount (S)) {
2077 /* Get next entry */
2078 CodeEntry* E = CS_GetEntry (S, I);
2080 /* Check if it's what we're looking for */
2081 if (E->OPC == OP65_LDA &&
2082 E->AM == AM65_ZP_INDY &&
2083 E->RI->In.RegY == 0 &&
2084 E->RI->In.RegX == 0) {
2086 /* Replace by the same insn with other addressing mode */
2087 CodeEntry* X = NewCodeEntry (E->OPC, AM65_ZPX_IND, E->Arg, 0, E->LI);
2088 CS_InsertEntry (S, X, I+1);
2090 /* Remove the old insn */
2100 /* Free register info */
2103 /* Return the number of changes made */
2109 unsigned OptIndLoads2 (CodeSeg* S)
2118 * provided that x and y are both zero.
2121 unsigned Changes = 0;
2124 /* Generate register info for this step */
2127 /* Walk over the entries */
2129 while (I < CS_GetEntryCount (S)) {
2131 /* Get next entry */
2132 CodeEntry* E = CS_GetEntry (S, I);
2134 /* Check if it's what we're looking for */
2135 if (E->OPC == OP65_LDA &&
2136 E->AM == AM65_ZPX_IND &&
2137 E->RI->In.RegY == 0 &&
2138 E->RI->In.RegX == 0) {
2140 /* Replace by the same insn with other addressing mode */
2141 CodeEntry* X = NewCodeEntry (E->OPC, AM65_ZP_INDY, E->Arg, 0, E->LI);
2142 CS_InsertEntry (S, X, I+1);
2144 /* Remove the old insn */
2154 /* Free register info */
2157 /* Return the number of changes made */