]> git.sur5r.net Git - cc65/blob - src/cc65/opcodes.h
1c9684b570c6c09915f43c0f7b543a8d9b8d75af
[cc65] / src / cc65 / opcodes.h
1 /*****************************************************************************/
2 /*                                                                           */
3 /*                                 opcodes.h                                 */
4 /*                                                                           */
5 /*                  Opcode and addressing mode definitions                   */
6 /*                                                                           */
7 /*                                                                           */
8 /*                                                                           */
9 /* (C) 2001      Ullrich von Bassewitz                                       */
10 /*               Wacholderweg 14                                             */
11 /*               D-70597 Stuttgart                                           */
12 /* EMail:        uz@cc65.org                                                 */
13 /*                                                                           */
14 /*                                                                           */
15 /* This software is provided 'as-is', without any expressed or implied       */
16 /* warranty.  In no event will the authors be held liable for any damages    */
17 /* arising from the use of this software.                                    */
18 /*                                                                           */
19 /* Permission is granted to anyone to use this software for any purpose,     */
20 /* including commercial applications, and to alter it and redistribute it    */
21 /* freely, subject to the following restrictions:                            */
22 /*                                                                           */
23 /* 1. The origin of this software must not be misrepresented; you must not   */
24 /*    claim that you wrote the original software. If you use this software   */
25 /*    in a product, an acknowledgment in the product documentation would be  */
26 /*    appreciated but is not required.                                       */
27 /* 2. Altered source versions must be plainly marked as such, and must not   */
28 /*    be misrepresented as being the original software.                      */
29 /* 3. This notice may not be removed or altered from any source              */
30 /*    distribution.                                                          */
31 /*                                                                           */
32 /*****************************************************************************/
33
34
35
36 #ifndef OPCODES_H
37 #define OPCODES_H
38
39
40
41 /* common */
42 #include "inline.h"
43
44
45
46 /*****************************************************************************/
47 /*                                   Data                                    */
48 /*****************************************************************************/
49
50
51
52 /* Definitions for the possible opcodes */
53 typedef enum {
54
55     /* 65XX opcodes */
56     OP65_ADC,
57     OP65_AND,
58     OP65_ASL,
59     OP65_BCC,
60     OP65_BCS,
61     OP65_BEQ,
62     OP65_BIT,
63     OP65_BMI,
64     OP65_BNE,
65     OP65_BPL,
66     OP65_BRA,
67     OP65_BRK,
68     OP65_BVC,
69     OP65_BVS,
70     OP65_CLC,
71     OP65_CLD,
72     OP65_CLI,
73     OP65_CLV,
74     OP65_CMP,
75     OP65_CPX,
76     OP65_CPY,
77     OP65_DEA,
78     OP65_DEC,
79     OP65_DEX,
80     OP65_DEY,
81     OP65_EOR,
82     OP65_INA,
83     OP65_INC,
84     OP65_INX,
85     OP65_INY,
86     OP65_JCC,
87     OP65_JCS,
88     OP65_JEQ,
89     OP65_JMI,
90     OP65_JMP,
91     OP65_JNE,
92     OP65_JPL,
93     OP65_JSR,
94     OP65_JVC,
95     OP65_JVS,
96     OP65_LDA,
97     OP65_LDX,
98     OP65_LDY,
99     OP65_LSR,
100     OP65_NOP,
101     OP65_ORA,
102     OP65_PHA,
103     OP65_PHP,
104     OP65_PHX,
105     OP65_PHY,
106     OP65_PLA,
107     OP65_PLP,
108     OP65_PLX,
109     OP65_PLY,
110     OP65_ROL,
111     OP65_ROR,
112     OP65_RTI,
113     OP65_RTS,
114     OP65_SBC,
115     OP65_SEC,
116     OP65_SED,
117     OP65_SEI,
118     OP65_STA,
119     OP65_STX,
120     OP65_STY,
121     OP65_TAX,
122     OP65_TAY,
123     OP65_TRB,
124     OP65_TSB,
125     OP65_TSX,
126     OP65_TXA,
127     OP65_TXS,
128     OP65_TYA,
129     OPCODE_COUNT                /* Number of opcodes available */
130 } opc_t;
131
132 /* Addressing modes (bitmapped). */
133 typedef enum {
134     AM65_IMP,                   /* implicit */
135     AM65_ACC,                   /* accumulator */
136     AM65_IMM,                   /* immidiate */
137     AM65_ZP,                    /* zeropage */
138     AM65_ZPX,                   /* zeropage,X */
139     AM65_ABS,                   /* absolute */
140     AM65_ABSX,                  /* absolute,X */
141     AM65_ABSY,                  /* absolute,Y */
142     AM65_ZPX_IND,               /* (zeropage,x) */
143     AM65_ZP_INDY,               /* (zeropage),y */
144     AM65_ZP_IND,                /* (zeropage) */
145     AM65_BRA                    /* branch */
146 } am_t;
147
148 /* Branch conditions */
149 typedef enum {
150     BC_CC,
151     BC_CS,
152     BC_EQ,                 
153     BC_MI,
154     BC_NE,
155     BC_PL,
156     BC_VC,
157     BC_VS
158 } bc_t;
159
160 /* Opcode info */
161 #define OF_NONE 0x0000U                 /* No additional information */
162 #define OF_UBRA 0x0001U                 /* Unconditional branch */
163 #define OF_CBRA 0x0002U                 /* Conditional branch */
164 #define OF_ZBRA 0x0004U                 /* Branch on zero flag condition */
165 #define OF_FBRA 0x0008U                 /* Branch on cond set by a load */
166 #define OF_LBRA 0x0010U                 /* Jump/branch is long */
167 #define OF_RET  0x0020U                 /* Return from function */
168 #define OF_LOAD 0x0040U                 /* Register load */
169 #define OF_XFR  0x0080U                 /* Transfer instruction */
170 #define OF_CALL 0x0100U                 /* A subroutine call */
171
172 /* Combined infos */
173 #define OF_BRA  (OF_UBRA | OF_CBRA)     /* Operation is a jump/branch */
174 #define OF_DEAD (OF_UBRA | OF_RET)      /* Dead end - no exec behind this point */
175
176 /* Opcode description */
177 typedef struct {
178     opc_t           OPC;                /* Opcode */
179     char            Mnemo[8];           /* Mnemonic */
180     unsigned char   Size;               /* Size, 0 = check addressing mode */
181     unsigned char   Use;                /* Registers used by this insn */
182     unsigned char   Chg;                /* Registers changed by this insn */
183     unsigned short  Info;               /* Additional information */
184 } OPCDesc;
185
186 /* Opcode description table */
187 extern const OPCDesc OPCTable[OPCODE_COUNT];
188
189
190
191 /*****************************************************************************/
192 /*                                   Code                                    */
193 /*****************************************************************************/
194
195
196
197 const OPCDesc* FindOpcode (const char* OPC);
198 /* Find the given opcode and return the opcode description. If the opcode was
199  * not found, NULL is returned.
200  */
201
202 unsigned GetInsnSize (opc_t OPC, am_t AM);
203 /* Return the size of the given instruction */
204
205 #if defined(HAVE_INLINE)
206 INLINE const OPCDesc* GetOPCDesc (opc_t OPC)
207 /* Get an opcode description */
208 {
209     /* Return the description */
210     return &OPCTable [OPC];
211 }
212 #else
213 #  define GetOPCDesc(OPC)       (&OPCTable [(OPC)])
214 #endif
215
216 #if defined(HAVE_INLINE)
217 INLINE unsigned GetOPCInfo (opc_t OPC)
218 /* Get opcode information */
219 {
220     /* Return the info */
221     return OPCTable[OPC].Info;
222 }
223 #else
224 #  define GetOPCInfo(OPC)       (OPCTable[(OPC)].Info)
225 #endif
226
227 unsigned char GetAMUseInfo (am_t AM);
228 /* Get usage info for the given addressing mode (addressing modes that use
229  * index registers return REG_r info for these registers).
230  */
231
232 opc_t GetInverseBranch (opc_t OPC);
233 /* Return a branch that reverse the condition of the branch given in OPC */
234
235 opc_t MakeShortBranch (opc_t OPC);
236 /* Return the short version of the given branch. If the branch is already
237  * a short branch, return the opcode unchanged.
238  */
239
240 opc_t MakeLongBranch (opc_t OPC);
241 /* Return the long version of the given branch. If the branch is already
242  * a long branch, return the opcode unchanged.
243  */
244
245 bc_t GetBranchCond (opc_t OPC);
246 /* Get the condition for the conditional branch in OPC */
247
248 bc_t GetInverseCond (bc_t BC);
249 /* Return the inverse condition of the given one */
250
251
252
253 /* End of opcodes.h */
254 #endif
255
256
257