1 /***************************************************************************
2 * Copyright (C) 2008 by Kevin McGuire *
3 * Copyright (C) 2008 by Marcel Wijlaars *
4 * Copyright (C) 2009 by Michael Ashton *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
20 ***************************************************************************/
28 #include "binarybuffer.h"
29 #include "time_support.h"
32 static int aduc702x_build_sector_list(struct flash_bank_s *bank);
33 static int aduc702x_check_flash_completion(target_t* target, unsigned int timeout_ms);
34 static int aduc702x_set_write_enable(target_t *target, int enable);
36 #define ADUC702x_FLASH 0xfffff800
37 #define ADUC702x_FLASH_FEESTA (0*4)
38 #define ADUC702x_FLASH_FEEMOD (1*4)
39 #define ADUC702x_FLASH_FEECON (2*4)
40 #define ADUC702x_FLASH_FEEDAT (3*4)
41 #define ADUC702x_FLASH_FEEADR (4*4)
42 #define ADUC702x_FLASH_FEESIGN (5*4)
43 #define ADUC702x_FLASH_FEEPRO (6*4)
44 #define ADUC702x_FLASH_FEEHIDE (7*4)
46 struct aduc702x_flash_bank {
47 struct working_area *write_algorithm;
50 /* flash bank aduc702x 0 0 0 0 <target#>
51 * The ADC7019-28 devices all have the same flash layout */
52 FLASH_BANK_COMMAND_HANDLER(aduc702x_flash_bank_command)
54 struct aduc702x_flash_bank *nbank;
56 nbank = malloc(sizeof(struct aduc702x_flash_bank));
59 bank->size = 0xF800; // top 4k not accessible
60 bank->driver_priv = nbank;
62 aduc702x_build_sector_list(bank);
67 static int aduc702x_build_sector_list(struct flash_bank_s *bank)
69 //aduc7026_flash_bank_t *aduc7026_info = bank->driver_priv;
75 bank->num_sectors = bank->size / 512;
76 bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
77 for (i = 0; i < bank->num_sectors; ++i)
79 bank->sectors[i].offset = offset;
80 bank->sectors[i].size = 512;
81 offset += bank->sectors[i].size;
82 bank->sectors[i].is_erased = -1;
83 bank->sectors[i].is_protected = 0;
89 static int aduc702x_protect_check(struct flash_bank_s *bank)
91 printf("aduc702x_protect_check not implemented yet.\n");
95 static int aduc702x_erase(struct flash_bank_s *bank, int first, int last)
101 target_t *target = bank->target;
103 aduc702x_set_write_enable(target, 1);
106 if (((first | last) == 0) || ((first == 0) && (last >= bank->num_sectors))) {
107 LOG_DEBUG("performing mass erase.\n");
108 target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEDAT, 0x3cff);
109 target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, 0xffc3);
110 target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x06);
112 if (aduc702x_check_flash_completion(target, 3500) != ERROR_OK)
114 LOG_ERROR("mass erase failed\n");
115 aduc702x_set_write_enable(target, 0);
116 return ERROR_FLASH_OPERATION_FAILED;
119 LOG_DEBUG("mass erase successful.\n");
124 count = last - first + 1;
125 for (x = 0; x < count; ++x)
127 adr = bank->base + ((first + x) * 512);
129 target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, adr);
130 target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x05);
132 if (aduc702x_check_flash_completion(target, 50) != ERROR_OK)
134 LOG_ERROR("failed to erase sector at address 0x%08lX\n", adr);
135 aduc702x_set_write_enable(target, 0);
136 return ERROR_FLASH_SECTOR_NOT_ERASED;
139 LOG_DEBUG("erased sector at address 0x%08lX\n", adr);
143 aduc702x_set_write_enable(target, 0);
148 static int aduc702x_protect(struct flash_bank_s *bank, int set, int first, int last)
150 printf("aduc702x_protect not implemented yet.\n");
151 return ERROR_FLASH_OPERATION_FAILED;
154 /* If this fn returns ERROR_TARGET_RESOURCE_NOT_AVAILABLE, then the caller can fall
155 * back to another mechanism that does not require onboard RAM
157 * Caller should not check for other return values specifically
159 static int aduc702x_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
161 struct aduc702x_flash_bank *aduc702x_info = bank->driver_priv;
162 target_t *target = bank->target;
163 uint32_t buffer_size = 7000;
164 struct working_area *source;
165 uint32_t address = bank->base + offset;
166 struct reg_param reg_params[6];
167 struct armv4_5_algorithm armv4_5_info;
168 int retval = ERROR_OK;
170 if (((count%2)!=0)||((offset%2)!=0))
172 LOG_ERROR("write block must be multiple of two bytes in offset & length");
178 r0 - address of source data (absolute)
179 r1 - number of halfwords to be copied
180 r2 - start address in flash (offset from beginning of flash memory)
182 r4 - base address of flash controller (0xFFFFF800)
187 r6 - set to 2, used to write flash command
190 uint32_t aduc702x_flash_write_code[] = {
192 0xe3a05008, // mov r5, #8 ; 0x8
193 0xe5845004, // str r5, [r4, #4]
194 0xe3a06002, // mov r6, #2 ; 0x2
196 0xe1c421b0, // strh r2, [r4, #16]
197 0xe0d050b2, // ldrh r5, [r0], #2
198 0xe1c450bc, // strh r5, [r4, #12]
199 0xe5c46008, // strb r6, [r4, #8]
201 0xe1d430b0, // ldrh r3, [r4]
202 0xe3130004, // tst r3, #4 ; 0x4
203 0x1afffffc, // bne 1001c <wait_complete>
204 0xe2822002, // add r2, r2, #2 ; 0x2
205 0xe2511001, // subs r1, r1, #1 ; 0x1
206 0x0a000001, // beq 1003c <done>
207 0xe3130001, // tst r3, #1 ; 0x1
208 0x1afffff3, // bne 1000c <next>
210 0xeafffffe // b 1003c <done>
213 /* flash write code */
214 if (target_alloc_working_area(target, sizeof(aduc702x_flash_write_code),
215 &aduc702x_info->write_algorithm) != ERROR_OK)
217 LOG_WARNING("no working area available, can't do block memory writes");
218 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
221 retval=target_write_buffer(target, aduc702x_info->write_algorithm->address,
222 sizeof(aduc702x_flash_write_code), (uint8_t*)aduc702x_flash_write_code);
223 if (retval!=ERROR_OK)
229 while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK)
232 if (buffer_size <= 256)
234 /* if we already allocated the writing code, but failed to get a buffer, free the algorithm */
235 if (aduc702x_info->write_algorithm)
236 target_free_working_area(target, aduc702x_info->write_algorithm);
238 LOG_WARNING("no large enough working area available, can't do block memory writes");
239 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
243 armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC;
244 armv4_5_info.core_mode = ARMV4_5_MODE_SVC;
245 armv4_5_info.core_state = ARMV4_5_STATE_ARM;
247 init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
248 init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
249 init_reg_param(®_params[2], "r2", 32, PARAM_OUT);
250 init_reg_param(®_params[3], "r3", 32, PARAM_IN);
251 init_reg_param(®_params[4], "r4", 32, PARAM_OUT);
255 uint32_t thisrun_count = (count > buffer_size) ? buffer_size : count;
257 retval=target_write_buffer(target, source->address, thisrun_count, buffer);
258 if (retval!=ERROR_OK)
263 buf_set_u32(reg_params[0].value, 0, 32, source->address);
264 buf_set_u32(reg_params[1].value, 0, 32, thisrun_count/2);
265 buf_set_u32(reg_params[2].value, 0, 32, address);
266 buf_set_u32(reg_params[4].value, 0, 32, 0xFFFFF800);
268 if ((retval = target_run_algorithm(target, 0, NULL, 5,
269 reg_params, aduc702x_info->write_algorithm->address,
270 aduc702x_info->write_algorithm->address + sizeof(aduc702x_flash_write_code) - 4,
271 10000, &armv4_5_info)) != ERROR_OK)
273 LOG_ERROR("error executing aduc702x flash write algorithm");
277 if ((buf_get_u32(reg_params[3].value, 0, 32) & 1) != 1)
279 /* FIX!!!! what does this mean??? replace w/sensible error message */
280 LOG_ERROR("aduc702x detected error writing flash");
285 buffer += thisrun_count;
286 address += thisrun_count;
287 count -= thisrun_count;
290 target_free_working_area(target, source);
291 target_free_working_area(target, aduc702x_info->write_algorithm);
293 destroy_reg_param(®_params[0]);
294 destroy_reg_param(®_params[1]);
295 destroy_reg_param(®_params[2]);
296 destroy_reg_param(®_params[3]);
297 destroy_reg_param(®_params[4]);
302 /* All-JTAG, single-access method. Very slow. Used only if there is no
303 * working area available. */
304 static int aduc702x_write_single(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
308 target_t *target = bank->target;
310 aduc702x_set_write_enable(target, 1);
312 for (x = 0; x < count; x += 2) {
314 target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, offset + x);
317 if ((x + 1) == count)
320 target_read_u8(target, offset + x + 1, &b);
325 target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEDAT, buffer[x] | (b << 8));
327 // do single-write command
328 target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x02);
330 if (aduc702x_check_flash_completion(target, 1) != ERROR_OK)
332 LOG_ERROR("single write failed for address 0x%08lX\n", (unsigned long)(offset + x));
333 aduc702x_set_write_enable(target, 0);
334 return ERROR_FLASH_OPERATION_FAILED;
338 LOG_DEBUG("wrote %d bytes at address 0x%08lX\n", (int)count, (unsigned long)(offset + x));
340 aduc702x_set_write_enable(target, 0);
345 int aduc702x_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
349 /* try using a block write */
350 if ((retval = aduc702x_write_block(bank, buffer, offset, count)) != ERROR_OK)
352 if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE)
354 /* if block write failed (no sufficient working area),
355 * use normal (slow) JTAG method */
356 LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
358 if ((retval = aduc702x_write_single(bank, buffer, offset, count)) != ERROR_OK)
360 LOG_ERROR("slow write failed");
361 return ERROR_FLASH_OPERATION_FAILED;
369 static int aduc702x_probe(struct flash_bank_s *bank)
374 static int aduc702x_info(struct flash_bank_s *bank, char *buf, int buf_size)
376 snprintf(buf, buf_size, "aduc702x flash driver info");
381 * enable = 1 enables writes & erases, 0 disables them */
382 static int aduc702x_set_write_enable(target_t *target, int enable)
384 // don't bother to preserve int enable bit here
385 target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEMOD, enable ? 8 : 0);
390 /* wait up to timeout_ms for controller to not be busy,
391 * then check whether the command passed or failed.
393 * this function sleeps 1ms between checks (after the first one),
394 * so in some cases may slow things down without a usleep after the first read */
395 static int aduc702x_check_flash_completion(target_t* target, unsigned int timeout_ms)
399 long long endtime = timeval_ms() + timeout_ms;
401 target_read_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEESTA, &v);
402 if ((v & 4) == 0) break;
404 if (timeval_ms() >= endtime) break;
407 if (v & 2) return ERROR_FAIL;
408 // if a command is ignored, both the success and fail bits may be 0
409 else if ((v & 3) == 0) return ERROR_FAIL;
410 else return ERROR_OK;
413 struct flash_driver aduc702x_flash = {
415 .flash_bank_command = &aduc702x_flash_bank_command,
416 .erase = &aduc702x_erase,
417 .protect = &aduc702x_protect,
418 .write = &aduc702x_write,
419 .probe = &aduc702x_probe,
420 .auto_probe = &aduc702x_probe,
421 .erase_check = &default_flash_blank_check,
422 .protect_check = &aduc702x_protect_check,
423 .info = &aduc702x_info