1 /***************************************************************************
2 * Copyright (C) 2008 by *
3 * Karl RobinSod <karl.robinsod@gmail.com> *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
21 /***************************************************************************
22 * There are some things to notice
24 * You need to unprotect flash sectors each time you connect the OpenOCD
25 * Dumping 1MB takes about 60 Seconds
26 * Full erase (sectors 0-22 inclusive) takes 2-4 seconds
27 * Writing 1MB takes 88 seconds
29 ***************************************************************************/
34 #include "replacements.h"
41 #include "binarybuffer.h"
48 #define LOAD_TIMER_ERASE 0
49 #define LOAD_TIMER_WRITE 1
51 #define FLASH_PAGE_SIZE 512
53 /* LPC288X control registers */
54 #define DBGU_CIDR 0x8000507C
55 /* LPC288X flash registers */
56 #define F_CTRL 0x80102000 /* Flash control register R/W 0x5 */
57 #define F_STAT 0x80102004 /* Flash status register RO 0x45 */
58 #define F_PROG_TIME 0x80102008 /* Flash program time register R/W 0 */
59 #define F_WAIT 0x80102010 /* Flash read wait state register R/W 0xC004 */
60 #define F_CLK_TIME 0x8010201C /* Flash clock divider for 66 kHz generation R/W 0 */
61 #define F_INTEN_CLR 0x80102FD8 /* Clear interrupt enable bits WO - */
62 #define F_INTEN_SET 0x80102FDC /* Set interrupt enable bits WO - */
63 #define F_INT_STAT 0x80102FE0 /* Interrupt status bits RO 0 */
64 #define F_INTEN 0x80102FE4 /* Interrupt enable bits RO 0 */
65 #define F_INT_CLR 0x80102FE8 /* Clear interrupt status bits WO */
66 #define F_INT_SET 0x80102FEC /* Set interrupt status bits WO - */
67 #define FLASH_PD 0x80005030 /* Allows turning off the Flash memory for power savings. R/W 1*/
68 #define FLASH_INIT 0x80005034 /* Monitors Flash readiness, such as recovery from Power Down mode. R/W -*/
72 #define FC_FUNC 0x0002
74 #define FC_RD_LATCH 0x0020
75 #define FC_PROTECT 0x0080
76 #define FC_SET_DATA 0x0400
77 #define FC_RSSL 0x0800
78 #define FC_PROG_REQ 0x1000
79 #define FC_CLR_BUF 0x4000
80 #define FC_LOAD_REQ 0x8000
82 #define FS_DONE 0x0001
83 #define FS_PROGGNT 0x0002
87 #define FPT_TIME_MASK 0x7FFF
89 #define FPT_ENABLE 0x8000
91 #define FW_WAIT_STATES_MASK 0x00FF
92 #define FW_SET_MASK 0xC000
95 #define FCT_CLK_DIV_MASK 0x0FFF
99 int lpc288x_register_commands(struct command_context_s *cmd_ctx);
100 int lpc288x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
101 int lpc288x_erase(struct flash_bank_s *bank, int first, int last);
102 int lpc288x_protect(struct flash_bank_s *bank, int set, int first, int last);
103 int lpc288x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
104 int lpc288x_probe(struct flash_bank_s *bank);
105 int lpc288x_auto_probe(struct flash_bank_s *bank);
106 int lpc288x_erase_check(struct flash_bank_s *bank);
107 int lpc288x_protect_check(struct flash_bank_s *bank);
108 int lpc288x_info(struct flash_bank_s *bank, char *buf, int buf_size);
109 void lpc288x_set_flash_mode(flash_bank_t *bank, u8 flashplane, int mode);
110 u32 lpc288x_wait_status_busy(flash_bank_t *bank, int timeout);
111 void lpc288x_load_timer(int erase, struct target_s *target);
112 void lpc288x_set_flash_clk(struct flash_bank_s *bank);
113 u32 lpc288x_system_ready(struct flash_bank_s *bank);
114 int lpc288x_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
116 flash_driver_t lpc288x_flash =
119 .register_commands = lpc288x_register_commands,
120 .flash_bank_command = lpc288x_flash_bank_command,
121 .erase = lpc288x_erase,
122 .protect = lpc288x_protect,
123 .write = lpc288x_write,
124 .probe = lpc288x_probe,
125 .auto_probe = lpc288x_probe,
126 .erase_check = lpc288x_erase_check,
127 .protect_check = lpc288x_protect_check,
132 int lpc288x_register_commands(struct command_context_s *cmd_ctx)
139 u32 lpc288x_wait_status_busy(flash_bank_t *bank, int timeout)
142 target_t *target = bank->target;
147 target_read_u32(target, F_STAT, &status);
148 }while (((status & FS_DONE) == 0) && timeout);
152 LOG_DEBUG("Timedout!");
153 return ERROR_FLASH_OPERATION_FAILED;
158 /* Read device id register and fill in driver info structure */
159 int lpc288x_read_part_info(struct flash_bank_s *bank)
161 lpc288x_flash_bank_t *lpc288x_info = bank->driver_priv;
162 target_t *target = bank->target;
169 if (lpc288x_info->cidr == 0x0102100A)
170 return ERROR_OK; /* already probed, multiple probes may cause memory leak, not allowed */
172 /* Read and parse chip identification register */
173 target_read_u32(target, DBGU_CIDR, &cidr);
175 if (cidr != 0x0102100A)
177 LOG_WARNING("Cannot identify target as an LPC288X (%08X)",cidr);
178 return ERROR_FLASH_OPERATION_FAILED;
181 lpc288x_info->cidr = cidr;
182 lpc288x_info->sector_size_break = 0x000F0000;
183 lpc288x_info->target_name = "LPC288x";
185 /* setup the sector info... */
187 bank->num_sectors = 23;
188 bank->sectors = malloc(sizeof(flash_sector_t) * 23);
190 for (i = 0; i < 15; i++)
192 bank->sectors[i].offset = offset;
193 bank->sectors[i].size = 64 * 1024;
194 offset += bank->sectors[i].size;
195 bank->sectors[i].is_erased = -1;
196 bank->sectors[i].is_protected = 1;
198 for (i = 15; i < 23; i++)
200 bank->sectors[i].offset = offset;
201 bank->sectors[i].size = 8 * 1024;
202 offset += bank->sectors[i].size;
203 bank->sectors[i].is_erased = -1;
204 bank->sectors[i].is_protected = 1;
210 int lpc288x_protect_check(struct flash_bank_s *bank)
215 /* flash_bank LPC288x 0 0 0 0 <target#> <cclk>
217 int lpc288x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
219 lpc288x_flash_bank_t *lpc288x_info;
224 LOG_WARNING("incomplete flash_bank LPC288x configuration");
225 return ERROR_FLASH_BANK_INVALID;
228 lpc288x_info = malloc(sizeof(lpc288x_flash_bank_t));
229 bank->driver_priv = lpc288x_info;
231 /* part wasn't probed for info yet */
232 lpc288x_info->cidr = 0;
233 lpc288x_info->cclk = strtoul(args[6], NULL, 0);
239 The frequency is the AHB clock frequency divided by (CLK_DIV ×
240 3) + 1. This must be programmed such that the Flash
241 Programming clock frequency is 66 kHz ± 20%.
246 void lpc288x_set_flash_clk(struct flash_bank_s *bank)
249 lpc288x_flash_bank_t *lpc288x_info = bank->driver_priv;
250 clk_time = (lpc288x_info->cclk / 66000) / 3;
251 target_write_u32(bank->target, F_CTRL, FC_CS | FC_WEN );
252 target_write_u32(bank->target, F_CLK_TIME, clk_time);
256 AHB tcyc (in ns) 83 ns
258 LOAD_TIMER_ERASE FPT_TIME = ((400,000,000 / AHB tcyc (in ns)) - 2) / 512
259 = 9412 (9500) (AN10548 9375)
260 LOAD_TIMER_WRITE FPT_TIME = ((1,000,000 / AHB tcyc (in ns)) - 2) / 512
261 = 23 (75) (AN10548 72 - is this wrong?)
263 TODO: Sort out timing calcs ;)
265 void lpc288x_load_timer(int erase, struct target_s *target)
267 if(erase == LOAD_TIMER_ERASE)
269 target_write_u32(target, F_PROG_TIME, FPT_ENABLE | 9500);
273 target_write_u32(target, F_PROG_TIME, FPT_ENABLE | 75);
279 u32 lpc288x_system_ready(struct flash_bank_s *bank)
281 lpc288x_flash_bank_t *lpc288x_info = bank->driver_priv;
282 if (lpc288x_info->cidr == 0)
284 return ERROR_FLASH_BANK_NOT_PROBED;
287 if (bank->target->state != TARGET_HALTED)
289 return ERROR_TARGET_NOT_HALTED;
294 int lpc288x_erase_check(struct flash_bank_s *bank)
296 u32 buffer, test_bytes;
297 u32 addr, sector, i, status = lpc288x_system_ready(bank); /* probed? halted? */
298 if(status != ERROR_OK)
300 LOG_INFO("Processor not halted/not probed");
307 int lpc288x_erase(struct flash_bank_s *bank, int first, int last)
311 target_t *target = bank->target;
313 status = lpc288x_system_ready(bank); /* probed? halted? */
314 if(status != ERROR_OK)
319 if ((first < 0) || (last < first) || (last >= bank->num_sectors))
321 LOG_INFO("Bad sector range");
322 return ERROR_FLASH_SECTOR_INVALID;
325 /* Configure the flash controller timing */
326 lpc288x_set_flash_clk(bank);
328 for (sector = first; sector <= last; sector++)
330 if (lpc288x_wait_status_busy(bank, 1000) != ERROR_OK)
332 return ERROR_FLASH_OPERATION_FAILED;
335 lpc288x_load_timer(LOAD_TIMER_ERASE,target);
337 target_write_u32( target,
338 bank->sectors[sector].offset,
341 target_write_u32( target,
347 if (lpc288x_wait_status_busy(bank, 1000) != ERROR_OK)
349 return ERROR_FLASH_OPERATION_FAILED;
356 int lpc288x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
358 u8 page_buffer[FLASH_PAGE_SIZE];
359 u32 i, status, source_offset,dest_offset;
360 target_t *target = bank->target;
361 u32 bytes_remaining = count;
362 u32 first_sector, last_sector, sector, page;
364 /* probed? halted? */
365 status = lpc288x_system_ready(bank);
366 if(status != ERROR_OK)
371 /* Initialise search indices */
372 first_sector = last_sector = 0xffffffff;
374 /* validate the write range... */
375 for(i = 0; i < bank->num_sectors; i++)
377 if((offset >= bank->sectors[i].offset) &&
378 (offset < (bank->sectors[i].offset + bank->sectors[i].size)) &&
379 (first_sector == 0xffffffff))
382 /* all writes must start on a sector boundary... */
383 if (offset % bank->sectors[i].size)
385 LOG_INFO("offset 0x%x breaks required alignment 0x%x", offset, bank->sectors[i].size);
386 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
389 if(((offset + count) > bank->sectors[i].offset) &&
390 ((offset + count) <= (bank->sectors[i].offset + bank->sectors[i].size)) &&
391 (last_sector == 0xffffffff))
398 if (first_sector == 0xffffffff || last_sector == 0xffffffff)
400 LOG_INFO("Range check failed %x %x", offset, count);
401 return ERROR_FLASH_DST_OUT_OF_BANK;
404 /* Configure the flash controller timing */
405 lpc288x_set_flash_clk(bank);
407 /* initialise the offsets */
411 for (sector=first_sector; sector<=last_sector; sector++)
413 for(page = 0; page < bank->sectors[sector].size / FLASH_PAGE_SIZE; page++)
415 if(bytes_remaining == 0)
418 memset(page_buffer, 0xFF, FLASH_PAGE_SIZE);
420 else if (bytes_remaining < FLASH_PAGE_SIZE)
422 count = bytes_remaining;
423 memset(page_buffer, 0xFF, FLASH_PAGE_SIZE);
424 memcpy(page_buffer, &buffer[source_offset], count);
428 count = FLASH_PAGE_SIZE;
429 memcpy(page_buffer, &buffer[source_offset], count);
432 /* Wait for flash to become ready */
433 if (lpc288x_wait_status_busy(bank, 1000) != ERROR_OK)
435 return ERROR_FLASH_OPERATION_FAILED;
438 /* fill flash data latches with 1's */
439 target_write_u32(target, F_CTRL,
445 target_write_u32(target, F_CTRL,
449 /*would be better to use the clean target_write_buffer() interface but
450 it seems not to be a LOT slower....
451 bulk_write_memory() is no quicker :(*/
453 if (target->type->write_memory(target, offset + dest_offset, 4, 128, page_buffer) != ERROR_OK)
455 LOG_ERROR("Write failed s %x p %x", sector, page);
456 return ERROR_FLASH_OPERATION_FAILED;
459 if(target_write_buffer(target, offset + dest_offset, FLASH_PAGE_SIZE, page_buffer) != ERROR_OK)
461 LOG_INFO("Write to flash buffer failed");
462 return ERROR_FLASH_OPERATION_FAILED;
465 dest_offset += FLASH_PAGE_SIZE;
466 source_offset += count;
467 bytes_remaining -= count;
469 lpc288x_load_timer(LOAD_TIMER_WRITE, target);
471 target_write_u32( target,
486 int lpc288x_probe(struct flash_bank_s *bank)
488 /* we only deal with LPC2888 so flash config is fixed
490 lpc288x_flash_bank_t *lpc288x_info = bank->driver_priv;
493 if (lpc288x_info->cidr != 0)
495 return ERROR_OK; /* already probed */
498 if (bank->target->state != TARGET_HALTED)
500 return ERROR_TARGET_NOT_HALTED;
503 retval = lpc288x_read_part_info(bank);
504 if (retval != ERROR_OK)
511 int lpc288x_info(struct flash_bank_s *bank, char *buf, int buf_size)
513 snprintf(buf, buf_size, "lpc288x flash driver");
517 int lpc288x_protect(struct flash_bank_s *bank, int set, int first, int last)
519 int lockregion, status;
521 target_t *target = bank->target;
523 /* probed? halted? */
524 status = lpc288x_system_ready(bank);
525 if(status != ERROR_OK)
530 if ((first < 0) || (last < first) || (last >= bank->num_sectors))
532 return ERROR_FLASH_SECTOR_INVALID;
535 /* Configure the flash controller timing */
536 lpc288x_set_flash_clk(bank);
538 for (lockregion = first; lockregion <= last; lockregion++)
542 /* write an odd value to base addy to protect... */
547 /* write an even value to base addy to unprotect... */
550 target_write_u32( target,
551 bank->sectors[lockregion].offset,
554 target_write_u32( target,