1 /***************************************************************************
2 * Copyright (C) 2007 by Dominic Rath <Dominic.Rath@gmx.de> *
3 * Copyright (C) 2002 Thomas Gleixner <tglx@linutronix.de> *
4 * Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net> *
6 * Partially based on drivers/mtd/nand_ids.c from Linux. *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
22 ***************************************************************************/
29 /* configured NAND devices and NAND Flash command handler */
30 struct nand_device *nand_devices = NULL;
32 void nand_device_add(struct nand_device *c)
35 struct nand_device *p = nand_devices;
36 while (p && p->next) p = p->next;
45 * Manufacturer, ID code, pagesize, chipsize in MegaByte, eraseblock size,
48 * Pagesize; 0, 256, 512
49 * 0 get this information from the extended chip ID
50 * 256 256 Byte page size
51 * 512 512 Byte page size
53 static struct nand_info nand_flash_ids[] =
55 /* Vendor Specific Entries */
56 { NAND_MFR_SAMSUNG, 0xD5, 8192, 2048, 0x100000, LP_OPTIONS, "K9GAG08 2GB NAND 3.3V x8 MLC 2b/cell"},
57 { NAND_MFR_SAMSUNG, 0xD7, 8192, 4096, 0x100000, LP_OPTIONS, "K9LBG08 4GB NAND 3.3V x8 MLC 2b/cell"},
59 /* start "museum" IDs */
60 { 0x0, 0x6e, 256, 1, 0x1000, 0, "NAND 1MiB 5V 8-bit"},
61 { 0x0, 0x64, 256, 2, 0x1000, 0, "NAND 2MiB 5V 8-bit"},
62 { 0x0, 0x6b, 512, 4, 0x2000, 0, "NAND 4MiB 5V 8-bit"},
63 { 0x0, 0xe8, 256, 1, 0x1000, 0, "NAND 1MiB 3.3V 8-bit"},
64 { 0x0, 0xec, 256, 1, 0x1000, 0, "NAND 1MiB 3.3V 8-bit"},
65 { 0x0, 0xea, 256, 2, 0x1000, 0, "NAND 2MiB 3.3V 8-bit"},
66 { 0x0, 0xd5, 512, 4, 0x2000, 0, "NAND 4MiB 3.3V 8-bit"},
67 { 0x0, 0xe3, 512, 4, 0x2000, 0, "NAND 4MiB 3.3V 8-bit"},
68 { 0x0, 0xe5, 512, 4, 0x2000, 0, "NAND 4MiB 3.3V 8-bit"},
69 { 0x0, 0xd6, 512, 8, 0x2000, 0, "NAND 8MiB 3.3V 8-bit"},
71 { 0x0, 0x39, 512, 8, 0x2000, 0, "NAND 8MiB 1.8V 8-bit"},
72 { 0x0, 0xe6, 512, 8, 0x2000, 0, "NAND 8MiB 3.3V 8-bit"},
73 { 0x0, 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16, "NAND 8MiB 1.8V 16-bit"},
74 { 0x0, 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16, "NAND 8MiB 3.3V 16-bit"},
75 /* end "museum" IDs */
77 { 0x0, 0x33, 512, 16, 0x4000, 0, "NAND 16MiB 1.8V 8-bit"},
78 { 0x0, 0x73, 512, 16, 0x4000, 0, "NAND 16MiB 3.3V 8-bit"},
79 { 0x0, 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16,"NAND 16MiB 1.8V 16-bit"},
80 { 0x0, 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16,"NAND 16MiB 3.3V 16-bit"},
82 { 0x0, 0x35, 512, 32, 0x4000, 0, "NAND 32MiB 1.8V 8-bit"},
83 { 0x0, 0x75, 512, 32, 0x4000, 0, "NAND 32MiB 3.3V 8-bit"},
84 { 0x0, 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16,"NAND 32MiB 1.8V 16-bit"},
85 { 0x0, 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16,"NAND 32MiB 3.3V 16-bit"},
87 { 0x0, 0x36, 512, 64, 0x4000, 0, "NAND 64MiB 1.8V 8-bit"},
88 { 0x0, 0x76, 512, 64, 0x4000, 0, "NAND 64MiB 3.3V 8-bit"},
89 { 0x0, 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16,"NAND 64MiB 1.8V 16-bit"},
90 { 0x0, 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16,"NAND 64MiB 3.3V 16-bit"},
92 { 0x0, 0x78, 512, 128, 0x4000, 0, "NAND 128MiB 1.8V 8-bit"},
93 { 0x0, 0x39, 512, 128, 0x4000, 0, "NAND 128MiB 1.8V 8-bit"},
94 { 0x0, 0x79, 512, 128, 0x4000, 0, "NAND 128MiB 3.3V 8-bit"},
95 { 0x0, 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16,"NAND 128MiB 1.8V 16-bit"},
96 { 0x0, 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16,"NAND 128MiB 1.8V 16-bit"},
97 { 0x0, 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16,"NAND 128MiB 3.3V 16-bit"},
98 { 0x0, 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16,"NAND 128MiB 3.3V 16-bit"},
100 { 0x0, 0x71, 512, 256, 0x4000, 0, "NAND 256MiB 3.3V 8-bit"},
102 { 0x0, 0xA2, 0, 64, 0, LP_OPTIONS, "NAND 64MiB 1.8V 8-bit"},
103 { 0x0, 0xF2, 0, 64, 0, LP_OPTIONS, "NAND 64MiB 3.3V 8-bit"},
104 { 0x0, 0xB2, 0, 64, 0, LP_OPTIONS16, "NAND 64MiB 1.8V 16-bit"},
105 { 0x0, 0xC2, 0, 64, 0, LP_OPTIONS16, "NAND 64MiB 3.3V 16-bit"},
107 { 0x0, 0xA1, 0, 128, 0, LP_OPTIONS, "NAND 128MiB 1.8V 8-bit"},
108 { 0x0, 0xF1, 0, 128, 0, LP_OPTIONS, "NAND 128MiB 3.3V 8-bit"},
109 { 0x0, 0xB1, 0, 128, 0, LP_OPTIONS16, "NAND 128MiB 1.8V 16-bit"},
110 { 0x0, 0xC1, 0, 128, 0, LP_OPTIONS16, "NAND 128MiB 3.3V 16-bit"},
112 { 0x0, 0xAA, 0, 256, 0, LP_OPTIONS, "NAND 256MiB 1.8V 8-bit"},
113 { 0x0, 0xDA, 0, 256, 0, LP_OPTIONS, "NAND 256MiB 3.3V 8-bit"},
114 { 0x0, 0xBA, 0, 256, 0, LP_OPTIONS16, "NAND 256MiB 1.8V 16-bit"},
115 { 0x0, 0xCA, 0, 256, 0, LP_OPTIONS16, "NAND 256MiB 3.3V 16-bit"},
117 { 0x0, 0xAC, 0, 512, 0, LP_OPTIONS, "NAND 512MiB 1.8V 8-bit"},
118 { 0x0, 0xDC, 0, 512, 0, LP_OPTIONS, "NAND 512MiB 3.3V 8-bit"},
119 { 0x0, 0xBC, 0, 512, 0, LP_OPTIONS16, "NAND 512MiB 1.8V 16-bit"},
120 { 0x0, 0xCC, 0, 512, 0, LP_OPTIONS16, "NAND 512MiB 3.3V 16-bit"},
122 { 0x0, 0xA3, 0, 1024, 0, LP_OPTIONS, "NAND 1GiB 1.8V 8-bit"},
123 { 0x0, 0xD3, 0, 1024, 0, LP_OPTIONS, "NAND 1GiB 3.3V 8-bit"},
124 { 0x0, 0xB3, 0, 1024, 0, LP_OPTIONS16, "NAND 1GiB 1.8V 16-bit"},
125 { 0x0, 0xC3, 0, 1024, 0, LP_OPTIONS16, "NAND 1GiB 3.3V 16-bit"},
127 { 0x0, 0xA5, 0, 2048, 0, LP_OPTIONS, "NAND 2GiB 1.8V 8-bit"},
128 { 0x0, 0xD5, 0, 8192, 0, LP_OPTIONS, "NAND 2GiB 3.3V 8-bit"},
129 { 0x0, 0xB5, 0, 2048, 0, LP_OPTIONS16, "NAND 2GiB 1.8V 16-bit"},
130 { 0x0, 0xC5, 0, 2048, 0, LP_OPTIONS16, "NAND 2GiB 3.3V 16-bit"},
132 { 0x0, 0x48, 0, 2048, 0, LP_OPTIONS, "NAND 2GiB 3.3V 8-bit"},
134 {0, 0, 0, 0, 0, 0, NULL}
137 /* Manufacturer ID list
139 static struct nand_manufacturer nand_manuf_ids[] =
142 {NAND_MFR_TOSHIBA, "Toshiba"},
143 {NAND_MFR_SAMSUNG, "Samsung"},
144 {NAND_MFR_FUJITSU, "Fujitsu"},
145 {NAND_MFR_NATIONAL, "National"},
146 {NAND_MFR_RENESAS, "Renesas"},
147 {NAND_MFR_STMICRO, "ST Micro"},
148 {NAND_MFR_HYNIX, "Hynix"},
149 {NAND_MFR_MICRON, "Micron"},
154 * Define default oob placement schemes for large and small page devices
158 static struct nand_ecclayout nand_oob_8 = {
170 * Returns the flash bank specified by @a name, which matches the
171 * driver name and a suffix (option) specify the driver-specific
172 * bank number. The suffix consists of the '.' and the driver-specific
173 * bank number: when two davinci banks are defined, then 'davinci.1' refers
174 * to the second (e.g. DM355EVM).
176 static struct nand_device *get_nand_device_by_name(const char *name)
178 unsigned requested = get_flash_name_index(name);
181 struct nand_device *nand;
182 for (nand = nand_devices; NULL != nand; nand = nand->next)
184 if (strcmp(nand->name, name) == 0)
186 if (!flash_driver_name_matches(nand->controller->name, name))
188 if (++found < requested)
195 struct nand_device *get_nand_device_by_num(int num)
197 struct nand_device *p;
200 for (p = nand_devices; p; p = p->next)
211 COMMAND_HELPER(nand_command_get_device, unsigned name_index,
212 struct nand_device **nand)
214 const char *str = CMD_ARGV[name_index];
215 *nand = get_nand_device_by_name(str);
220 COMMAND_PARSE_NUMBER(uint, str, num);
221 *nand = get_nand_device_by_num(num);
223 command_print(CMD_CTX, "NAND flash device '%s' not found", str);
224 return ERROR_INVALID_ARGUMENTS;
229 int nand_build_bbt(struct nand_device *nand, int first, int last)
233 int pages_per_block = (nand->erase_size / nand->page_size);
237 if ((first < 0) || (first >= nand->num_blocks))
240 if ((last >= nand->num_blocks) || (last == -1))
241 last = nand->num_blocks - 1;
243 page = first * pages_per_block;
244 for (i = first; i <= last; i++)
246 ret = nand_read_page(nand, page, NULL, 0, oob, 6);
250 if (((nand->device->options & NAND_BUSWIDTH_16) && ((oob[0] & oob[1]) != 0xff))
251 || (((nand->page_size == 512) && (oob[5] != 0xff)) ||
252 ((nand->page_size == 2048) && (oob[0] != 0xff))))
254 LOG_WARNING("bad block: %i", i);
255 nand->blocks[i].is_bad = 1;
259 nand->blocks[i].is_bad = 0;
262 page += pages_per_block;
268 int nand_read_status(struct nand_device *nand, uint8_t *status)
271 return ERROR_NAND_DEVICE_NOT_PROBED;
273 /* Send read status command */
274 nand->controller->command(nand, NAND_CMD_STATUS);
279 if (nand->device->options & NAND_BUSWIDTH_16)
282 nand->controller->read_data(nand, &data);
283 *status = data & 0xff;
287 nand->controller->read_data(nand, status);
293 static int nand_poll_ready(struct nand_device *nand, int timeout)
297 nand->controller->command(nand, NAND_CMD_STATUS);
299 if (nand->device->options & NAND_BUSWIDTH_16) {
301 nand->controller->read_data(nand, &data);
302 status = data & 0xff;
304 nand->controller->read_data(nand, &status);
306 if (status & NAND_STATUS_READY)
311 return (status & NAND_STATUS_READY) != 0;
314 int nand_probe(struct nand_device *nand)
316 uint8_t manufacturer_id, device_id;
321 /* clear device data */
323 nand->manufacturer = NULL;
325 /* clear device parameters */
327 nand->address_cycles = 0;
329 nand->erase_size = 0;
331 /* initialize controller (device parameters are zero, use controller default) */
332 if ((retval = nand->controller->init(nand) != ERROR_OK))
336 case ERROR_NAND_OPERATION_FAILED:
337 LOG_DEBUG("controller initialization failed");
338 return ERROR_NAND_OPERATION_FAILED;
339 case ERROR_NAND_OPERATION_NOT_SUPPORTED:
340 LOG_ERROR("BUG: controller reported that it doesn't support default parameters");
341 return ERROR_NAND_OPERATION_FAILED;
343 LOG_ERROR("BUG: unknown controller initialization failure");
344 return ERROR_NAND_OPERATION_FAILED;
348 nand->controller->command(nand, NAND_CMD_RESET);
349 nand->controller->reset(nand);
351 nand->controller->command(nand, NAND_CMD_READID);
352 nand->controller->address(nand, 0x0);
354 if (nand->bus_width == 8)
356 nand->controller->read_data(nand, &manufacturer_id);
357 nand->controller->read_data(nand, &device_id);
362 nand->controller->read_data(nand, &data_buf);
363 manufacturer_id = data_buf & 0xff;
364 nand->controller->read_data(nand, &data_buf);
365 device_id = data_buf & 0xff;
368 for (i = 0; nand_flash_ids[i].name; i++)
370 if (nand_flash_ids[i].id == device_id &&
371 (nand_flash_ids[i].mfr_id == manufacturer_id ||
372 nand_flash_ids[i].mfr_id == 0 ))
374 nand->device = &nand_flash_ids[i];
379 for (i = 0; nand_manuf_ids[i].name; i++)
381 if (nand_manuf_ids[i].id == manufacturer_id)
383 nand->manufacturer = &nand_manuf_ids[i];
388 if (!nand->manufacturer)
390 nand->manufacturer = &nand_manuf_ids[0];
391 nand->manufacturer->id = manufacturer_id;
396 LOG_ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
397 manufacturer_id, device_id);
398 return ERROR_NAND_OPERATION_FAILED;
401 LOG_DEBUG("found %s (%s)", nand->device->name, nand->manufacturer->name);
403 /* initialize device parameters */
406 if (nand->device->options & NAND_BUSWIDTH_16)
407 nand->bus_width = 16;
411 /* Do we need extended device probe information? */
412 if (nand->device->page_size == 0 ||
413 nand->device->erase_size == 0)
415 if (nand->bus_width == 8)
417 nand->controller->read_data(nand, id_buff + 3);
418 nand->controller->read_data(nand, id_buff + 4);
419 nand->controller->read_data(nand, id_buff + 5);
425 nand->controller->read_data(nand, &data_buf);
426 id_buff[3] = data_buf;
428 nand->controller->read_data(nand, &data_buf);
429 id_buff[4] = data_buf;
431 nand->controller->read_data(nand, &data_buf);
432 id_buff[5] = data_buf >> 8;
437 if (nand->device->page_size == 0)
439 nand->page_size = 1 << (10 + (id_buff[4] & 3));
441 else if (nand->device->page_size == 256)
443 LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
444 return ERROR_NAND_OPERATION_FAILED;
448 nand->page_size = nand->device->page_size;
451 /* number of address cycles */
452 if (nand->page_size <= 512)
454 /* small page devices */
455 if (nand->device->chip_size <= 32)
456 nand->address_cycles = 3;
457 else if (nand->device->chip_size <= 8*1024)
458 nand->address_cycles = 4;
461 LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
462 nand->address_cycles = 5;
467 /* large page devices */
468 if (nand->device->chip_size <= 128)
469 nand->address_cycles = 4;
470 else if (nand->device->chip_size <= 32*1024)
471 nand->address_cycles = 5;
474 LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
475 nand->address_cycles = 6;
480 if (nand->device->erase_size == 0)
482 switch ((id_buff[4] >> 4) & 3) {
484 nand->erase_size = 64 << 10;
487 nand->erase_size = 128 << 10;
490 nand->erase_size = 256 << 10;
493 nand->erase_size =512 << 10;
499 nand->erase_size = nand->device->erase_size;
502 /* initialize controller, but leave parameters at the controllers default */
503 if ((retval = nand->controller->init(nand) != ERROR_OK))
507 case ERROR_NAND_OPERATION_FAILED:
508 LOG_DEBUG("controller initialization failed");
509 return ERROR_NAND_OPERATION_FAILED;
510 case ERROR_NAND_OPERATION_NOT_SUPPORTED:
511 LOG_ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
512 nand->bus_width, nand->address_cycles, nand->page_size);
513 return ERROR_NAND_OPERATION_FAILED;
515 LOG_ERROR("BUG: unknown controller initialization failure");
516 return ERROR_NAND_OPERATION_FAILED;
520 nand->num_blocks = (nand->device->chip_size * 1024) / (nand->erase_size / 1024);
521 nand->blocks = malloc(sizeof(struct nand_block) * nand->num_blocks);
523 for (i = 0; i < nand->num_blocks; i++)
525 nand->blocks[i].size = nand->erase_size;
526 nand->blocks[i].offset = i * nand->erase_size;
527 nand->blocks[i].is_erased = -1;
528 nand->blocks[i].is_bad = -1;
534 int nand_erase(struct nand_device *nand, int first_block, int last_block)
542 return ERROR_NAND_DEVICE_NOT_PROBED;
544 if ((first_block < 0) || (last_block >= nand->num_blocks))
545 return ERROR_INVALID_ARGUMENTS;
547 /* make sure we know if a block is bad before erasing it */
548 for (i = first_block; i <= last_block; i++)
550 if (nand->blocks[i].is_bad == -1)
552 nand_build_bbt(nand, i, last_block);
557 for (i = first_block; i <= last_block; i++)
559 /* Send erase setup command */
560 nand->controller->command(nand, NAND_CMD_ERASE1);
562 page = i * (nand->erase_size / nand->page_size);
564 /* Send page address */
565 if (nand->page_size <= 512)
568 nand->controller->address(nand, page & 0xff);
569 nand->controller->address(nand, (page >> 8) & 0xff);
571 /* 3rd cycle only on devices with more than 32 MiB */
572 if (nand->address_cycles >= 4)
573 nand->controller->address(nand, (page >> 16) & 0xff);
575 /* 4th cycle only on devices with more than 8 GiB */
576 if (nand->address_cycles >= 5)
577 nand->controller->address(nand, (page >> 24) & 0xff);
582 nand->controller->address(nand, page & 0xff);
583 nand->controller->address(nand, (page >> 8) & 0xff);
585 /* 3rd cycle only on devices with more than 128 MiB */
586 if (nand->address_cycles >= 5)
587 nand->controller->address(nand, (page >> 16) & 0xff);
590 /* Send erase confirm command */
591 nand->controller->command(nand, NAND_CMD_ERASE2);
593 retval = nand->controller->nand_ready ?
594 nand->controller->nand_ready(nand, 1000) :
595 nand_poll_ready(nand, 1000);
597 LOG_ERROR("timeout waiting for NAND flash block erase to complete");
598 return ERROR_NAND_OPERATION_TIMEOUT;
601 if ((retval = nand_read_status(nand, &status)) != ERROR_OK)
603 LOG_ERROR("couldn't read status");
604 return ERROR_NAND_OPERATION_FAILED;
609 LOG_ERROR("didn't erase %sblock %d; status: 0x%2.2x",
610 (nand->blocks[i].is_bad == 1)
613 /* continue; other blocks might still be erasable */
616 nand->blocks[i].is_erased = 1;
623 static int nand_read_plain(struct nand_device *nand, uint32_t address, uint8_t *data, uint32_t data_size)
628 return ERROR_NAND_DEVICE_NOT_PROBED;
630 if (address % nand->page_size)
632 LOG_ERROR("reads need to be page aligned");
633 return ERROR_NAND_OPERATION_FAILED;
636 page = malloc(nand->page_size);
638 while (data_size > 0)
640 uint32_t thisrun_size = (data_size > nand->page_size) ? nand->page_size : data_size;
641 uint32_t page_address;
644 page_address = address / nand->page_size;
646 nand_read_page(nand, page_address, page, nand->page_size, NULL, 0);
648 memcpy(data, page, thisrun_size);
650 address += thisrun_size;
651 data += thisrun_size;
652 data_size -= thisrun_size;
660 static int nand_write_plain(struct nand_device *nand, uint32_t address, uint8_t *data, uint32_t data_size)
665 return ERROR_NAND_DEVICE_NOT_PROBED;
667 if (address % nand->page_size)
669 LOG_ERROR("writes need to be page aligned");
670 return ERROR_NAND_OPERATION_FAILED;
673 page = malloc(nand->page_size);
675 while (data_size > 0)
677 uint32_t thisrun_size = (data_size > nand->page_size) ? nand->page_size : data_size;
678 uint32_t page_address;
680 memset(page, 0xff, nand->page_size);
681 memcpy(page, data, thisrun_size);
683 page_address = address / nand->page_size;
685 nand_write_page(nand, page_address, page, nand->page_size, NULL, 0);
687 address += thisrun_size;
688 data += thisrun_size;
689 data_size -= thisrun_size;
698 int nand_write_page(struct nand_device *nand, uint32_t page,
699 uint8_t *data, uint32_t data_size,
700 uint8_t *oob, uint32_t oob_size)
705 return ERROR_NAND_DEVICE_NOT_PROBED;
707 block = page / (nand->erase_size / nand->page_size);
708 if (nand->blocks[block].is_erased == 1)
709 nand->blocks[block].is_erased = 0;
711 if (nand->use_raw || nand->controller->write_page == NULL)
712 return nand_write_page_raw(nand, page, data, data_size, oob, oob_size);
714 return nand->controller->write_page(nand, page, data, data_size, oob, oob_size);
717 int nand_read_page(struct nand_device *nand, uint32_t page,
718 uint8_t *data, uint32_t data_size,
719 uint8_t *oob, uint32_t oob_size)
722 return ERROR_NAND_DEVICE_NOT_PROBED;
724 if (nand->use_raw || nand->controller->read_page == NULL)
725 return nand_read_page_raw(nand, page, data, data_size, oob, oob_size);
727 return nand->controller->read_page(nand, page, data, data_size, oob, oob_size);
730 int nand_page_command(struct nand_device *nand, uint32_t page,
731 uint8_t cmd, bool oob_only)
734 return ERROR_NAND_DEVICE_NOT_PROBED;
736 if (oob_only && NAND_CMD_READ0 == cmd && nand->page_size <= 512)
737 cmd = NAND_CMD_READOOB;
739 nand->controller->command(nand, cmd);
741 if (nand->page_size <= 512) {
742 /* small page device */
744 /* column (always 0, we start at the beginning of a page/OOB area) */
745 nand->controller->address(nand, 0x0);
748 nand->controller->address(nand, page & 0xff);
749 nand->controller->address(nand, (page >> 8) & 0xff);
751 /* 4th cycle only on devices with more than 32 MiB */
752 if (nand->address_cycles >= 4)
753 nand->controller->address(nand, (page >> 16) & 0xff);
755 /* 5th cycle only on devices with more than 8 GiB */
756 if (nand->address_cycles >= 5)
757 nand->controller->address(nand, (page >> 24) & 0xff);
759 /* large page device */
761 /* column (0 when we start at the beginning of a page,
762 * or 2048 for the beginning of OOB area)
764 nand->controller->address(nand, 0x0);
766 nand->controller->address(nand, 0x8);
768 nand->controller->address(nand, 0x0);
771 nand->controller->address(nand, page & 0xff);
772 nand->controller->address(nand, (page >> 8) & 0xff);
774 /* 5th cycle only on devices with more than 128 MiB */
775 if (nand->address_cycles >= 5)
776 nand->controller->address(nand, (page >> 16) & 0xff);
778 /* large page devices need a start command if reading */
779 if (NAND_CMD_READ0 == cmd)
780 nand->controller->command(nand, NAND_CMD_READSTART);
783 if (nand->controller->nand_ready) {
784 if (!nand->controller->nand_ready(nand, 100))
785 return ERROR_NAND_OPERATION_TIMEOUT;
787 /* nand_poll_read() cannot be used during nand read */
794 int nand_read_data_page(struct nand_device *nand, uint8_t *data, uint32_t size)
796 int retval = ERROR_NAND_NO_BUFFER;
798 if (nand->controller->read_block_data != NULL)
799 retval = (nand->controller->read_block_data)(nand, data, size);
801 if (ERROR_NAND_NO_BUFFER == retval) {
803 int incr = (nand->device->options & NAND_BUSWIDTH_16) ? 2 : 1;
806 for (i = 0; retval == ERROR_OK && i < size; i += incr) {
807 retval = nand->controller->read_data(nand, data);
815 int nand_read_page_raw(struct nand_device *nand, uint32_t page,
816 uint8_t *data, uint32_t data_size,
817 uint8_t *oob, uint32_t oob_size)
821 retval = nand_page_command(nand, page, NAND_CMD_READ0, !data);
822 if (ERROR_OK != retval)
826 nand_read_data_page(nand, data, data_size);
829 nand_read_data_page(nand, oob, oob_size);
834 int nand_write_data_page(struct nand_device *nand, uint8_t *data, uint32_t size)
836 int retval = ERROR_NAND_NO_BUFFER;
838 if (nand->controller->write_block_data != NULL)
839 retval = (nand->controller->write_block_data)(nand, data, size);
841 if (ERROR_NAND_NO_BUFFER == retval) {
842 bool is16bit = nand->device->options & NAND_BUSWIDTH_16;
843 uint32_t incr = is16bit ? 2 : 1;
847 for (i = 0; i < size; i += incr) {
849 write_data = le_to_h_u16(data);
853 retval = nand->controller->write_data(nand, write_data);
854 if (ERROR_OK != retval)
864 int nand_write_finish(struct nand_device *nand)
869 nand->controller->command(nand, NAND_CMD_PAGEPROG);
871 retval = nand->controller->nand_ready ?
872 nand->controller->nand_ready(nand, 100) :
873 nand_poll_ready(nand, 100);
875 return ERROR_NAND_OPERATION_TIMEOUT;
877 retval = nand_read_status(nand, &status);
878 if (ERROR_OK != retval) {
879 LOG_ERROR("couldn't read status");
880 return ERROR_NAND_OPERATION_FAILED;
883 if (status & NAND_STATUS_FAIL) {
884 LOG_ERROR("write operation didn't pass, status: 0x%2.2x",
886 return ERROR_NAND_OPERATION_FAILED;
892 int nand_write_page_raw(struct nand_device *nand, uint32_t page,
893 uint8_t *data, uint32_t data_size,
894 uint8_t *oob, uint32_t oob_size)
898 retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data);
899 if (ERROR_OK != retval)
903 retval = nand_write_data_page(nand, data, data_size);
904 if (ERROR_OK != retval) {
905 LOG_ERROR("Unable to write data to NAND device");
911 retval = nand_write_data_page(nand, oob, oob_size);
912 if (ERROR_OK != retval) {
913 LOG_ERROR("Unable to write OOB data to NAND device");
918 return nand_write_finish(nand);