git.sur5r.net Git - openocd/blob - src/flash/nand.c

   1 /***************************************************************************
   2  *   Copyright (C) 2007 by Dominic Rath                                    *
   3  *   Dominic.Rath@gmx.de                                                   *
   4  *                                                                         *
   5  *   partially based on                                                    *
   6  *       drivers/mtd/nand_ids.c                                                *
   7  *                                                                         *
   8  *   Copyright (C) 2002 Thomas Gleixner (tglx@linutronix.de)               *
   9  *                                                                         *
  10  *   This program is free software; you can redistribute it and/or modify  *
  11  *   it under the terms of the GNU General Public License as published by  *
  12  *   the Free Software Foundation; either version 2 of the License, or     *
  13  *   (at your option) any later version.                                   *
  14  *                                                                         *
  15  *   This program is distributed in the hope that it will be useful,       *
  16  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  17  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  18  *   GNU General Public License for more details.                          *
  19  *                                                                         *
  20  *   You should have received a copy of the GNU General Public License     *
  21  *   along with this program; if not, write to the                         *
  22  *   Free Software Foundation, Inc.,                                       *
  23  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  24  ***************************************************************************/
  25 #ifdef HAVE_CONFIG_H
  26 #include "config.h"
  27 #endif
  28
  29 #include "replacements.h"
  30 #include "log.h"
  31
  32 #include <stdlib.h>
  33 #include <string.h>
  34
  35 #include <errno.h>
  36
  37 #include "nand.h"
  38 #include "flash.h"
  39 #include "time_support.h"
  40 #include "fileio.h"
  41
  42 int nand_register_commands(struct command_context_s *cmd_ctx);
  43 int handle_nand_list_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  44 int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  45 int handle_nand_check_bad_blocks_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  46 int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  47 int handle_nand_copy_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  48 int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  49 int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  50 int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  51
  52 int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  53
  54 int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
  55 int nand_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
  56 int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size);
  57
  58 int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
  59 int nand_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
  60
  61 /* NAND flash controller
  62  */
  63 extern nand_flash_controller_t lpc3180_nand_controller;
  64 /* extern nand_flash_controller_t s3c2410_nand_controller; */
  65 /* extern nand_flash_controller_t boundary_scan_nand_controller; */
  66
  67 nand_flash_controller_t *nand_flash_controllers[] =
  68 {
  69         &lpc3180_nand_controller,
  70 /*      &s3c2410_nand_controller, */
  71 /*      &boundary_scan_nand_controller, */
  72         NULL
  73 };
  74
  75 /* configured NAND devices and NAND Flash command handler */
  76 nand_device_t *nand_devices = NULL;
  77 static command_t *nand_cmd;
  78
  79 /*      Chip ID list
  80  *
  81  *      Name, ID code, pagesize, chipsize in MegaByte, eraseblock size,
  82  *      options
  83  *
  84  *      Pagesize; 0, 256, 512
  85  *      0       get this information from the extended chip ID
  86  *      256     256 Byte page size
  87  *      512     512 Byte page size
  88  */
  89 nand_info_t nand_flash_ids[] =
  90 {
  91         {"NAND 1MiB 5V 8-bit",          0x6e, 256, 1, 0x1000, 0},
  92         {"NAND 2MiB 5V 8-bit",          0x64, 256, 2, 0x1000, 0},
  93         {"NAND 4MiB 5V 8-bit",          0x6b, 512, 4, 0x2000, 0},
  94         {"NAND 1MiB 3,3V 8-bit",        0xe8, 256, 1, 0x1000, 0},
  95         {"NAND 1MiB 3,3V 8-bit",        0xec, 256, 1, 0x1000, 0},
  96         {"NAND 2MiB 3,3V 8-bit",        0xea, 256, 2, 0x1000, 0},
  97         {"NAND 4MiB 3,3V 8-bit",        0xd5, 512, 4, 0x2000, 0},
  98         {"NAND 4MiB 3,3V 8-bit",        0xe3, 512, 4, 0x2000, 0},
  99         {"NAND 4MiB 3,3V 8-bit",        0xe5, 512, 4, 0x2000, 0},
 100         {"NAND 8MiB 3,3V 8-bit",        0xd6, 512, 8, 0x2000, 0},
 101
 102         {"NAND 8MiB 1,8V 8-bit",        0x39, 512, 8, 0x2000, 0},
 103         {"NAND 8MiB 3,3V 8-bit",        0xe6, 512, 8, 0x2000, 0},
 104         {"NAND 8MiB 1,8V 16-bit",       0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16},
 105         {"NAND 8MiB 3,3V 16-bit",       0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16},
 106
 107         {"NAND 16MiB 1,8V 8-bit",       0x33, 512, 16, 0x4000, 0},
 108         {"NAND 16MiB 3,3V 8-bit",       0x73, 512, 16, 0x4000, 0},
 109         {"NAND 16MiB 1,8V 16-bit",      0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16},
 110         {"NAND 16MiB 3,3V 16-bit",      0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16},
 111
 112         {"NAND 32MiB 1,8V 8-bit",       0x35, 512, 32, 0x4000, 0},
 113         {"NAND 32MiB 3,3V 8-bit",       0x75, 512, 32, 0x4000, 0},
 114         {"NAND 32MiB 1,8V 16-bit",      0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16},
 115         {"NAND 32MiB 3,3V 16-bit",      0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16},
 116
 117         {"NAND 64MiB 1,8V 8-bit",       0x36, 512, 64, 0x4000, 0},
 118         {"NAND 64MiB 3,3V 8-bit",       0x76, 512, 64, 0x4000, 0},
 119         {"NAND 64MiB 1,8V 16-bit",      0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16},
 120         {"NAND 64MiB 3,3V 16-bit",      0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16},
 121
 122         {"NAND 128MiB 1,8V 8-bit",      0x78, 512, 128, 0x4000, 0},
 123         {"NAND 128MiB 1,8V 8-bit",      0x39, 512, 128, 0x4000, 0},
 124         {"NAND 128MiB 3,3V 8-bit",      0x79, 512, 128, 0x4000, 0},
 125         {"NAND 128MiB 1,8V 16-bit",     0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 126         {"NAND 128MiB 1,8V 16-bit",     0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 127         {"NAND 128MiB 3,3V 16-bit",     0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 128         {"NAND 128MiB 3,3V 16-bit",     0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 129
 130         {"NAND 256MiB 3,3V 8-bit",      0x71, 512, 256, 0x4000, 0},
 131
 132         {"NAND 64MiB 1,8V 8-bit",       0xA2, 0,  64, 0, LP_OPTIONS},
 133         {"NAND 64MiB 3,3V 8-bit",       0xF2, 0,  64, 0, LP_OPTIONS},
 134         {"NAND 64MiB 1,8V 16-bit",      0xB2, 0,  64, 0, LP_OPTIONS16},
 135         {"NAND 64MiB 3,3V 16-bit",      0xC2, 0,  64, 0, LP_OPTIONS16},
 136
 137         {"NAND 128MiB 1,8V 8-bit",      0xA1, 0, 128, 0, LP_OPTIONS},
 138         {"NAND 128MiB 3,3V 8-bit",      0xF1, 0, 128, 0, LP_OPTIONS},
 139         {"NAND 128MiB 1,8V 16-bit",     0xB1, 0, 128, 0, LP_OPTIONS16},
 140         {"NAND 128MiB 3,3V 16-bit",     0xC1, 0, 128, 0, LP_OPTIONS16},
 141
 142         {"NAND 256MiB 1,8V 8-bit",      0xAA, 0, 256, 0, LP_OPTIONS},
 143         {"NAND 256MiB 3,3V 8-bit",      0xDA, 0, 256, 0, LP_OPTIONS},
 144         {"NAND 256MiB 1,8V 16-bit",     0xBA, 0, 256, 0, LP_OPTIONS16},
 145         {"NAND 256MiB 3,3V 16-bit",     0xCA, 0, 256, 0, LP_OPTIONS16},
 146
 147         {"NAND 512MiB 1,8V 8-bit",      0xAC, 0, 512, 0, LP_OPTIONS},
 148         {"NAND 512MiB 3,3V 8-bit",      0xDC, 0, 512, 0, LP_OPTIONS},
 149         {"NAND 512MiB 1,8V 16-bit",     0xBC, 0, 512, 0, LP_OPTIONS16},
 150         {"NAND 512MiB 3,3V 16-bit",     0xCC, 0, 512, 0, LP_OPTIONS16},
 151
 152         {"NAND 1GiB 1,8V 8-bit",        0xA3, 0, 1024, 0, LP_OPTIONS},
 153         {"NAND 1GiB 3,3V 8-bit",        0xD3, 0, 1024, 0, LP_OPTIONS},
 154         {"NAND 1GiB 1,8V 16-bit",       0xB3, 0, 1024, 0, LP_OPTIONS16},
 155         {"NAND 1GiB 3,3V 16-bit",       0xC3, 0, 1024, 0, LP_OPTIONS16},
 156
 157         {"NAND 2GiB 1,8V 8-bit",        0xA5, 0, 2048, 0, LP_OPTIONS},
 158         {"NAND 2GiB 3,3V 8-bit",        0xD5, 0, 2048, 0, LP_OPTIONS},
 159         {"NAND 2GiB 1,8V 16-bit",       0xB5, 0, 2048, 0, LP_OPTIONS16},
 160         {"NAND 2GiB 3,3V 16-bit",       0xC5, 0, 2048, 0, LP_OPTIONS16},
 161
 162         {NULL, 0,}
 163 };
 164
 165 /* Manufacturer ID list
 166  */
 167 nand_manufacturer_t nand_manuf_ids[] =
 168 {
 169         {0x0, "unknown"},
 170         {NAND_MFR_TOSHIBA, "Toshiba"},
 171         {NAND_MFR_SAMSUNG, "Samsung"},
 172         {NAND_MFR_FUJITSU, "Fujitsu"},
 173         {NAND_MFR_NATIONAL, "National"},
 174         {NAND_MFR_RENESAS, "Renesas"},
 175         {NAND_MFR_STMICRO, "ST Micro"},
 176         {NAND_MFR_HYNIX, "Hynix"},
 177         {0x0, NULL},
 178 };
 179
 180 /* nand device <nand_controller> [controller options]
 181  */
 182 int handle_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
 183 {
 184         int i;
 185         int retval;
 186
 187         if (argc < 1)
 188         {
 189                 WARNING("incomplete flash device nand configuration");
 190                 return ERROR_FLASH_BANK_INVALID;
 191         }
 192
 193         for (i = 0; nand_flash_controllers[i]; i++)
 194         {
 195                 nand_device_t *p, *c;
 196
 197                 if (strcmp(args[0], nand_flash_controllers[i]->name) == 0)
 198                 {
 199                         /* register flash specific commands */
 200                         if (nand_flash_controllers[i]->register_commands(cmd_ctx) != ERROR_OK)
 201                         {
 202                                 ERROR("couldn't register '%s' commands", args[0]);
 203                                 exit(-1);
 204                         }
 205
 206                         c = malloc(sizeof(nand_device_t));
 207
 208                         c->controller = nand_flash_controllers[i];
 209                         c->controller_priv = NULL;
 210                         c->manufacturer = NULL;
 211                         c->device = NULL;
 212                         c->bus_width = 0;
 213                         c->address_cycles = 0;
 214                         c->page_size = 0;
 215                         c->use_raw = 0;
 216                         c->next = NULL;
 217
 218                         if ((retval = nand_flash_controllers[i]->nand_device_command(cmd_ctx, cmd, args, argc, c)) != ERROR_OK)
 219                         {
 220                                 ERROR("'%s' driver rejected nand flash", c->controller->name);
 221                                 free(c);
 222                                 return ERROR_OK;
 223                         }
 224
 225                         /* put NAND device in linked list */
 226                         if (nand_devices)
 227                         {
 228                                 /* find last flash device */
 229                                 for (p = nand_devices; p && p->next; p = p->next);
 230                                 if (p)
 231                                         p->next = c;
 232                         }
 233                         else
 234                         {
 235                                 nand_devices = c;
 236                         }
 237
 238                         return ERROR_OK;
 239                 }
 240         }
 241
 242         /* no valid NAND controller was found (i.e. the configuration option,
 243          * didn't match one of the compiled-in controllers)
 244          */
 245         ERROR("No valid NAND flash controller found (%s)", args[0]);
 246         ERROR("compiled-in NAND flash controllers:");
 247         for (i = 0; nand_flash_controllers[i]; i++)
 248         {
 249                 ERROR("%i: %s", i, nand_flash_controllers[i]->name);
 250         }
 251
 252         return ERROR_OK;
 253 }
 254
 255 int nand_register_commands(struct command_context_s *cmd_ctx)
 256 {
 257         nand_cmd = register_command(cmd_ctx, NULL, "nand", NULL, COMMAND_ANY, NULL);
 258
 259         register_command(cmd_ctx, nand_cmd, "device", handle_nand_device_command, COMMAND_CONFIG, NULL);
 260
 261         return ERROR_OK;
 262 }
 263
 264 int nand_init(struct command_context_s *cmd_ctx)
 265 {
 266         if (nand_devices)
 267         {
 268                 register_command(cmd_ctx, nand_cmd, "list", handle_nand_list_command, COMMAND_EXEC,
 269                                                  "list configured NAND flash devices");
 270                 register_command(cmd_ctx, nand_cmd, "info", handle_nand_info_command, COMMAND_EXEC,
 271                                                  "print info about NAND flash device <num>");
 272                 register_command(cmd_ctx, nand_cmd, "probe", handle_nand_probe_command, COMMAND_EXEC,
 273                                                  "identify NAND flash device <num>");
 274                 register_command(cmd_ctx, nand_cmd, "check_bad_blocks", handle_nand_check_bad_blocks_command, COMMAND_EXEC,
 275                                                  "check NAND flash device <num> for bad blocks [<first> <last>]");
 276                 register_command(cmd_ctx, nand_cmd, "erase", handle_nand_erase_command, COMMAND_EXEC,
 277                                                  "erase blocks on NAND flash device <num> <first> <last>");
 278                 register_command(cmd_ctx, nand_cmd, "copy", handle_nand_copy_command, COMMAND_EXEC,
 279                                                  "copy from NAND flash device <num> <offset> <length> <ram-address>");
 280                 register_command(cmd_ctx, nand_cmd, "dump", handle_nand_dump_command, COMMAND_EXEC,
 281                                                  "dump from NAND flash device <num> <filename> <offset> <size> [options]");
 282                 register_command(cmd_ctx, nand_cmd, "write", handle_nand_write_command, COMMAND_EXEC,
 283                                                  "write to NAND flash device <num> <filename> <offset> [options]");
 284                 register_command(cmd_ctx, nand_cmd, "raw_access", handle_nand_raw_access_command, COMMAND_EXEC,
 285                                                  "raw access to NAND flash device <num> ['enable'|'disable']");
 286         }
 287
 288         return ERROR_OK;
 289 }
 290
 291 nand_device_t *get_nand_device_by_num(int num)
 292 {
 293         nand_device_t *p;
 294         int i = 0;
 295
 296         for (p = nand_devices; p; p = p->next)
 297         {
 298                 if (i++ == num)
 299                 {
 300                         return p;
 301                 }
 302         }
 303
 304         return NULL;
 305 }
 306
 307 int nand_build_bbt(struct nand_device_s *device, int first, int last)
 308 {
 309         u32 page = 0x0;
 310         int i;
 311         u8 *oob;
 312
 313         oob = malloc(6);
 314
 315         if ((first < 0) || (first >= device->num_blocks))
 316                 first = 0;
 317
 318         if ((last >= device->num_blocks) || (last == -1))
 319                 last = device->num_blocks - 1;
 320
 321         for (i = first; i < last; i++)
 322         {
 323                 nand_read_page(device, page, NULL, 0, oob, 6);
 324
 325                 if (((device->device->options & NAND_BUSWIDTH_16) && ((oob[0] & oob[1]) != 0xff))
 326                         || (((device->page_size == 512) && (oob[5] != 0xff)) ||
 327                                 ((device->page_size == 2048) && (oob[0] != 0xff))))
 328                 {
 329                         WARNING("invalid block: %i", i);
 330                         device->blocks[i].is_bad = 1;
 331                 }
 332                 else
 333                 {
 334                         device->blocks[i].is_bad = 0;
 335                 }
 336
 337                 page += (device->erase_size / device->page_size);
 338         }
 339
 340         return ERROR_OK;
 341 }
 342
 343 int nand_read_status(struct nand_device_s *device, u8 *status)
 344 {
 345         if (!device->device)
 346                 return ERROR_NAND_DEVICE_NOT_PROBED;
 347
 348         /* Send read status command */
 349         device->controller->command(device, NAND_CMD_STATUS);
 350
 351         usleep(1000);
 352
 353         /* read status */
 354         if (device->device->options & NAND_BUSWIDTH_16)
 355         {
 356                 u16 data;
 357                 device->controller->read_data(device, &data);
 358                 *status = data & 0xff;
 359         }
 360         else
 361         {
 362                 device->controller->read_data(device, status);
 363         }
 364
 365         return ERROR_OK;
 366 }
 367
 368 int nand_probe(struct nand_device_s *device)
 369 {
 370         u8 manufacturer_id, device_id;
 371         nand_manufacturer_t *manufacturer;
 372         int retval;
 373         int i;
 374
 375         /* clear device data */
 376         device->device = NULL;
 377         device->manufacturer = NULL;
 378
 379         /* clear device parameters */
 380         device->bus_width = 0;
 381         device->address_cycles = 0;
 382         device->page_size = 0;
 383         device->erase_size = 0;
 384
 385         /* initialize controller (device parameters are zero, use controller default) */
 386         if ((retval = device->controller->init(device) != ERROR_OK))
 387         {
 388                 switch (retval)
 389                 {
 390                         case ERROR_NAND_OPERATION_FAILED:
 391                                 DEBUG("controller initialization failed");
 392                                 return ERROR_NAND_OPERATION_FAILED;
 393                         case ERROR_NAND_OPERATION_NOT_SUPPORTED:
 394                                 ERROR("BUG: controller reported that it doesn't support default parameters");
 395                                 return ERROR_NAND_OPERATION_FAILED;
 396                         default:
 397                                 ERROR("BUG: unknown controller initialization failure");
 398                                 return ERROR_NAND_OPERATION_FAILED;
 399                 }
 400         }
 401
 402         device->controller->command(device, NAND_CMD_RESET);
 403         device->controller->reset(device);
 404
 405         device->controller->command(device, NAND_CMD_READID);
 406         device->controller->address(device, 0x0);
 407
 408         if (device->bus_width == 8)
 409         {
 410                 device->controller->read_data(device, &manufacturer_id);
 411                 device->controller->read_data(device, &device_id);
 412         }
 413         else
 414         {
 415                 u16 data_buf;
 416                 device->controller->read_data(device, &data_buf);
 417                 manufacturer_id = data_buf & 0xff;
 418                 device->controller->read_data(device, &data_buf);
 419                 device_id = data_buf & 0xff;
 420         }
 421
 422         device->manufacturer = manufacturer;
 423
 424         for (i = 0; nand_flash_ids[i].name; i++)
 425         {
 426                 if (nand_flash_ids[i].id == device_id)
 427                 {
 428                         device->device = &nand_flash_ids[i];
 429                         break;
 430                 }
 431         }
 432
 433         for (i = 0; nand_manuf_ids[i].name; i++)
 434         {
 435                 if (nand_manuf_ids[i].id == manufacturer_id)
 436                 {
 437                         device->manufacturer = &nand_manuf_ids[i];
 438                         break;
 439                 }
 440         }
 441
 442         if (!device->manufacturer)
 443         {
 444                 device->manufacturer = &nand_manuf_ids[0];
 445                 device->manufacturer->id = manufacturer_id;
 446         }
 447
 448         if (!device->device)
 449         {
 450                 ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
 451                         manufacturer_id, device_id);
 452                 return ERROR_NAND_OPERATION_FAILED;
 453         }
 454
 455         DEBUG("found %s (%s)", device->device->name, device->manufacturer->name);
 456
 457         /* initialize device parameters */
 458
 459         /* bus width */
 460         if (device->device->options & NAND_BUSWIDTH_16)
 461                 device->bus_width = 16;
 462         else
 463                 device->bus_width = 8;
 464
 465         /* page size */
 466         if (device->device->page_size == 0)
 467         {
 468                 /* TODO: support reading extended chip id to determine page size */
 469                 return ERROR_NAND_OPERATION_FAILED;
 470         }
 471         else if (device->device->page_size == 256)
 472         {
 473                 ERROR("NAND flashes with 256 byte pagesize are not supported");
 474                 return ERROR_NAND_OPERATION_FAILED;
 475         }
 476         else
 477         {
 478                 device->page_size = device->device->page_size;
 479         }
 480
 481         /* number of address cycles */
 482         if (device->page_size <= 512)
 483         {
 484                 /* small page devices */
 485                 if (device->device->chip_size <= 32)
 486                         device->address_cycles = 3;
 487                 else if (device->device->chip_size <= 8*1024)
 488                         device->address_cycles = 4;
 489                 else
 490                 {
 491                         ERROR("BUG: small page NAND device with more than 8 GiB encountered");
 492                         device->address_cycles = 5;
 493                 }
 494         }
 495         else
 496         {
 497                 /* large page devices */
 498                 if (device->device->chip_size <= 128)
 499                         device->address_cycles = 4;
 500                 else if (device->device->chip_size <= 32*1024)
 501                         device->address_cycles = 5;
 502                 else
 503                 {
 504                         ERROR("BUG: small page NAND device with more than 32 GiB encountered");
 505                         device->address_cycles = 6;
 506                 }
 507         }
 508
 509         /* erase size */
 510         if (device->device->erase_size == 0)
 511         {
 512                 /* TODO: support reading extended chip id to determine erase size */
 513         }
 514         else
 515         {
 516                 device->erase_size = device->device->erase_size;
 517         }
 518
 519         /* initialize controller, but leave parameters at the controllers default */
 520         if ((retval = device->controller->init(device) != ERROR_OK))
 521         {
 522                 switch (retval)
 523                 {
 524                         case ERROR_NAND_OPERATION_FAILED:
 525                                 DEBUG("controller initialization failed");
 526                                 return ERROR_NAND_OPERATION_FAILED;
 527                         case ERROR_NAND_OPERATION_NOT_SUPPORTED:
 528                                 ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
 529                                         device->bus_width, device->address_cycles, device->page_size);
 530                                 return ERROR_NAND_OPERATION_FAILED;
 531                         default:
 532                                 ERROR("BUG: unknown controller initialization failure");
 533                                 return ERROR_NAND_OPERATION_FAILED;
 534                 }
 535         }
 536
 537         device->num_blocks = (device->device->chip_size * 1024) / (device->erase_size / 1024);
 538         device->blocks = malloc(sizeof(nand_block_t) * device->num_blocks);
 539
 540         for (i = 0; i < device->num_blocks; i++)
 541         {
 542                 device->blocks[i].size = device->erase_size;
 543                 device->blocks[i].offset = i * device->erase_size;
 544                 device->blocks[i].is_erased = -1;
 545                 device->blocks[i].is_bad = -1;
 546         }
 547
 548         return ERROR_OK;
 549 }
 550
 551 int nand_erase(struct nand_device_s *device, int first_block, int last_block)
 552 {
 553         int i;
 554         u32 page;
 555         u8 status;
 556         int retval;
 557
 558         if (!device->device)
 559                 return ERROR_NAND_DEVICE_NOT_PROBED;
 560
 561         if ((first_block < 0) || (last_block > device->num_blocks))
 562                 return ERROR_INVALID_ARGUMENTS;
 563
 564         /* make sure we know if a block is bad before erasing it */
 565         for (i = first_block; i <= last_block; i++)
 566         {
 567                 if (device->blocks[i].is_bad == -1)
 568                 {
 569                         nand_build_bbt(device, i, last_block);
 570                         break;
 571                 }
 572         }
 573
 574         for (i = first_block; i <= last_block; i++)
 575         {
 576                 /* Send erase setup command */
 577                 device->controller->command(device, NAND_CMD_ERASE1);
 578
 579                 page = i * (device->erase_size / device->page_size);
 580
 581                 /* Send page address */
 582                 if (device->page_size <= 512)
 583                 {
 584                         /* row */
 585                         device->controller->address(device, page & 0xff);
 586                         device->controller->address(device, (page >> 8) & 0xff);
 587
 588                         /* 3rd cycle only on devices with more than 32 MiB */
 589                         if (device->address_cycles >= 4)
 590                                 device->controller->address(device, (page >> 16) & 0xff);
 591
 592                         /* 4th cycle only on devices with more than 8 GiB */
 593                         if (device->address_cycles >= 5)
 594                                 device->controller->address(device, (page >> 24) & 0xff);
 595                 }
 596                 else
 597                 {
 598                         /* row */
 599                         device->controller->address(device, page & 0xff);
 600                         device->controller->address(device, (page >> 8) & 0xff);
 601
 602                         /* 3rd cycle only on devices with more than 128 MiB */
 603                         if (device->address_cycles >= 5)
 604                                 device->controller->address(device, (page >> 16) & 0xff);
 605                 }
 606
 607                 /* Send erase confirm command */
 608                 device->controller->command(device, NAND_CMD_ERASE2);
 609
 610                 if (!device->controller->nand_ready(device, 1000))
 611                 {
 612                         ERROR("timeout waiting for NAND flash block erase to complete");
 613                         return ERROR_NAND_OPERATION_TIMEOUT;
 614                 }
 615
 616                 if ((retval = nand_read_status(device, &status)) != ERROR_OK)
 617                 {
 618                         ERROR("couldn't read status");
 619                         return ERROR_NAND_OPERATION_FAILED;
 620                 }
 621
 622                 if (status & 0x1)
 623                 {
 624                         ERROR("erase operation didn't pass, status: 0x%2.2x", status);
 625                         return ERROR_NAND_OPERATION_FAILED;
 626                 }
 627         }
 628
 629         return ERROR_OK;
 630 }
 631
 632 int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size)
 633 {
 634         u8 *page;
 635
 636         if (!device->device)
 637                 return ERROR_NAND_DEVICE_NOT_PROBED;
 638
 639         if (address % device->page_size)
 640         {
 641                 ERROR("reads need to be page aligned");
 642                 return ERROR_NAND_OPERATION_FAILED;
 643         }
 644
 645         page = malloc(device->page_size);
 646
 647         while (data_size > 0 )
 648         {
 649                 u32 thisrun_size = (data_size > device->page_size) ? device->page_size : data_size;
 650                 u32 page_address;
 651
 652
 653                 page_address = address / device->page_size;
 654
 655                 nand_read_page(device, page_address, page, device->page_size, NULL, 0);
 656
 657                 memcpy(data, page, thisrun_size);
 658
 659                 address += thisrun_size;
 660                 data += thisrun_size;
 661                 data_size -= thisrun_size;
 662         }
 663
 664         free(page);
 665
 666         return ERROR_OK;
 667 }
 668
 669 int nand_write_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size)
 670 {
 671         u8 *page;
 672
 673         if (!device->device)
 674                 return ERROR_NAND_DEVICE_NOT_PROBED;
 675
 676         if (address % device->page_size)
 677         {
 678                 ERROR("writes need to be page aligned");
 679                 return ERROR_NAND_OPERATION_FAILED;
 680         }
 681
 682         page = malloc(device->page_size);
 683
 684         while (data_size > 0 )
 685         {
 686                 u32 thisrun_size = (data_size > device->page_size) ? device->page_size : data_size;
 687                 u32 page_address;
 688
 689                 memset(page, 0xff, device->page_size);
 690                 memcpy(page, data, thisrun_size);
 691
 692                 page_address = address / device->page_size;
 693
 694                 nand_write_page(device, page_address, page, device->page_size, NULL, 0);
 695
 696                 address += thisrun_size;
 697                 data += thisrun_size;
 698                 data_size -= thisrun_size;
 699         }
 700
 701         free(page);
 702
 703         return ERROR_OK;
 704 }
 705
 706 int nand_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
 707 {
 708         if (!device->device)
 709                 return ERROR_NAND_DEVICE_NOT_PROBED;
 710
 711         if (device->use_raw)
 712                 return nand_write_page_raw(device, page, data, data_size, oob, oob_size);
 713         else
 714                 return device->controller->write_page(device, page, data, data_size, oob, oob_size);
 715 }
 716
 717 int nand_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
 718 {
 719         if (!device->device)
 720                 return ERROR_NAND_DEVICE_NOT_PROBED;
 721
 722         if (device->use_raw)
 723                 return nand_read_page_raw(device, page, data, data_size, oob, oob_size);
 724         else
 725                 return device->controller->read_page(device, page, data, data_size, oob, oob_size);
 726 }
 727
 728 int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
 729 {
 730         int i;
 731
 732         if (!device->device)
 733                 return ERROR_NAND_DEVICE_NOT_PROBED;
 734
 735         if (device->page_size <= 512)
 736         {
 737                 /* small page device */
 738                 if (data)
 739                         device->controller->command(device, NAND_CMD_READ0);
 740                 else
 741                         device->controller->command(device, NAND_CMD_READOOB);
 742
 743                 /* column (always 0, we start at the beginning of a page/OOB area) */
 744                 device->controller->address(device, 0x0);
 745
 746                 /* row */
 747                 device->controller->address(device, page & 0xff);
 748                 device->controller->address(device, (page >> 8) & 0xff);
 749
 750                 /* 4th cycle only on devices with more than 32 MiB */
 751                 if (device->address_cycles >= 4)
 752                         device->controller->address(device, (page >> 16) & 0xff);
 753
 754                 /* 5th cycle only on devices with more than 8 GiB */
 755                 if (device->address_cycles >= 5)
 756                         device->controller->address(device, (page >> 24) & 0xff);
 757         }
 758         else
 759         {
 760                 /* large page device */
 761                 device->controller->command(device, NAND_CMD_READ0);
 762
 763                 /* column (0 when we start at the beginning of a page,
 764                  * or 2048 for the beginning of OOB area)
 765                  */
 766                 device->controller->address(device, 0x0);
 767                 device->controller->address(device, 0x8);
 768
 769                 /* row */
 770                 device->controller->address(device, page & 0xff);
 771                 device->controller->address(device, (page >> 8) & 0xff);
 772
 773                 /* 5th cycle only on devices with more than 128 MiB */
 774                 if (device->address_cycles >= 5)
 775                         device->controller->address(device, (page >> 16) & 0xff);
 776
 777                 /* large page devices need a start command */
 778                 device->controller->command(device, NAND_CMD_READSTART);
 779         }
 780
 781         if (!device->controller->nand_ready(device, 100))
 782                 return ERROR_NAND_OPERATION_TIMEOUT;
 783
 784         if (data)
 785         {
 786                 for (i = 0; i < data_size;)
 787                 {
 788                         if (device->device->options & NAND_BUSWIDTH_16)
 789                         {
 790                                 device->controller->read_data(device, data);
 791                                 data += 2;
 792                                 i += 2;
 793                         }
 794                         else
 795                         {
 796                                 device->controller->read_data(device, data);
 797                                 data += 1;
 798                                 i += 1;
 799                         }
 800                 }
 801         }
 802
 803         if (oob)
 804         {
 805                 for (i = 0; i < oob_size;)
 806                 {
 807                         if (device->device->options & NAND_BUSWIDTH_16)
 808                         {
 809                                 device->controller->read_data(device, oob);
 810                                 oob += 2;
 811                                 i += 2;
 812                         }
 813                         else
 814                         {
 815                                 device->controller->read_data(device, oob);
 816                                 oob += 1;
 817                                 i += 1;
 818                         }
 819                 }
 820         }
 821
 822         return ERROR_OK;
 823 }
 824
 825 int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
 826 {
 827         int i;
 828         int retval;
 829         u8 status;
 830
 831         if (!device->device)
 832                 return ERROR_NAND_DEVICE_NOT_PROBED;
 833
 834         device->controller->command(device, NAND_CMD_SEQIN);
 835
 836         if (device->page_size <= 512)
 837         {
 838                 /* column (always 0, we start at the beginning of a page/OOB area) */
 839                 device->controller->address(device, 0x0);
 840
 841                 /* row */
 842                 device->controller->address(device, page & 0xff);
 843                 device->controller->address(device, (page >> 8) & 0xff);
 844
 845                 /* 4th cycle only on devices with more than 32 MiB */
 846                 if (device->address_cycles >= 4)
 847                         device->controller->address(device, (page >> 16) & 0xff);
 848
 849                 /* 5th cycle only on devices with more than 8 GiB */
 850                 if (device->address_cycles >= 5)
 851                         device->controller->address(device, (page >> 24) & 0xff);
 852         }
 853         else
 854         {
 855                 /* column (0 when we start at the beginning of a page,
 856                  * or 2048 for the beginning of OOB area)
 857                  */
 858                 device->controller->address(device, 0x0);
 859                 device->controller->address(device, 0x8);
 860
 861                 /* row */
 862                 device->controller->address(device, page & 0xff);
 863                 device->controller->address(device, (page >> 8) & 0xff);
 864
 865                 /* 5th cycle only on devices with more than 128 MiB */
 866                 if (device->address_cycles >= 5)
 867                         device->controller->address(device, (page >> 16) & 0xff);
 868         }
 869
 870         if (data)
 871         {
 872                 for (i = 0; i < data_size;)
 873                 {
 874                         if (device->device->options & NAND_BUSWIDTH_16)
 875                         {
 876                                 u16 data_buf = le_to_h_u16(data);
 877                                 device->controller->write_data(device, data_buf);
 878                                 data += 2;
 879                                 i += 2;
 880                         }
 881                         else
 882                         {
 883                                 device->controller->write_data(device, *data);
 884                                 data += 1;
 885                                 i += 1;
 886                         }
 887                 }
 888         }
 889
 890         if (oob)
 891         {
 892                 for (i = 0; i < oob_size;)
 893                 {
 894                         if (device->device->options & NAND_BUSWIDTH_16)
 895                         {
 896                                 u16 oob_buf = le_to_h_u16(data);
 897                                 device->controller->write_data(device, oob_buf);
 898                                 oob += 2;
 899                                 i += 2;
 900                         }
 901                         else
 902                         {
 903                                 device->controller->write_data(device, *oob);
 904                                 oob += 1;
 905                                 i += 1;
 906                         }
 907                 }
 908         }
 909
 910         device->controller->command(device, NAND_CMD_PAGEPROG);
 911
 912         if (!device->controller->nand_ready(device, 100))
 913                 return ERROR_NAND_OPERATION_TIMEOUT;
 914
 915         if ((retval = nand_read_status(device, &status)) != ERROR_OK)
 916         {
 917                 ERROR("couldn't read status");
 918                 return ERROR_NAND_OPERATION_FAILED;
 919         }
 920
 921         if (status & NAND_STATUS_FAIL)
 922         {
 923                 ERROR("write operation didn't pass, status: 0x%2.2x", status);
 924                 return ERROR_NAND_OPERATION_FAILED;
 925         }
 926
 927         return ERROR_OK;
 928 }
 929
 930 int handle_nand_list_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
 931 {
 932         nand_device_t *p;
 933         int i = 0;
 934
 935         if (!nand_devices)
 936         {
 937                 command_print(cmd_ctx, "no NAND flash devices configured");
 938                 return ERROR_OK;
 939         }
 940
 941         for (p = nand_devices; p; p = p->next)
 942         {
 943                 if (p->device)
 944                         command_print(cmd_ctx, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
 945                                 i++, p->device->name, p->manufacturer->name, p->page_size, p->bus_width, p->erase_size);
 946                 else
 947                         command_print(cmd_ctx, "#%i: not probed");
 948         }
 949
 950         return ERROR_OK;
 951 }
 952
 953 int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
 954 {
 955         nand_device_t *p;
 956         int i = 0;
 957         int j = 0;
 958         int first = -1;
 959         int last = -1;
 960
 961         if ((argc < 1) || (argc > 3))
 962         {
 963                 command_print(cmd_ctx, "usage: nand info <num> [<first> <last>]");
 964                 return ERROR_OK;
 965         }
 966
 967         if (argc == 2)
 968         {
 969                 first = last = strtoul(args[1], NULL, 0);
 970         }
 971         else if (argc == 3)
 972         {
 973                 first = strtoul(args[1], NULL, 0);
 974                 last = strtoul(args[2], NULL, 0);
 975         }
 976
 977         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
 978         if (p)
 979         {
 980                 if (p->device)
 981                 {
 982                         if (first >= p->num_blocks)
 983                                 first = p->num_blocks - 1;
 984
 985                         if (last >= p->num_blocks)
 986                                 last = p->num_blocks - 1;
 987
 988                         command_print(cmd_ctx, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
 989                                 i++, p->device->name, p->manufacturer->name, p->page_size, p->bus_width, p->erase_size);
 990
 991                         for (j = first; j <= last; j++)
 992                         {
 993                                 char *erase_state, *bad_state;
 994
 995                                 if (p->blocks[j].is_erased == 0)
 996                                         erase_state = "not erased";
 997                                 else if (p->blocks[j].is_erased == 1)
 998                                         erase_state = "erased";
 999                                 else
1000                                         erase_state = "erase state unknown";
1001
1002                                 if (p->blocks[j].is_bad == 0)
1003                                         bad_state = "";
1004                                 else if (p->blocks[j].is_bad == 1)
1005                                         bad_state = " (marked bad)";
1006                                 else
1007                                         bad_state = " (block condition unknown)";
1008
1009                                 command_print(cmd_ctx, "\t#%i: 0x%8.8x (0x%xkB) %s%s",
1010                                                         j, p->blocks[j].offset, p->blocks[j].size / 1024,
1011                                                         erase_state, bad_state);
1012                         }
1013                 }
1014                 else
1015                 {
1016                         command_print(cmd_ctx, "#%i: not probed");
1017                 }
1018         }
1019
1020         return ERROR_OK;
1021 }
1022
1023 int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1024 {
1025         nand_device_t *p;
1026         int retval;
1027
1028         if (argc != 1)
1029         {
1030                 command_print(cmd_ctx, "usage: nand probe <num>");
1031                 return ERROR_OK;
1032         }
1033
1034         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1035         if (p)
1036         {
1037                 if ((retval = nand_probe(p)) == ERROR_OK)
1038                 {
1039                         command_print(cmd_ctx, "NAND flash device '%s' found", p->device->name);
1040                 }
1041                 else if (retval == ERROR_NAND_OPERATION_FAILED)
1042                 {
1043                         command_print(cmd_ctx, "probing failed for NAND flash device");
1044                 }
1045                 else
1046                 {
1047                         command_print(cmd_ctx, "unknown error when probing NAND flash device");
1048                 }
1049         }
1050         else
1051         {
1052                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1053         }
1054
1055         return ERROR_OK;
1056 }
1057
1058 int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1059 {
1060         nand_device_t *p;
1061         int retval;
1062
1063         if (argc != 3)
1064         {
1065                 command_print(cmd_ctx, "usage: nand erase <num> <first> <last>");
1066                 return ERROR_OK;
1067         }
1068
1069         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1070         if (p)
1071         {
1072                 int first = strtoul(args[1], NULL, 0);
1073                 int last = strtoul(args[2], NULL, 0);
1074
1075                 if ((retval = nand_erase(p, first, last)) == ERROR_OK)
1076                 {
1077                         command_print(cmd_ctx, "successfully erased blocks %i to %i on NAND flash device '%s'", first, last, p->device->name);
1078                 }
1079                 else if (retval == ERROR_NAND_OPERATION_FAILED)
1080                 {
1081                         command_print(cmd_ctx, "erase failed");
1082                 }
1083                 else
1084                 {
1085                         command_print(cmd_ctx, "unknown error when erasing NAND flash device");
1086                 }
1087         }
1088         else
1089         {
1090                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1091         }
1092
1093         return ERROR_OK;
1094 }
1095
1096 int handle_nand_check_bad_blocks_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1097 {
1098         nand_device_t *p;
1099         int retval;
1100         int first = -1;
1101         int last = -1;
1102
1103         if ((argc < 1) || (argc > 3) || (argc == 2))
1104         {
1105                 command_print(cmd_ctx, "usage: nand check_bad_blocks <num> [<first> <last>]");
1106                 return ERROR_OK;
1107         }
1108
1109         if (argc == 3)
1110         {
1111                 first = strtoul(args[1], NULL, 0);
1112                 last = strtoul(args[2], NULL, 0);
1113         }
1114
1115         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1116         if (p)
1117         {
1118                 if ((retval = nand_build_bbt(p, first, last)) == ERROR_OK)
1119                 {
1120                         command_print(cmd_ctx, "checked NAND flash device for bad blocks, use \"nand info\" command to list blocks", p->device->name);
1121                 }
1122                 else if (retval == ERROR_NAND_OPERATION_FAILED)
1123                 {
1124                         command_print(cmd_ctx, "error when checking for bad blocks on NAND flash device");
1125                 }
1126                 else
1127                 {
1128                         command_print(cmd_ctx, "unknown error when checking for bad blocks on NAND flash device");
1129                 }
1130         }
1131         else
1132         {
1133                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1134         }
1135
1136         return ERROR_OK;
1137 }
1138
1139 int handle_nand_copy_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1140 {
1141         nand_device_t *p;
1142         int retval;
1143
1144         if (argc != 4)
1145         {
1146                 command_print(cmd_ctx, "usage: nand copy <num> <offset> <length> <ram-address>");
1147                 return ERROR_OK;
1148         }
1149
1150         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1151         if (p)
1152         {
1153
1154         }
1155         else
1156         {
1157                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1158         }
1159
1160         return ERROR_OK;
1161 }
1162
1163 int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1164 {
1165         u32 offset;
1166         u32 binary_size;
1167         u32 buf_cnt;
1168         enum oob_formats oob_format = NAND_OOB_NONE;
1169
1170         fileio_t file;
1171         fileio_image_t image_info;
1172         int sec_type_identified = 0;
1173         enum fileio_sec_type sec_type;
1174
1175         duration_t duration;
1176         char *duration_text;
1177
1178         nand_device_t *p;
1179
1180         if (argc < 3)
1181         {
1182                 command_print(cmd_ctx, "usage: nand write <num> <file> <offset> [options]");
1183                 return ERROR_OK;
1184         }
1185
1186         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1187         if (p)
1188         {
1189                 u8 *page = NULL;
1190                 u32 page_size = 0;
1191                 u8 *oob = NULL;
1192                 u32 oob_size = 0;
1193
1194                 duration_start_measure(&duration);
1195                 strtoul(args[2], NULL, 0);
1196
1197                 if (argc > 3)
1198                 {
1199                         int i;
1200                         for (i = 3; i < argc; i++)
1201                         {
1202                                 if (!strcmp(args[i], "oob_raw"))
1203                                         oob_format |= NAND_OOB_RAW;
1204                                 else if (!strcmp(args[i], "oob_only"))
1205                                         oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY;
1206                                 else
1207                                 {
1208                                         if (fileio_identify_image_type(&sec_type, args[i]) == ERROR_OK)
1209                                         {
1210                                                 sec_type_identified = 1;
1211                                         }
1212                                         else
1213                                         {
1214                                                 command_print(cmd_ctx, "unknown option: %s", args[i]);
1215                                         }
1216                                 }
1217                         }
1218                 }
1219
1220                 /* if no image type option was encountered, set the default */
1221                 if (!sec_type_identified)
1222                 {
1223
1224                         fileio_identify_image_type(&sec_type, NULL);
1225                         sec_type_identified = 1;
1226                 }
1227
1228                 image_info.base_address = strtoul(args[2], NULL, 0);
1229                 image_info.has_start_address = 0;
1230
1231                 if (fileio_open(&file, args[1], FILEIO_READ,
1232                         FILEIO_IMAGE, &image_info, sec_type) != ERROR_OK)
1233                 {
1234                         command_print(cmd_ctx, "flash write error: %s", file.error_str);
1235                         return ERROR_OK;
1236                 }
1237
1238                 /* the offset might have been overwritten by the image base address */
1239                 offset = image_info.base_address;
1240
1241                 buf_cnt = binary_size = file.size;
1242
1243                 if (!(oob_format & NAND_OOB_ONLY))
1244                 {
1245                         page_size = p->page_size;
1246                         page = malloc(p->page_size);
1247                 }
1248
1249                 if (oob_format & NAND_OOB_RAW)
1250                 {
1251                         if (p->page_size == 512)
1252                                 oob_size = 16;
1253                         else if (p->page_size == 2048)
1254                                 oob_size = 64;
1255                         oob = malloc(oob_size);
1256                 }
1257
1258                 if (offset % p->page_size)
1259                 {
1260                         command_print(cmd_ctx, "only page size aligned offsets and sizes are supported");
1261                         return ERROR_OK;
1262                 }
1263
1264                 while (buf_cnt > 0)
1265                 {
1266                         u32 size_read;
1267
1268                         if (page)
1269                         {
1270                                 fileio_read(&file, page_size, page, &size_read);
1271                                 buf_cnt -= size_read;
1272                                 if (size_read < page_size)
1273                                 {
1274                                         memset(page + size_read, 0xff, page_size - size_read);
1275                                 }
1276                         }
1277
1278                         if (oob)
1279                         {
1280                                 fileio_read(&file, oob_size, oob, &size_read);
1281                                 buf_cnt -= size_read;
1282                                 if (size_read < oob_size)
1283                                 {
1284                                         memset(oob + size_read, 0xff, oob_size - size_read);
1285                                 }
1286                         }
1287
1288                         if (nand_write_page(p, offset / p->page_size, page, page_size, oob, oob_size) != ERROR_OK)
1289                         {
1290                                 command_print(cmd_ctx, "failed writing file %s to NAND flash %s at offset 0x%8.8x",
1291                                         file.url, args[0], offset);
1292                                 return ERROR_OK;
1293                         }
1294                         offset += page_size;
1295                 }
1296
1297                 duration_stop_measure(&duration, &duration_text);
1298                 command_print(cmd_ctx, "wrote file %s to NAND flash %s at offset 0x%8.8x in %s",
1299                         file.url, args[0], image_info.base_address, duration_text);
1300                 free(duration_text);
1301         }
1302         else
1303         {
1304                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1305         }
1306
1307         return ERROR_OK;
1308 }
1309
1310 int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1311 {
1312         nand_device_t *p;
1313
1314         if (argc < 4)
1315         {
1316                 command_print(cmd_ctx, "usage: nand dump <num> <filename> <address> <size> [options]");
1317                 return ERROR_OK;
1318         }
1319
1320         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1321         if (p)
1322         {
1323                 if (p->device)
1324                 {
1325                         fileio_t file;
1326                         fileio_image_t image_info;
1327                         duration_t duration;
1328                         char *duration_text;
1329                         int retval;
1330
1331                         u8 *page = NULL;
1332                         u32 page_size = 0;
1333                         u8 *oob = NULL;
1334                         u32 oob_size = 0;
1335                         u32 address = strtoul(args[2], NULL, 0);
1336                         u32 size = strtoul(args[3], NULL, 0);
1337                         u32 bytes_done = 0;
1338                         enum oob_formats oob_format = NAND_OOB_NONE;
1339
1340                         if (argc > 4)
1341                         {
1342                                 int i;
1343                                 for (i = 4; i < argc; i++)
1344                                 {
1345                                         if (!strcmp(args[i], "oob_raw"))
1346                                                 oob_format |= NAND_OOB_RAW;
1347                                         else if (!strcmp(args[i], "oob_only"))
1348                                                 oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY;
1349                                         else
1350                                                 command_print(cmd_ctx, "unknown option: '%s'", args[i]);
1351                                 }
1352                         }
1353
1354                         if ((address % p->page_size) || (size % p->page_size))
1355                         {
1356                                 command_print(cmd_ctx, "only page size aligned addresses and sizes are supported");
1357                                 return ERROR_OK;
1358                         }
1359
1360                         if (!(oob_format & NAND_OOB_ONLY))
1361                         {
1362                                 page_size = p->page_size;
1363                                 page = malloc(p->page_size);
1364                         }
1365
1366                         if (oob_format & NAND_OOB_RAW)
1367                         {
1368                                 if (p->page_size == 512)
1369                                         oob_size = 16;
1370                                 else if (p->page_size == 2048)
1371                                         oob_size = 64;
1372                                 oob = malloc(oob_size);
1373                         }
1374
1375                         image_info.base_address = address;
1376                         image_info.has_start_address = 0;
1377
1378                         if (fileio_open(&file, args[1], FILEIO_WRITE,
1379                                 FILEIO_IMAGE, &image_info, FILEIO_PLAIN) != ERROR_OK)
1380                         {
1381                                 command_print(cmd_ctx, "dump_image error: %s", file.error_str);
1382                                 return ERROR_OK;
1383                         }
1384
1385                         duration_start_measure(&duration);
1386
1387                         while (size > 0)
1388                         {
1389                                 u32 size_written;
1390                                 if ((retval = nand_read_page(p, address / p->page_size, page, page_size, oob, oob_size)) != ERROR_OK)
1391                                 {
1392                                         command_print(cmd_ctx, "reading NAND flash page failed");
1393                                         return ERROR_OK;
1394                                 }
1395
1396                                 if (page)
1397                                 {
1398                                         fileio_write(&file, page_size, page, &size_written);
1399                                         bytes_done += page_size;
1400                                 }
1401
1402                                 if (oob)
1403                                 {
1404                                         fileio_write(&file, oob_size, oob, &size_written);
1405                                         bytes_done += oob_size;
1406                                 }
1407
1408                                 size -= p->page_size;
1409                                 address += p->page_size;
1410                         }
1411
1412                         if (page)
1413                                 free(page);
1414
1415                         if (oob)
1416                                 free(oob);
1417
1418                         fileio_close(&file);
1419
1420                         duration_stop_measure(&duration, &duration_text);
1421                         command_print(cmd_ctx, "dumped %lli byte in %s", file.size, duration_text);
1422                         free(duration_text);
1423                 }
1424                 else
1425                 {
1426                         command_print(cmd_ctx, "#%i: not probed");
1427                 }
1428         }
1429         else
1430         {
1431                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1432         }
1433
1434         return ERROR_OK;
1435 }
1436
1437 int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1438 {
1439         nand_device_t *p;
1440
1441         if ((argc < 1) || (argc > 2))
1442         {
1443                 command_print(cmd_ctx, "usage: nand raw_access <num> ['enable'|'disable']");
1444                 return ERROR_OK;
1445         }
1446
1447         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1448         if (p)
1449         {
1450                 if (p->device)
1451                 {
1452                         if (argc == 2)
1453                         {
1454                                 if (strcmp("enable", args[1]) == 0)
1455                                 {
1456                                         p->use_raw = 1;
1457                                 }
1458                                 else if (strcmp("disable", args[1]) == 0)
1459                                 {
1460                                         p->use_raw = 0;
1461                                 }
1462                                 else
1463                                 {
1464                                         command_print(cmd_ctx, "usage: nand raw_access ['enable'|disable']");
1465                                 }
1466                         }
1467
1468                         command_print(cmd_ctx, "raw access is %s", (p->use_raw) ? "enabled" : "disabled");
1469                 }
1470                 else
1471                 {
1472                         command_print(cmd_ctx, "#%i: not probed");
1473                 }
1474         }
1475         else
1476         {
1477                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1478         }
1479
1480         return ERROR_OK;
1481 }
1482