git.sur5r.net Git - openocd/blob - src/flash/nand.c

   1 /***************************************************************************
   2  *   Copyright (C) 2007 by Dominic Rath                                    *
   3  *   Dominic.Rath@gmx.de                                                   *
   4  *                                                                         *
   5  *   Partially based on drivers/mtd/nand_ids.c from Linux.                 *
   6  *   Copyright (C) 2002 Thomas Gleixner <tglx@linutronix.de>               *
   7  *                                                                         *
   8  *   This program is free software; you can redistribute it and/or modify  *
   9  *   it under the terms of the GNU General Public License as published by  *
  10  *   the Free Software Foundation; either version 2 of the License, or     *
  11  *   (at your option) any later version.                                   *
  12  *                                                                         *
  13  *   This program is distributed in the hope that it will be useful,       *
  14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  16  *   GNU General Public License for more details.                          *
  17  *                                                                         *
  18  *   You should have received a copy of the GNU General Public License     *
  19  *   along with this program; if not, write to the                         *
  20  *   Free Software Foundation, Inc.,                                       *
  21  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  22  ***************************************************************************/
  23 #ifdef HAVE_CONFIG_H
  24 #include "config.h"
  25 #endif
  26
  27 #include "replacements.h"
  28 #include "log.h"
  29
  30 #include <stdlib.h>
  31 #include <string.h>
  32 #include <inttypes.h>
  33
  34 #include <errno.h>
  35
  36 #include "nand.h"
  37 #include "flash.h"
  38 #include "time_support.h"
  39 #include "fileio.h"
  40 #include "image.h"
  41
  42 int nand_register_commands(struct command_context_s *cmd_ctx);
  43 int handle_nand_list_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  44 int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  45 int handle_nand_check_bad_blocks_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  46 int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  47 int handle_nand_copy_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  48 int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  49 int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  50 int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  51
  52 int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  53
  54 int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
  55 int nand_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
  56 int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size);
  57
  58 int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
  59 int nand_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
  60
  61 /* NAND flash controller
  62  */
  63 extern nand_flash_controller_t lpc3180_nand_controller;
  64 extern nand_flash_controller_t orion_nand_controller;
  65 extern nand_flash_controller_t s3c2410_nand_controller;
  66 extern nand_flash_controller_t s3c2412_nand_controller;
  67 extern nand_flash_controller_t s3c2440_nand_controller;
  68 extern nand_flash_controller_t s3c2443_nand_controller;
  69
  70 /* extern nand_flash_controller_t boundary_scan_nand_controller; */
  71
  72 nand_flash_controller_t *nand_flash_controllers[] =
  73 {
  74         &lpc3180_nand_controller,
  75         &orion_nand_controller,
  76         &s3c2410_nand_controller,
  77         &s3c2412_nand_controller,
  78         &s3c2440_nand_controller,
  79         &s3c2443_nand_controller,
  80 /*      &boundary_scan_nand_controller, */
  81         NULL
  82 };
  83
  84 /* configured NAND devices and NAND Flash command handler */
  85 nand_device_t *nand_devices = NULL;
  86 static command_t *nand_cmd;
  87
  88 /*      Chip ID list
  89  *
  90  *      Name, ID code, pagesize, chipsize in MegaByte, eraseblock size,
  91  *      options
  92  *
  93  *      Pagesize; 0, 256, 512
  94  *      0       get this information from the extended chip ID
  95  *      256     256 Byte page size
  96  *      512     512 Byte page size
  97  */
  98 nand_info_t nand_flash_ids[] =
  99 {
 100         {"NAND 1MiB 5V 8-bit",          0x6e, 256, 1, 0x1000, 0},
 101         {"NAND 2MiB 5V 8-bit",          0x64, 256, 2, 0x1000, 0},
 102         {"NAND 4MiB 5V 8-bit",          0x6b, 512, 4, 0x2000, 0},
 103         {"NAND 1MiB 3,3V 8-bit",        0xe8, 256, 1, 0x1000, 0},
 104         {"NAND 1MiB 3,3V 8-bit",        0xec, 256, 1, 0x1000, 0},
 105         {"NAND 2MiB 3,3V 8-bit",        0xea, 256, 2, 0x1000, 0},
 106         {"NAND 4MiB 3,3V 8-bit",        0xd5, 512, 4, 0x2000, 0},
 107         {"NAND 4MiB 3,3V 8-bit",        0xe3, 512, 4, 0x2000, 0},
 108         {"NAND 4MiB 3,3V 8-bit",        0xe5, 512, 4, 0x2000, 0},
 109         {"NAND 8MiB 3,3V 8-bit",        0xd6, 512, 8, 0x2000, 0},
 110
 111         {"NAND 8MiB 1,8V 8-bit",        0x39, 512, 8, 0x2000, 0},
 112         {"NAND 8MiB 3,3V 8-bit",        0xe6, 512, 8, 0x2000, 0},
 113         {"NAND 8MiB 1,8V 16-bit",       0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16},
 114         {"NAND 8MiB 3,3V 16-bit",       0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16},
 115
 116         {"NAND 16MiB 1,8V 8-bit",       0x33, 512, 16, 0x4000, 0},
 117         {"NAND 16MiB 3,3V 8-bit",       0x73, 512, 16, 0x4000, 0},
 118         {"NAND 16MiB 1,8V 16-bit",      0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16},
 119         {"NAND 16MiB 3,3V 16-bit",      0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16},
 120
 121         {"NAND 32MiB 1,8V 8-bit",       0x35, 512, 32, 0x4000, 0},
 122         {"NAND 32MiB 3,3V 8-bit",       0x75, 512, 32, 0x4000, 0},
 123         {"NAND 32MiB 1,8V 16-bit",      0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16},
 124         {"NAND 32MiB 3,3V 16-bit",      0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16},
 125
 126         {"NAND 64MiB 1,8V 8-bit",       0x36, 512, 64, 0x4000, 0},
 127         {"NAND 64MiB 3,3V 8-bit",       0x76, 512, 64, 0x4000, 0},
 128         {"NAND 64MiB 1,8V 16-bit",      0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16},
 129         {"NAND 64MiB 3,3V 16-bit",      0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16},
 130
 131         {"NAND 128MiB 1,8V 8-bit",      0x78, 512, 128, 0x4000, 0},
 132         {"NAND 128MiB 1,8V 8-bit",      0x39, 512, 128, 0x4000, 0},
 133         {"NAND 128MiB 3,3V 8-bit",      0x79, 512, 128, 0x4000, 0},
 134         {"NAND 128MiB 1,8V 16-bit",     0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 135         {"NAND 128MiB 1,8V 16-bit",     0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 136         {"NAND 128MiB 3,3V 16-bit",     0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 137         {"NAND 128MiB 3,3V 16-bit",     0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 138
 139         {"NAND 256MiB 3,3V 8-bit",      0x71, 512, 256, 0x4000, 0},
 140
 141         {"NAND 64MiB 1,8V 8-bit",       0xA2, 0,  64, 0, LP_OPTIONS},
 142         {"NAND 64MiB 3,3V 8-bit",       0xF2, 0,  64, 0, LP_OPTIONS},
 143         {"NAND 64MiB 1,8V 16-bit",      0xB2, 0,  64, 0, LP_OPTIONS16},
 144         {"NAND 64MiB 3,3V 16-bit",      0xC2, 0,  64, 0, LP_OPTIONS16},
 145
 146         {"NAND 128MiB 1,8V 8-bit",      0xA1, 0, 128, 0, LP_OPTIONS},
 147         {"NAND 128MiB 3,3V 8-bit",      0xF1, 0, 128, 0, LP_OPTIONS},
 148         {"NAND 128MiB 1,8V 16-bit",     0xB1, 0, 128, 0, LP_OPTIONS16},
 149         {"NAND 128MiB 3,3V 16-bit",     0xC1, 0, 128, 0, LP_OPTIONS16},
 150
 151         {"NAND 256MiB 1,8V 8-bit",      0xAA, 0, 256, 0, LP_OPTIONS},
 152         {"NAND 256MiB 3,3V 8-bit",      0xDA, 0, 256, 0, LP_OPTIONS},
 153         {"NAND 256MiB 1,8V 16-bit",     0xBA, 0, 256, 0, LP_OPTIONS16},
 154         {"NAND 256MiB 3,3V 16-bit",     0xCA, 0, 256, 0, LP_OPTIONS16},
 155
 156         {"NAND 512MiB 1,8V 8-bit",      0xAC, 0, 512, 0, LP_OPTIONS},
 157         {"NAND 512MiB 3,3V 8-bit",      0xDC, 0, 512, 0, LP_OPTIONS},
 158         {"NAND 512MiB 1,8V 16-bit",     0xBC, 0, 512, 0, LP_OPTIONS16},
 159         {"NAND 512MiB 3,3V 16-bit",     0xCC, 0, 512, 0, LP_OPTIONS16},
 160
 161         {"NAND 1GiB 1,8V 8-bit",        0xA3, 0, 1024, 0, LP_OPTIONS},
 162         {"NAND 1GiB 3,3V 8-bit",        0xD3, 0, 1024, 0, LP_OPTIONS},
 163         {"NAND 1GiB 1,8V 16-bit",       0xB3, 0, 1024, 0, LP_OPTIONS16},
 164         {"NAND 1GiB 3,3V 16-bit",       0xC3, 0, 1024, 0, LP_OPTIONS16},
 165
 166         {"NAND 2GiB 1,8V 8-bit",        0xA5, 0, 2048, 0, LP_OPTIONS},
 167         {"NAND 2GiB 3,3V 8-bit",        0xD5, 0, 2048, 0, LP_OPTIONS},
 168         {"NAND 2GiB 1,8V 16-bit",       0xB5, 0, 2048, 0, LP_OPTIONS16},
 169         {"NAND 2GiB 3,3V 16-bit",       0xC5, 0, 2048, 0, LP_OPTIONS16},
 170
 171         {NULL, 0,}
 172 };
 173
 174 /* Manufacturer ID list
 175  */
 176 nand_manufacturer_t nand_manuf_ids[] =
 177 {
 178         {0x0, "unknown"},
 179         {NAND_MFR_TOSHIBA, "Toshiba"},
 180         {NAND_MFR_SAMSUNG, "Samsung"},
 181         {NAND_MFR_FUJITSU, "Fujitsu"},
 182         {NAND_MFR_NATIONAL, "National"},
 183         {NAND_MFR_RENESAS, "Renesas"},
 184         {NAND_MFR_STMICRO, "ST Micro"},
 185         {NAND_MFR_HYNIX, "Hynix"},
 186         {0x0, NULL},
 187 };
 188
 189 /* nand device <nand_controller> [controller options]
 190  */
 191 int handle_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
 192 {
 193         int i;
 194         int retval;
 195
 196         if (argc < 1)
 197         {
 198                 LOG_WARNING("incomplete flash device nand configuration");
 199                 return ERROR_FLASH_BANK_INVALID;
 200         }
 201
 202         for (i = 0; nand_flash_controllers[i]; i++)
 203         {
 204                 nand_device_t *p, *c;
 205
 206                 if (strcmp(args[0], nand_flash_controllers[i]->name) == 0)
 207                 {
 208                         /* register flash specific commands */
 209                         if ((retval = nand_flash_controllers[i]->register_commands(cmd_ctx)) != ERROR_OK)
 210                         {
 211                                 LOG_ERROR("couldn't register '%s' commands", args[0]);
 212                                 return retval;
 213                         }
 214
 215                         c = malloc(sizeof(nand_device_t));
 216
 217                         c->controller = nand_flash_controllers[i];
 218                         c->controller_priv = NULL;
 219                         c->manufacturer = NULL;
 220                         c->device = NULL;
 221                         c->bus_width = 0;
 222                         c->address_cycles = 0;
 223                         c->page_size = 0;
 224                         c->use_raw = 0;
 225                         c->next = NULL;
 226
 227                         if ((retval = nand_flash_controllers[i]->nand_device_command(cmd_ctx, cmd, args, argc, c)) != ERROR_OK)
 228                         {
 229                                 LOG_ERROR("'%s' driver rejected nand flash", c->controller->name);
 230                                 free(c);
 231                                 return ERROR_OK;
 232                         }
 233
 234                         /* put NAND device in linked list */
 235                         if (nand_devices)
 236                         {
 237                                 /* find last flash device */
 238                                 for (p = nand_devices; p && p->next; p = p->next);
 239                                 if (p)
 240                                         p->next = c;
 241                         }
 242                         else
 243                         {
 244                                 nand_devices = c;
 245                         }
 246
 247                         return ERROR_OK;
 248                 }
 249         }
 250
 251         /* no valid NAND controller was found (i.e. the configuration option,
 252          * didn't match one of the compiled-in controllers)
 253          */
 254         LOG_ERROR("No valid NAND flash controller found (%s)", args[0]);
 255         LOG_ERROR("compiled-in NAND flash controllers:");
 256         for (i = 0; nand_flash_controllers[i]; i++)
 257         {
 258                 LOG_ERROR("%i: %s", i, nand_flash_controllers[i]->name);
 259         }
 260
 261         return ERROR_OK;
 262 }
 263
 264 int nand_register_commands(struct command_context_s *cmd_ctx)
 265 {
 266         nand_cmd = register_command(cmd_ctx, NULL, "nand", NULL, COMMAND_ANY, "NAND specific commands");
 267
 268         register_command(cmd_ctx, nand_cmd, "device", handle_nand_device_command, COMMAND_CONFIG, NULL);
 269
 270         return ERROR_OK;
 271 }
 272
 273 int nand_init(struct command_context_s *cmd_ctx)
 274 {
 275         if (nand_devices)
 276         {
 277                 register_command(cmd_ctx, nand_cmd, "list", handle_nand_list_command, COMMAND_EXEC,
 278                                                  "list configured NAND flash devices");
 279                 register_command(cmd_ctx, nand_cmd, "info", handle_nand_info_command, COMMAND_EXEC,
 280                                                  "print info about NAND flash device <num>");
 281                 register_command(cmd_ctx, nand_cmd, "probe", handle_nand_probe_command, COMMAND_EXEC,
 282                                                  "identify NAND flash device <num>");
 283                 register_command(cmd_ctx, nand_cmd, "check_bad_blocks", handle_nand_check_bad_blocks_command, COMMAND_EXEC,
 284                                                  "check NAND flash device <num> for bad blocks [<first> <last>]");
 285                 register_command(cmd_ctx, nand_cmd, "erase", handle_nand_erase_command, COMMAND_EXEC,
 286                                                  "erase blocks on NAND flash device <num> <first> <last>");
 287                 register_command(cmd_ctx, nand_cmd, "copy", handle_nand_copy_command, COMMAND_EXEC,
 288                                                  "copy from NAND flash device <num> <offset> <length> <ram-address>");
 289                 register_command(cmd_ctx, nand_cmd, "dump", handle_nand_dump_command, COMMAND_EXEC,
 290                                                  "dump from NAND flash device <num> <filename> <offset> <size> [options]");
 291                 register_command(cmd_ctx, nand_cmd, "write", handle_nand_write_command, COMMAND_EXEC,
 292                                                  "write to NAND flash device <num> <filename> <offset> [oob_raw|oob_only]");
 293                 register_command(cmd_ctx, nand_cmd, "raw_access", handle_nand_raw_access_command, COMMAND_EXEC,
 294                                                  "raw access to NAND flash device <num> ['enable'|'disable']");
 295         }
 296
 297         return ERROR_OK;
 298 }
 299
 300 nand_device_t *get_nand_device_by_num(int num)
 301 {
 302         nand_device_t *p;
 303         int i = 0;
 304
 305         for (p = nand_devices; p; p = p->next)
 306         {
 307                 if (i++ == num)
 308                 {
 309                         return p;
 310                 }
 311         }
 312
 313         return NULL;
 314 }
 315
 316 int nand_build_bbt(struct nand_device_s *device, int first, int last)
 317 {
 318         u32 page = 0x0;
 319         int i;
 320         u8 oob[6];
 321
 322         if ((first < 0) || (first >= device->num_blocks))
 323                 first = 0;
 324
 325         if ((last >= device->num_blocks) || (last == -1))
 326                 last = device->num_blocks - 1;
 327
 328         for (i = first; i < last; i++)
 329         {
 330                 nand_read_page(device, page, NULL, 0, oob, 6);
 331
 332                 if (((device->device->options & NAND_BUSWIDTH_16) && ((oob[0] & oob[1]) != 0xff))
 333                         || (((device->page_size == 512) && (oob[5] != 0xff)) ||
 334                                 ((device->page_size == 2048) && (oob[0] != 0xff))))
 335                 {
 336                         LOG_WARNING("invalid block: %i", i);
 337                         device->blocks[i].is_bad = 1;
 338                 }
 339                 else
 340                 {
 341                         device->blocks[i].is_bad = 0;
 342                 }
 343
 344                 page += (device->erase_size / device->page_size);
 345         }
 346
 347         return ERROR_OK;
 348 }
 349
 350 int nand_read_status(struct nand_device_s *device, u8 *status)
 351 {
 352         if (!device->device)
 353                 return ERROR_NAND_DEVICE_NOT_PROBED;
 354
 355         /* Send read status command */
 356         device->controller->command(device, NAND_CMD_STATUS);
 357
 358         alive_sleep(1);
 359
 360         /* read status */
 361         if (device->device->options & NAND_BUSWIDTH_16)
 362         {
 363                 u16 data;
 364                 device->controller->read_data(device, &data);
 365                 *status = data & 0xff;
 366         }
 367         else
 368         {
 369                 device->controller->read_data(device, status);
 370         }
 371
 372         return ERROR_OK;
 373 }
 374
 375 int nand_poll_ready(struct nand_device_s *device, int timeout)
 376 {
 377         u8 status;
 378
 379         device->controller->command(device, NAND_CMD_STATUS);
 380         do {
 381                 if (device->device->options & NAND_BUSWIDTH_16) {
 382                         u16 data;
 383                         device->controller->read_data(device, &data);
 384                         status = data & 0xff;
 385                 } else {
 386                         device->controller->read_data(device, &status);
 387                 }
 388                 if (status & NAND_STATUS_READY)
 389                         break;
 390                 alive_sleep(1);
 391         } while (timeout--);
 392
 393         return (status & NAND_STATUS_READY) != 0;
 394 }
 395
 396 int nand_probe(struct nand_device_s *device)
 397 {
 398         u8 manufacturer_id, device_id;
 399         u8 id_buff[6];
 400         int retval;
 401         int i;
 402
 403         /* clear device data */
 404         device->device = NULL;
 405         device->manufacturer = NULL;
 406
 407         /* clear device parameters */
 408         device->bus_width = 0;
 409         device->address_cycles = 0;
 410         device->page_size = 0;
 411         device->erase_size = 0;
 412
 413         /* initialize controller (device parameters are zero, use controller default) */
 414         if ((retval = device->controller->init(device) != ERROR_OK))
 415         {
 416                 switch (retval)
 417                 {
 418                         case ERROR_NAND_OPERATION_FAILED:
 419                                 LOG_DEBUG("controller initialization failed");
 420                                 return ERROR_NAND_OPERATION_FAILED;
 421                         case ERROR_NAND_OPERATION_NOT_SUPPORTED:
 422                                 LOG_ERROR("BUG: controller reported that it doesn't support default parameters");
 423                                 return ERROR_NAND_OPERATION_FAILED;
 424                         default:
 425                                 LOG_ERROR("BUG: unknown controller initialization failure");
 426                                 return ERROR_NAND_OPERATION_FAILED;
 427                 }
 428         }
 429
 430         device->controller->command(device, NAND_CMD_RESET);
 431         device->controller->reset(device);
 432
 433         device->controller->command(device, NAND_CMD_READID);
 434         device->controller->address(device, 0x0);
 435
 436         if (device->bus_width == 8)
 437         {
 438                 device->controller->read_data(device, &manufacturer_id);
 439                 device->controller->read_data(device, &device_id);
 440         }
 441         else
 442         {
 443                 u16 data_buf;
 444                 device->controller->read_data(device, &data_buf);
 445                 manufacturer_id = data_buf & 0xff;
 446                 device->controller->read_data(device, &data_buf);
 447                 device_id = data_buf & 0xff;
 448         }
 449
 450         for (i = 0; nand_flash_ids[i].name; i++)
 451         {
 452                 if (nand_flash_ids[i].id == device_id)
 453                 {
 454                         device->device = &nand_flash_ids[i];
 455                         break;
 456                 }
 457         }
 458
 459         for (i = 0; nand_manuf_ids[i].name; i++)
 460         {
 461                 if (nand_manuf_ids[i].id == manufacturer_id)
 462                 {
 463                         device->manufacturer = &nand_manuf_ids[i];
 464                         break;
 465                 }
 466         }
 467
 468         if (!device->manufacturer)
 469         {
 470                 device->manufacturer = &nand_manuf_ids[0];
 471                 device->manufacturer->id = manufacturer_id;
 472         }
 473
 474         if (!device->device)
 475         {
 476                 LOG_ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
 477                         manufacturer_id, device_id);
 478                 return ERROR_NAND_OPERATION_FAILED;
 479         }
 480
 481         LOG_DEBUG("found %s (%s)", device->device->name, device->manufacturer->name);
 482
 483         /* initialize device parameters */
 484
 485         /* bus width */
 486         if (device->device->options & NAND_BUSWIDTH_16)
 487                 device->bus_width = 16;
 488         else
 489                 device->bus_width = 8;
 490
 491         /* Do we need extended device probe information? */
 492         if (device->device->page_size == 0 ||
 493             device->device->erase_size == 0)
 494         {
 495                 if (device->bus_width == 8)
 496                 {
 497                         device->controller->read_data(device, id_buff+3);
 498                         device->controller->read_data(device, id_buff+4);
 499                         device->controller->read_data(device, id_buff+5);
 500                 }
 501                 else
 502                 {
 503                         u16 data_buf;
 504
 505                         device->controller->read_data(device, &data_buf);
 506                         id_buff[3] = data_buf;
 507
 508                         device->controller->read_data(device, &data_buf);
 509                         id_buff[4] = data_buf;
 510
 511                         device->controller->read_data(device, &data_buf);
 512                         id_buff[5] = data_buf >> 8;
 513                 }
 514         }
 515
 516         /* page size */
 517         if (device->device->page_size == 0)
 518         {
 519                 device->page_size = 1 << (10 + (id_buff[4] & 3));
 520         }
 521         else if (device->device->page_size == 256)
 522         {
 523                 LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
 524                 return ERROR_NAND_OPERATION_FAILED;
 525         }
 526         else
 527         {
 528                 device->page_size = device->device->page_size;
 529         }
 530
 531         /* number of address cycles */
 532         if (device->page_size <= 512)
 533         {
 534                 /* small page devices */
 535                 if (device->device->chip_size <= 32)
 536                         device->address_cycles = 3;
 537                 else if (device->device->chip_size <= 8*1024)
 538                         device->address_cycles = 4;
 539                 else
 540                 {
 541                         LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
 542                         device->address_cycles = 5;
 543                 }
 544         }
 545         else
 546         {
 547                 /* large page devices */
 548                 if (device->device->chip_size <= 128)
 549                         device->address_cycles = 4;
 550                 else if (device->device->chip_size <= 32*1024)
 551                         device->address_cycles = 5;
 552                 else
 553                 {
 554                         LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
 555                         device->address_cycles = 6;
 556                 }
 557         }
 558
 559         /* erase size */
 560         if (device->device->erase_size == 0)
 561         {
 562                 switch ((id_buff[4] >> 4) & 3) {
 563                 case 0:
 564                         device->erase_size = 64 << 10;
 565                         break;
 566                 case 1:
 567                         device->erase_size = 128 << 10;
 568                         break;
 569                 case 2:
 570                         device->erase_size = 256 << 10;
 571                         break;
 572                 case 3:
 573                         device->erase_size =512 << 10;
 574                         break;
 575                 }
 576         }
 577         else
 578         {
 579                 device->erase_size = device->device->erase_size;
 580         }
 581
 582         /* initialize controller, but leave parameters at the controllers default */
 583         if ((retval = device->controller->init(device) != ERROR_OK))
 584         {
 585                 switch (retval)
 586                 {
 587                         case ERROR_NAND_OPERATION_FAILED:
 588                                 LOG_DEBUG("controller initialization failed");
 589                                 return ERROR_NAND_OPERATION_FAILED;
 590                         case ERROR_NAND_OPERATION_NOT_SUPPORTED:
 591                                 LOG_ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
 592                                         device->bus_width, device->address_cycles, device->page_size);
 593                                 return ERROR_NAND_OPERATION_FAILED;
 594                         default:
 595                                 LOG_ERROR("BUG: unknown controller initialization failure");
 596                                 return ERROR_NAND_OPERATION_FAILED;
 597                 }
 598         }
 599
 600         device->num_blocks = (device->device->chip_size * 1024) / (device->erase_size / 1024);
 601         device->blocks = malloc(sizeof(nand_block_t) * device->num_blocks);
 602
 603         for (i = 0; i < device->num_blocks; i++)
 604         {
 605                 device->blocks[i].size = device->erase_size;
 606                 device->blocks[i].offset = i * device->erase_size;
 607                 device->blocks[i].is_erased = -1;
 608                 device->blocks[i].is_bad = -1;
 609         }
 610
 611         return ERROR_OK;
 612 }
 613
 614 int nand_erase(struct nand_device_s *device, int first_block, int last_block)
 615 {
 616         int i;
 617         u32 page;
 618         u8 status;
 619         int retval;
 620
 621         if (!device->device)
 622                 return ERROR_NAND_DEVICE_NOT_PROBED;
 623
 624         if ((first_block < 0) || (last_block > device->num_blocks))
 625                 return ERROR_INVALID_ARGUMENTS;
 626
 627         /* make sure we know if a block is bad before erasing it */
 628         for (i = first_block; i <= last_block; i++)
 629         {
 630                 if (device->blocks[i].is_bad == -1)
 631                 {
 632                         nand_build_bbt(device, i, last_block);
 633                         break;
 634                 }
 635         }
 636
 637         for (i = first_block; i <= last_block; i++)
 638         {
 639                 /* Send erase setup command */
 640                 device->controller->command(device, NAND_CMD_ERASE1);
 641
 642                 page = i * (device->erase_size / device->page_size);
 643
 644                 /* Send page address */
 645                 if (device->page_size <= 512)
 646                 {
 647                         /* row */
 648                         device->controller->address(device, page & 0xff);
 649                         device->controller->address(device, (page >> 8) & 0xff);
 650
 651                         /* 3rd cycle only on devices with more than 32 MiB */
 652                         if (device->address_cycles >= 4)
 653                                 device->controller->address(device, (page >> 16) & 0xff);
 654
 655                         /* 4th cycle only on devices with more than 8 GiB */
 656                         if (device->address_cycles >= 5)
 657                                 device->controller->address(device, (page >> 24) & 0xff);
 658                 }
 659                 else
 660                 {
 661                         /* row */
 662                         device->controller->address(device, page & 0xff);
 663                         device->controller->address(device, (page >> 8) & 0xff);
 664
 665                         /* 3rd cycle only on devices with more than 128 MiB */
 666                         if (device->address_cycles >= 5)
 667                                 device->controller->address(device, (page >> 16) & 0xff);
 668                 }
 669
 670                 /* Send erase confirm command */
 671                 device->controller->command(device, NAND_CMD_ERASE2);
 672
 673                 retval = device->controller->nand_ready ?
 674                                 device->controller->nand_ready(device, 1000) :
 675                                 nand_poll_ready(device, 1000);
 676                 if (!retval) {
 677                         LOG_ERROR("timeout waiting for NAND flash block erase to complete");
 678                         return ERROR_NAND_OPERATION_TIMEOUT;
 679                 }
 680
 681                 if ((retval = nand_read_status(device, &status)) != ERROR_OK)
 682                 {
 683                         LOG_ERROR("couldn't read status");
 684                         return ERROR_NAND_OPERATION_FAILED;
 685                 }
 686
 687                 if (status & 0x1)
 688                 {
 689                         LOG_ERROR("erase operation didn't pass, status: 0x%2.2x", status);
 690                         return ERROR_NAND_OPERATION_FAILED;
 691                 }
 692         }
 693
 694         return ERROR_OK;
 695 }
 696
 697 int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size)
 698 {
 699         u8 *page;
 700
 701         if (!device->device)
 702                 return ERROR_NAND_DEVICE_NOT_PROBED;
 703
 704         if (address % device->page_size)
 705         {
 706                 LOG_ERROR("reads need to be page aligned");
 707                 return ERROR_NAND_OPERATION_FAILED;
 708         }
 709
 710         page = malloc(device->page_size);
 711
 712         while (data_size > 0 )
 713         {
 714                 u32 thisrun_size = (data_size > device->page_size) ? device->page_size : data_size;
 715                 u32 page_address;
 716
 717
 718                 page_address = address / device->page_size;
 719
 720                 nand_read_page(device, page_address, page, device->page_size, NULL, 0);
 721
 722                 memcpy(data, page, thisrun_size);
 723
 724                 address += thisrun_size;
 725                 data += thisrun_size;
 726                 data_size -= thisrun_size;
 727         }
 728
 729         free(page);
 730
 731         return ERROR_OK;
 732 }
 733
 734 int nand_write_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size)
 735 {
 736         u8 *page;
 737
 738         if (!device->device)
 739                 return ERROR_NAND_DEVICE_NOT_PROBED;
 740
 741         if (address % device->page_size)
 742         {
 743                 LOG_ERROR("writes need to be page aligned");
 744                 return ERROR_NAND_OPERATION_FAILED;
 745         }
 746
 747         page = malloc(device->page_size);
 748
 749         while (data_size > 0 )
 750         {
 751                 u32 thisrun_size = (data_size > device->page_size) ? device->page_size : data_size;
 752                 u32 page_address;
 753
 754                 memset(page, 0xff, device->page_size);
 755                 memcpy(page, data, thisrun_size);
 756
 757                 page_address = address / device->page_size;
 758
 759                 nand_write_page(device, page_address, page, device->page_size, NULL, 0);
 760
 761                 address += thisrun_size;
 762                 data += thisrun_size;
 763                 data_size -= thisrun_size;
 764         }
 765
 766         free(page);
 767
 768         return ERROR_OK;
 769 }
 770
 771 int nand_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
 772 {
 773         if (!device->device)
 774                 return ERROR_NAND_DEVICE_NOT_PROBED;
 775
 776         if (device->use_raw || device->controller->write_page == NULL)
 777                 return nand_write_page_raw(device, page, data, data_size, oob, oob_size);
 778         else
 779                 return device->controller->write_page(device, page, data, data_size, oob, oob_size);
 780 }
 781
 782 int nand_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
 783 {
 784         if (!device->device)
 785                 return ERROR_NAND_DEVICE_NOT_PROBED;
 786
 787         if (device->use_raw || device->controller->read_page == NULL)
 788                 return nand_read_page_raw(device, page, data, data_size, oob, oob_size);
 789         else
 790                 return device->controller->read_page(device, page, data, data_size, oob, oob_size);
 791 }
 792
 793 int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
 794 {
 795         int i;
 796
 797         if (!device->device)
 798                 return ERROR_NAND_DEVICE_NOT_PROBED;
 799
 800         if (device->page_size <= 512)
 801         {
 802                 /* small page device */
 803                 if (data)
 804                         device->controller->command(device, NAND_CMD_READ0);
 805                 else
 806                         device->controller->command(device, NAND_CMD_READOOB);
 807
 808                 /* column (always 0, we start at the beginning of a page/OOB area) */
 809                 device->controller->address(device, 0x0);
 810
 811                 /* row */
 812                 device->controller->address(device, page & 0xff);
 813                 device->controller->address(device, (page >> 8) & 0xff);
 814
 815                 /* 4th cycle only on devices with more than 32 MiB */
 816                 if (device->address_cycles >= 4)
 817                         device->controller->address(device, (page >> 16) & 0xff);
 818
 819                 /* 5th cycle only on devices with more than 8 GiB */
 820                 if (device->address_cycles >= 5)
 821                         device->controller->address(device, (page >> 24) & 0xff);
 822         }
 823         else
 824         {
 825                 /* large page device */
 826                 device->controller->command(device, NAND_CMD_READ0);
 827
 828                 /* column (0 when we start at the beginning of a page,
 829                  * or 2048 for the beginning of OOB area)
 830                  */
 831                 device->controller->address(device, 0x0);
 832                 if (data)
 833                         device->controller->address(device, 0x0);
 834                 else
 835                         device->controller->address(device, 0x8);
 836
 837                 /* row */
 838                 device->controller->address(device, page & 0xff);
 839                 device->controller->address(device, (page >> 8) & 0xff);
 840
 841                 /* 5th cycle only on devices with more than 128 MiB */
 842                 if (device->address_cycles >= 5)
 843                         device->controller->address(device, (page >> 16) & 0xff);
 844
 845                 /* large page devices need a start command */
 846                 device->controller->command(device, NAND_CMD_READSTART);
 847         }
 848
 849         if (device->controller->nand_ready) {
 850                 if (!device->controller->nand_ready(device, 100))
 851                         return ERROR_NAND_OPERATION_TIMEOUT;
 852         } else {
 853                 alive_sleep(1);
 854         }
 855
 856         if (data)
 857         {
 858                 if (device->controller->read_block_data != NULL)
 859                         (device->controller->read_block_data)(device, data, data_size);
 860                 else
 861                 {
 862                         for (i = 0; i < data_size;)
 863                         {
 864                                 if (device->device->options & NAND_BUSWIDTH_16)
 865                                 {
 866                                         device->controller->read_data(device, data);
 867                                         data += 2;
 868                                         i += 2;
 869                                 }
 870                                 else
 871                                 {
 872                                         device->controller->read_data(device, data);
 873                                         data += 1;
 874                                         i += 1;
 875                                 }
 876                         }
 877                 }
 878         }
 879
 880         if (oob)
 881         {
 882                 if (device->controller->read_block_data != NULL)
 883                         (device->controller->read_block_data)(device, oob, oob_size);
 884                 else
 885                 {
 886                         for (i = 0; i < oob_size;)
 887                         {
 888                                 if (device->device->options & NAND_BUSWIDTH_16)
 889                                 {
 890                                         device->controller->read_data(device, oob);
 891                                         oob += 2;
 892                                         i += 2;
 893                                 }
 894                                 else
 895                                 {
 896                                         device->controller->read_data(device, oob);
 897                                         oob += 1;
 898                                         i += 1;
 899                                 }
 900                         }
 901                 }
 902         }
 903
 904         return ERROR_OK;
 905 }
 906
 907 int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
 908 {
 909         int i;
 910         int retval;
 911         u8 status;
 912
 913         if (!device->device)
 914                 return ERROR_NAND_DEVICE_NOT_PROBED;
 915
 916         device->controller->command(device, NAND_CMD_SEQIN);
 917
 918         if (device->page_size <= 512)
 919         {
 920                 /* column (always 0, we start at the beginning of a page/OOB area) */
 921                 device->controller->address(device, 0x0);
 922
 923                 /* row */
 924                 device->controller->address(device, page & 0xff);
 925                 device->controller->address(device, (page >> 8) & 0xff);
 926
 927                 /* 4th cycle only on devices with more than 32 MiB */
 928                 if (device->address_cycles >= 4)
 929                         device->controller->address(device, (page >> 16) & 0xff);
 930
 931                 /* 5th cycle only on devices with more than 8 GiB */
 932                 if (device->address_cycles >= 5)
 933                         device->controller->address(device, (page >> 24) & 0xff);
 934         }
 935         else
 936         {
 937                 /* column (0 when we start at the beginning of a page,
 938                  * or 2048 for the beginning of OOB area)
 939                  */
 940                 device->controller->address(device, 0x0);
 941                 if (data)
 942                         device->controller->address(device, 0x0);
 943                 else
 944                         device->controller->address(device, 0x8);
 945
 946                 /* row */
 947                 device->controller->address(device, page & 0xff);
 948                 device->controller->address(device, (page >> 8) & 0xff);
 949
 950                 /* 5th cycle only on devices with more than 128 MiB */
 951                 if (device->address_cycles >= 5)
 952                         device->controller->address(device, (page >> 16) & 0xff);
 953         }
 954
 955         if (data)
 956         {
 957                 if (device->controller->write_block_data != NULL)
 958                         (device->controller->write_block_data)(device, data, data_size);
 959                 else
 960                 {
 961                         for (i = 0; i < data_size;)
 962                         {
 963                                 if (device->device->options & NAND_BUSWIDTH_16)
 964                                 {
 965                                         u16 data_buf = le_to_h_u16(data);
 966                                         device->controller->write_data(device, data_buf);
 967                                         data += 2;
 968                                         i += 2;
 969                                 }
 970                                 else
 971                                 {
 972                                         device->controller->write_data(device, *data);
 973                                         data += 1;
 974                                         i += 1;
 975                                 }
 976                         }
 977                 }
 978         }
 979
 980         if (oob)
 981         {
 982                 if (device->controller->write_block_data != NULL)
 983                         (device->controller->write_block_data)(device, oob, oob_size);
 984                 else
 985                 {
 986                         for (i = 0; i < oob_size;)
 987                         {
 988                                 if (device->device->options & NAND_BUSWIDTH_16)
 989                                 {
 990                                         u16 oob_buf = le_to_h_u16(data);
 991                                         device->controller->write_data(device, oob_buf);
 992                                         oob += 2;
 993                                         i += 2;
 994                                 }
 995                                 else
 996                                 {
 997                                         device->controller->write_data(device, *oob);
 998                                         oob += 1;
 999                                         i += 1;
1000                                 }
1001                         }
1002                 }
1003         }
1004
1005         device->controller->command(device, NAND_CMD_PAGEPROG);
1006
1007         retval = device->controller->nand_ready ?
1008                         device->controller->nand_ready(device, 100) :
1009                         nand_poll_ready(device, 100);
1010         if (!retval)
1011                 return ERROR_NAND_OPERATION_TIMEOUT;
1012
1013         if ((retval = nand_read_status(device, &status)) != ERROR_OK)
1014         {
1015                 LOG_ERROR("couldn't read status");
1016                 return ERROR_NAND_OPERATION_FAILED;
1017         }
1018
1019         if (status & NAND_STATUS_FAIL)
1020         {
1021                 LOG_ERROR("write operation didn't pass, status: 0x%2.2x", status);
1022                 return ERROR_NAND_OPERATION_FAILED;
1023         }
1024
1025         return ERROR_OK;
1026 }
1027
1028 int handle_nand_list_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1029 {
1030         nand_device_t *p;
1031         int i = 0;
1032
1033         if (!nand_devices)
1034         {
1035                 command_print(cmd_ctx, "no NAND flash devices configured");
1036                 return ERROR_OK;
1037         }
1038
1039         for (p = nand_devices; p; p = p->next)
1040         {
1041                 if (p->device)
1042                         command_print(cmd_ctx, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
1043                                 i++, p->device->name, p->manufacturer->name, p->page_size, p->bus_width, p->erase_size);
1044                 else
1045                         command_print(cmd_ctx, "#%i: not probed");
1046         }
1047
1048         return ERROR_OK;
1049 }
1050
1051 int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1052 {
1053         nand_device_t *p;
1054         int i = 0;
1055         int j = 0;
1056         int first = -1;
1057         int last = -1;
1058
1059         if ((argc < 1) || (argc > 3))
1060         {
1061                 return ERROR_COMMAND_SYNTAX_ERROR;
1062
1063         }
1064
1065         if (argc == 2)
1066         {
1067                 first = last = strtoul(args[1], NULL, 0);
1068         }
1069         else if (argc == 3)
1070         {
1071                 first = strtoul(args[1], NULL, 0);
1072                 last = strtoul(args[2], NULL, 0);
1073         }
1074
1075         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1076         if (p)
1077         {
1078                 if (p->device)
1079                 {
1080                         if (first >= p->num_blocks)
1081                                 first = p->num_blocks - 1;
1082
1083                         if (last >= p->num_blocks)
1084                                 last = p->num_blocks - 1;
1085
1086                         command_print(cmd_ctx, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
1087                                 i++, p->device->name, p->manufacturer->name, p->page_size, p->bus_width, p->erase_size);
1088
1089                         for (j = first; j <= last; j++)
1090                         {
1091                                 char *erase_state, *bad_state;
1092
1093                                 if (p->blocks[j].is_erased == 0)
1094                                         erase_state = "not erased";
1095                                 else if (p->blocks[j].is_erased == 1)
1096                                         erase_state = "erased";
1097                                 else
1098                                         erase_state = "erase state unknown";
1099
1100                                 if (p->blocks[j].is_bad == 0)
1101                                         bad_state = "";
1102                                 else if (p->blocks[j].is_bad == 1)
1103                                         bad_state = " (marked bad)";
1104                                 else
1105                                         bad_state = " (block condition unknown)";
1106
1107                                 command_print(cmd_ctx, "\t#%i: 0x%8.8x (0x%xkB) %s%s",
1108                                                         j, p->blocks[j].offset, p->blocks[j].size / 1024,
1109                                                         erase_state, bad_state);
1110                         }
1111                 }
1112                 else
1113                 {
1114                         command_print(cmd_ctx, "#%i: not probed");
1115                 }
1116         }
1117
1118         return ERROR_OK;
1119 }
1120
1121 int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1122 {
1123         nand_device_t *p;
1124         int retval;
1125
1126         if (argc != 1)
1127         {
1128                 return ERROR_COMMAND_SYNTAX_ERROR;
1129         }
1130
1131         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1132         if (p)
1133         {
1134                 if ((retval = nand_probe(p)) == ERROR_OK)
1135                 {
1136                         command_print(cmd_ctx, "NAND flash device '%s' found", p->device->name);
1137                 }
1138                 else if (retval == ERROR_NAND_OPERATION_FAILED)
1139                 {
1140                         command_print(cmd_ctx, "probing failed for NAND flash device");
1141                 }
1142                 else
1143                 {
1144                         command_print(cmd_ctx, "unknown error when probing NAND flash device");
1145                 }
1146         }
1147         else
1148         {
1149                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1150         }
1151
1152         return ERROR_OK;
1153 }
1154
1155 int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1156 {
1157         nand_device_t *p;
1158         int retval;
1159
1160         if (argc != 3)
1161         {
1162                 return ERROR_COMMAND_SYNTAX_ERROR;
1163
1164         }
1165
1166         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1167         if (p)
1168         {
1169                 int first = strtoul(args[1], NULL, 0);
1170                 int last = strtoul(args[2], NULL, 0);
1171
1172                 if ((retval = nand_erase(p, first, last)) == ERROR_OK)
1173                 {
1174                         command_print(cmd_ctx, "successfully erased blocks %i to %i on NAND flash device '%s'", first, last, p->device->name);
1175                 }
1176                 else if (retval == ERROR_NAND_OPERATION_FAILED)
1177                 {
1178                         command_print(cmd_ctx, "erase failed");
1179                 }
1180                 else
1181                 {
1182                         command_print(cmd_ctx, "unknown error when erasing NAND flash device");
1183                 }
1184         }
1185         else
1186         {
1187                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1188         }
1189
1190         return ERROR_OK;
1191 }
1192
1193 int handle_nand_check_bad_blocks_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1194 {
1195         nand_device_t *p;
1196         int retval;
1197         int first = -1;
1198         int last = -1;
1199
1200         if ((argc < 1) || (argc > 3) || (argc == 2))
1201         {
1202                 return ERROR_COMMAND_SYNTAX_ERROR;
1203
1204         }
1205
1206         if (argc == 3)
1207         {
1208                 first = strtoul(args[1], NULL, 0);
1209                 last = strtoul(args[2], NULL, 0);
1210         }
1211
1212         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1213         if (p)
1214         {
1215                 if ((retval = nand_build_bbt(p, first, last)) == ERROR_OK)
1216                 {
1217                         command_print(cmd_ctx, "checked NAND flash device for bad blocks, use \"nand info\" command to list blocks", p->device->name);
1218                 }
1219                 else if (retval == ERROR_NAND_OPERATION_FAILED)
1220                 {
1221                         command_print(cmd_ctx, "error when checking for bad blocks on NAND flash device");
1222                 }
1223                 else
1224                 {
1225                         command_print(cmd_ctx, "unknown error when checking for bad blocks on NAND flash device");
1226                 }
1227         }
1228         else
1229         {
1230                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1231         }
1232
1233         return ERROR_OK;
1234 }
1235
1236 int handle_nand_copy_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1237 {
1238         nand_device_t *p;
1239
1240         if (argc != 4)
1241         {
1242                 return ERROR_COMMAND_SYNTAX_ERROR;
1243
1244         }
1245
1246         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1247         if (p)
1248         {
1249
1250         }
1251         else
1252         {
1253                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1254         }
1255
1256         return ERROR_OK;
1257 }
1258
1259 int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1260 {
1261         u32 offset;
1262         u32 binary_size;
1263         u32 buf_cnt;
1264         enum oob_formats oob_format = NAND_OOB_NONE;
1265
1266         fileio_t fileio;
1267
1268         duration_t duration;
1269         char *duration_text;
1270
1271         nand_device_t *p;
1272
1273         if (argc < 3)
1274         {
1275                 return ERROR_COMMAND_SYNTAX_ERROR;
1276
1277         }
1278
1279         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1280         if (p)
1281         {
1282                 u8 *page = NULL;
1283                 u32 page_size = 0;
1284                 u8 *oob = NULL;
1285                 u32 oob_size = 0;
1286
1287                 offset = strtoul(args[2], NULL, 0);
1288
1289                 if (argc > 3)
1290                 {
1291                         int i;
1292                         for (i = 3; i < argc; i++)
1293                         {
1294                                 if (!strcmp(args[i], "oob_raw"))
1295                                         oob_format |= NAND_OOB_RAW;
1296                                 else if (!strcmp(args[i], "oob_only"))
1297                                         oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY;
1298                                 else
1299                                 {
1300                                         command_print(cmd_ctx, "unknown option: %s", args[i]);
1301                                         return ERROR_COMMAND_SYNTAX_ERROR;
1302                                 }
1303                         }
1304                 }
1305
1306                 duration_start_measure(&duration);
1307
1308                 if (fileio_open(&fileio, args[1], FILEIO_READ, FILEIO_BINARY) != ERROR_OK)
1309                 {
1310                         return ERROR_OK;
1311                 }
1312
1313                 buf_cnt = binary_size = fileio.size;
1314
1315                 if (!(oob_format & NAND_OOB_ONLY))
1316                 {
1317                         page_size = p->page_size;
1318                         page = malloc(p->page_size);
1319                 }
1320
1321                 if (oob_format & NAND_OOB_RAW)
1322                 {
1323                         if (p->page_size == 512)
1324                                 oob_size = 16;
1325                         else if (p->page_size == 2048)
1326                                 oob_size = 64;
1327                         oob = malloc(oob_size);
1328                 }
1329
1330                 if (offset % p->page_size)
1331                 {
1332                         command_print(cmd_ctx, "only page size aligned offsets and sizes are supported");
1333                         fileio_close(&fileio);
1334                         free(oob);
1335                         free(page);
1336                         return ERROR_OK;
1337                 }
1338
1339                 while (buf_cnt > 0)
1340                 {
1341                         u32 size_read;
1342
1343                         if (NULL != page)
1344                         {
1345                                 fileio_read(&fileio, page_size, page, &size_read);
1346                                 buf_cnt -= size_read;
1347                                 if (size_read < page_size)
1348                                 {
1349                                         memset(page + size_read, 0xff, page_size - size_read);
1350                                 }
1351                         }
1352
1353                         if (NULL != oob)
1354                         {
1355                                 fileio_read(&fileio, oob_size, oob, &size_read);
1356                                 buf_cnt -= size_read;
1357                                 if (size_read < oob_size)
1358                                 {
1359                                         memset(oob + size_read, 0xff, oob_size - size_read);
1360                                 }
1361                         }
1362
1363                         if (nand_write_page(p, offset / p->page_size, page, page_size, oob, oob_size) != ERROR_OK)
1364                         {
1365                                 command_print(cmd_ctx, "failed writing file %s to NAND flash %s at offset 0x%8.8x",
1366                                         args[1], args[0], offset);
1367
1368                                 fileio_close(&fileio);
1369                                 free(oob);
1370                                 free(page);
1371
1372                                 return ERROR_OK;
1373                         }
1374                         offset += page_size;
1375                 }
1376
1377                 fileio_close(&fileio);
1378                 free(oob);
1379                 free(page);
1380                 oob = NULL;
1381                 page = NULL;
1382                 duration_stop_measure(&duration, &duration_text);
1383                 command_print(cmd_ctx, "wrote file %s to NAND flash %s up to offset 0x%8.8x in %s",
1384                         args[1], args[0], offset, duration_text);
1385                 free(duration_text);
1386                 duration_text = NULL;
1387         }
1388         else
1389         {
1390                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1391         }
1392
1393         return ERROR_OK;
1394 }
1395
1396 int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1397 {
1398         nand_device_t *p;
1399
1400         if (argc < 4)
1401         {
1402                 return ERROR_COMMAND_SYNTAX_ERROR;
1403         }
1404
1405         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1406         if (p)
1407         {
1408                 if (p->device)
1409                 {
1410                         fileio_t fileio;
1411                         duration_t duration;
1412                         char *duration_text;
1413                         int retval;
1414
1415                         u8 *page = NULL;
1416                         u32 page_size = 0;
1417                         u8 *oob = NULL;
1418                         u32 oob_size = 0;
1419                         u32 address = strtoul(args[2], NULL, 0);
1420                         u32 size = strtoul(args[3], NULL, 0);
1421                         u32 bytes_done = 0;
1422                         enum oob_formats oob_format = NAND_OOB_NONE;
1423
1424                         if (argc > 4)
1425                         {
1426                                 int i;
1427                                 for (i = 4; i < argc; i++)
1428                                 {
1429                                         if (!strcmp(args[i], "oob_raw"))
1430                                                 oob_format |= NAND_OOB_RAW;
1431                                         else if (!strcmp(args[i], "oob_only"))
1432                                                 oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY;
1433                                         else
1434                                                 command_print(cmd_ctx, "unknown option: '%s'", args[i]);
1435                                 }
1436                         }
1437
1438                         if ((address % p->page_size) || (size % p->page_size))
1439                         {
1440                                 command_print(cmd_ctx, "only page size aligned addresses and sizes are supported");
1441                                 return ERROR_OK;
1442                         }
1443
1444                         if (!(oob_format & NAND_OOB_ONLY))
1445                         {
1446                                 page_size = p->page_size;
1447                                 page = malloc(p->page_size);
1448                         }
1449
1450                         if (oob_format & NAND_OOB_RAW)
1451                         {
1452                                 if (p->page_size == 512)
1453                                         oob_size = 16;
1454                                 else if (p->page_size == 2048)
1455                                         oob_size = 64;
1456                                 oob = malloc(oob_size);
1457                         }
1458
1459                         if (fileio_open(&fileio, args[1], FILEIO_WRITE, FILEIO_BINARY) != ERROR_OK)
1460                         {
1461                                 return ERROR_OK;
1462                         }
1463
1464                         duration_start_measure(&duration);
1465
1466                         while (size > 0)
1467                         {
1468                                 u32 size_written;
1469                                 if ((retval = nand_read_page(p, address / p->page_size, page, page_size, oob, oob_size)) != ERROR_OK)
1470                                 {
1471                                         command_print(cmd_ctx, "reading NAND flash page failed");
1472                                         free(page);
1473                                         free(oob);
1474                                         fileio_close(&fileio);
1475                                         return ERROR_OK;
1476                                 }
1477
1478                                 if (NULL != page)
1479                                 {
1480                                         fileio_write(&fileio, page_size, page, &size_written);
1481                                         bytes_done += page_size;
1482                                 }
1483
1484                                 if (NULL != oob)
1485                                 {
1486                                         fileio_write(&fileio, oob_size, oob, &size_written);
1487                                         bytes_done += oob_size;
1488                                 }
1489
1490                                 size -= p->page_size;
1491                                 address += p->page_size;
1492                         }
1493
1494                         free(page);
1495                         page = NULL;
1496                         free(oob);
1497                         oob = NULL;
1498                         fileio_close(&fileio);
1499
1500                         duration_stop_measure(&duration, &duration_text);
1501                         command_print(cmd_ctx, "dumped %"PRIi64" byte in %s", fileio.size, duration_text);
1502                         free(duration_text);
1503                         duration_text = NULL;
1504                 }
1505                 else
1506                 {
1507                         command_print(cmd_ctx, "#%i: not probed");
1508                 }
1509         }
1510         else
1511         {
1512                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1513         }
1514
1515         return ERROR_OK;
1516 }
1517
1518 int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1519 {
1520         nand_device_t *p;
1521
1522         if ((argc < 1) || (argc > 2))
1523         {
1524                 return ERROR_COMMAND_SYNTAX_ERROR;
1525         }
1526
1527         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1528         if (p)
1529         {
1530                 if (p->device)
1531                 {
1532                         if (argc == 2)
1533                         {
1534                                 if (strcmp("enable", args[1]) == 0)
1535                                 {
1536                                         p->use_raw = 1;
1537                                 }
1538                                 else if (strcmp("disable", args[1]) == 0)
1539                                 {
1540                                         p->use_raw = 0;
1541                                 }
1542                                 else
1543                                 {
1544                                         return ERROR_COMMAND_SYNTAX_ERROR;
1545                                 }
1546                         }
1547
1548                         command_print(cmd_ctx, "raw access is %s", (p->use_raw) ? "enabled" : "disabled");
1549                 }
1550                 else
1551                 {
1552                         command_print(cmd_ctx, "#%i: not probed");
1553                 }
1554         }
1555         else
1556         {
1557                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1558         }
1559
1560         return ERROR_OK;
1561 }