git.sur5r.net Git - openocd/blob - src/flash/nand.c

   1 /***************************************************************************
   2  *   Copyright (C) 2007 by Dominic Rath                                    *
   3  *   Dominic.Rath@gmx.de                                                   *
   4  *                                                                         *
   5  *   partially based on                                                    *
   6  *       drivers/mtd/nand_ids.c                                                *
   7  *                                                                         *
   8  *   Copyright (C) 2002 Thomas Gleixner (tglx@linutronix.de)               *
   9  *                                                                         *
  10  *   This program is free software; you can redistribute it and/or modify  *
  11  *   it under the terms of the GNU General Public License as published by  *
  12  *   the Free Software Foundation; either version 2 of the License, or     *
  13  *   (at your option) any later version.                                   *
  14  *                                                                         *
  15  *   This program is distributed in the hope that it will be useful,       *
  16  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  17  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  18  *   GNU General Public License for more details.                          *
  19  *                                                                         *
  20  *   You should have received a copy of the GNU General Public License     *
  21  *   along with this program; if not, write to the                         *
  22  *   Free Software Foundation, Inc.,                                       *
  23  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  24  ***************************************************************************/
  25 #ifdef HAVE_CONFIG_H
  26 #include "config.h"
  27 #endif
  28
  29 #include "replacements.h"
  30 #include "log.h"
  31
  32 #include <stdlib.h>
  33 #include <string.h>
  34 #include <inttypes.h>
  35
  36 #include <errno.h>
  37
  38 #include "nand.h"
  39 #include "flash.h"
  40 #include "time_support.h"
  41 #include "fileio.h"
  42 #include "image.h"
  43
  44 int nand_register_commands(struct command_context_s *cmd_ctx);
  45 int handle_nand_list_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  46 int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  47 int handle_nand_check_bad_blocks_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  48 int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  49 int handle_nand_copy_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  50 int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  51 int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  52 int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  53
  54 int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  55
  56 int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
  57 int nand_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
  58 int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size);
  59
  60 int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
  61 int nand_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
  62
  63 /* NAND flash controller
  64  */
  65 extern nand_flash_controller_t lpc3180_nand_controller;
  66 extern nand_flash_controller_t s3c2410_nand_controller;
  67 extern nand_flash_controller_t s3c2412_nand_controller;
  68 extern nand_flash_controller_t s3c2440_nand_controller;
  69 extern nand_flash_controller_t s3c2443_nand_controller;
  70
  71 /* extern nand_flash_controller_t boundary_scan_nand_controller; */
  72
  73 nand_flash_controller_t *nand_flash_controllers[] =
  74 {
  75         &lpc3180_nand_controller,
  76         &s3c2410_nand_controller,
  77         &s3c2412_nand_controller,
  78         &s3c2440_nand_controller,
  79         &s3c2443_nand_controller,
  80 /*      &boundary_scan_nand_controller, */
  81         NULL
  82 };
  83
  84 /* configured NAND devices and NAND Flash command handler */
  85 nand_device_t *nand_devices = NULL;
  86 static command_t *nand_cmd;
  87
  88 /*      Chip ID list
  89  *
  90  *      Name, ID code, pagesize, chipsize in MegaByte, eraseblock size,
  91  *      options
  92  *
  93  *      Pagesize; 0, 256, 512
  94  *      0       get this information from the extended chip ID
  95  *      256     256 Byte page size
  96  *      512     512 Byte page size
  97  */
  98 nand_info_t nand_flash_ids[] =
  99 {
 100         {"NAND 1MiB 5V 8-bit",          0x6e, 256, 1, 0x1000, 0},
 101         {"NAND 2MiB 5V 8-bit",          0x64, 256, 2, 0x1000, 0},
 102         {"NAND 4MiB 5V 8-bit",          0x6b, 512, 4, 0x2000, 0},
 103         {"NAND 1MiB 3,3V 8-bit",        0xe8, 256, 1, 0x1000, 0},
 104         {"NAND 1MiB 3,3V 8-bit",        0xec, 256, 1, 0x1000, 0},
 105         {"NAND 2MiB 3,3V 8-bit",        0xea, 256, 2, 0x1000, 0},
 106         {"NAND 4MiB 3,3V 8-bit",        0xd5, 512, 4, 0x2000, 0},
 107         {"NAND 4MiB 3,3V 8-bit",        0xe3, 512, 4, 0x2000, 0},
 108         {"NAND 4MiB 3,3V 8-bit",        0xe5, 512, 4, 0x2000, 0},
 109         {"NAND 8MiB 3,3V 8-bit",        0xd6, 512, 8, 0x2000, 0},
 110
 111         {"NAND 8MiB 1,8V 8-bit",        0x39, 512, 8, 0x2000, 0},
 112         {"NAND 8MiB 3,3V 8-bit",        0xe6, 512, 8, 0x2000, 0},
 113         {"NAND 8MiB 1,8V 16-bit",       0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16},
 114         {"NAND 8MiB 3,3V 16-bit",       0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16},
 115
 116         {"NAND 16MiB 1,8V 8-bit",       0x33, 512, 16, 0x4000, 0},
 117         {"NAND 16MiB 3,3V 8-bit",       0x73, 512, 16, 0x4000, 0},
 118         {"NAND 16MiB 1,8V 16-bit",      0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16},
 119         {"NAND 16MiB 3,3V 16-bit",      0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16},
 120
 121         {"NAND 32MiB 1,8V 8-bit",       0x35, 512, 32, 0x4000, 0},
 122         {"NAND 32MiB 3,3V 8-bit",       0x75, 512, 32, 0x4000, 0},
 123         {"NAND 32MiB 1,8V 16-bit",      0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16},
 124         {"NAND 32MiB 3,3V 16-bit",      0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16},
 125
 126         {"NAND 64MiB 1,8V 8-bit",       0x36, 512, 64, 0x4000, 0},
 127         {"NAND 64MiB 3,3V 8-bit",       0x76, 512, 64, 0x4000, 0},
 128         {"NAND 64MiB 1,8V 16-bit",      0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16},
 129         {"NAND 64MiB 3,3V 16-bit",      0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16},
 130
 131         {"NAND 128MiB 1,8V 8-bit",      0x78, 512, 128, 0x4000, 0},
 132         {"NAND 128MiB 1,8V 8-bit",      0x39, 512, 128, 0x4000, 0},
 133         {"NAND 128MiB 3,3V 8-bit",      0x79, 512, 128, 0x4000, 0},
 134         {"NAND 128MiB 1,8V 16-bit",     0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 135         {"NAND 128MiB 1,8V 16-bit",     0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 136         {"NAND 128MiB 3,3V 16-bit",     0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 137         {"NAND 128MiB 3,3V 16-bit",     0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 138
 139         {"NAND 256MiB 3,3V 8-bit",      0x71, 512, 256, 0x4000, 0},
 140
 141         {"NAND 64MiB 1,8V 8-bit",       0xA2, 0,  64, 0, LP_OPTIONS},
 142         {"NAND 64MiB 3,3V 8-bit",       0xF2, 0,  64, 0, LP_OPTIONS},
 143         {"NAND 64MiB 1,8V 16-bit",      0xB2, 0,  64, 0, LP_OPTIONS16},
 144         {"NAND 64MiB 3,3V 16-bit",      0xC2, 0,  64, 0, LP_OPTIONS16},
 145
 146         {"NAND 128MiB 1,8V 8-bit",      0xA1, 0, 128, 0, LP_OPTIONS},
 147         {"NAND 128MiB 3,3V 8-bit",      0xF1, 0, 128, 0, LP_OPTIONS},
 148         {"NAND 128MiB 1,8V 16-bit",     0xB1, 0, 128, 0, LP_OPTIONS16},
 149         {"NAND 128MiB 3,3V 16-bit",     0xC1, 0, 128, 0, LP_OPTIONS16},
 150
 151         {"NAND 256MiB 1,8V 8-bit",      0xAA, 0, 256, 0, LP_OPTIONS},
 152         {"NAND 256MiB 3,3V 8-bit",      0xDA, 0, 256, 0, LP_OPTIONS},
 153         {"NAND 256MiB 1,8V 16-bit",     0xBA, 0, 256, 0, LP_OPTIONS16},
 154         {"NAND 256MiB 3,3V 16-bit",     0xCA, 0, 256, 0, LP_OPTIONS16},
 155
 156         {"NAND 512MiB 1,8V 8-bit",      0xAC, 0, 512, 0, LP_OPTIONS},
 157         {"NAND 512MiB 3,3V 8-bit",      0xDC, 0, 512, 0, LP_OPTIONS},
 158         {"NAND 512MiB 1,8V 16-bit",     0xBC, 0, 512, 0, LP_OPTIONS16},
 159         {"NAND 512MiB 3,3V 16-bit",     0xCC, 0, 512, 0, LP_OPTIONS16},
 160
 161         {"NAND 1GiB 1,8V 8-bit",        0xA3, 0, 1024, 0, LP_OPTIONS},
 162         {"NAND 1GiB 3,3V 8-bit",        0xD3, 0, 1024, 0, LP_OPTIONS},
 163         {"NAND 1GiB 1,8V 16-bit",       0xB3, 0, 1024, 0, LP_OPTIONS16},
 164         {"NAND 1GiB 3,3V 16-bit",       0xC3, 0, 1024, 0, LP_OPTIONS16},
 165
 166         {"NAND 2GiB 1,8V 8-bit",        0xA5, 0, 2048, 0, LP_OPTIONS},
 167         {"NAND 2GiB 3,3V 8-bit",        0xD5, 0, 2048, 0, LP_OPTIONS},
 168         {"NAND 2GiB 1,8V 16-bit",       0xB5, 0, 2048, 0, LP_OPTIONS16},
 169         {"NAND 2GiB 3,3V 16-bit",       0xC5, 0, 2048, 0, LP_OPTIONS16},
 170
 171         {NULL, 0,}
 172 };
 173
 174 /* Manufacturer ID list
 175  */
 176 nand_manufacturer_t nand_manuf_ids[] =
 177 {
 178         {0x0, "unknown"},
 179         {NAND_MFR_TOSHIBA, "Toshiba"},
 180         {NAND_MFR_SAMSUNG, "Samsung"},
 181         {NAND_MFR_FUJITSU, "Fujitsu"},
 182         {NAND_MFR_NATIONAL, "National"},
 183         {NAND_MFR_RENESAS, "Renesas"},
 184         {NAND_MFR_STMICRO, "ST Micro"},
 185         {NAND_MFR_HYNIX, "Hynix"},
 186         {0x0, NULL},
 187 };
 188
 189 /* nand device <nand_controller> [controller options]
 190  */
 191 int handle_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
 192 {
 193         int i;
 194         int retval;
 195
 196         if (argc < 1)
 197         {
 198                 WARNING("incomplete flash device nand configuration");
 199                 return ERROR_FLASH_BANK_INVALID;
 200         }
 201
 202         for (i = 0; nand_flash_controllers[i]; i++)
 203         {
 204                 nand_device_t *p, *c;
 205
 206                 if (strcmp(args[0], nand_flash_controllers[i]->name) == 0)
 207                 {
 208                         /* register flash specific commands */
 209                         if (nand_flash_controllers[i]->register_commands(cmd_ctx) != ERROR_OK)
 210                         {
 211                                 ERROR("couldn't register '%s' commands", args[0]);
 212                                 exit(-1);
 213                         }
 214
 215                         c = malloc(sizeof(nand_device_t));
 216
 217                         c->controller = nand_flash_controllers[i];
 218                         c->controller_priv = NULL;
 219                         c->manufacturer = NULL;
 220                         c->device = NULL;
 221                         c->bus_width = 0;
 222                         c->address_cycles = 0;
 223                         c->page_size = 0;
 224                         c->use_raw = 0;
 225                         c->next = NULL;
 226
 227                         if ((retval = nand_flash_controllers[i]->nand_device_command(cmd_ctx, cmd, args, argc, c)) != ERROR_OK)
 228                         {
 229                                 ERROR("'%s' driver rejected nand flash", c->controller->name);
 230                                 free(c);
 231                                 return ERROR_OK;
 232                         }
 233
 234                         /* put NAND device in linked list */
 235                         if (nand_devices)
 236                         {
 237                                 /* find last flash device */
 238                                 for (p = nand_devices; p && p->next; p = p->next);
 239                                 if (p)
 240                                         p->next = c;
 241                         }
 242                         else
 243                         {
 244                                 nand_devices = c;
 245                         }
 246
 247                         return ERROR_OK;
 248                 }
 249         }
 250
 251         /* no valid NAND controller was found (i.e. the configuration option,
 252          * didn't match one of the compiled-in controllers)
 253          */
 254         ERROR("No valid NAND flash controller found (%s)", args[0]);
 255         ERROR("compiled-in NAND flash controllers:");
 256         for (i = 0; nand_flash_controllers[i]; i++)
 257         {
 258                 ERROR("%i: %s", i, nand_flash_controllers[i]->name);
 259         }
 260
 261         return ERROR_OK;
 262 }
 263
 264 int nand_register_commands(struct command_context_s *cmd_ctx)
 265 {
 266         nand_cmd = register_command(cmd_ctx, NULL, "nand", NULL, COMMAND_ANY, "NAND specific commands");
 267
 268         register_command(cmd_ctx, nand_cmd, "device", handle_nand_device_command, COMMAND_CONFIG, NULL);
 269
 270         return ERROR_OK;
 271 }
 272
 273 int nand_init(struct command_context_s *cmd_ctx)
 274 {
 275         if (nand_devices)
 276         {
 277                 register_command(cmd_ctx, nand_cmd, "list", handle_nand_list_command, COMMAND_EXEC,
 278                                                  "list configured NAND flash devices");
 279                 register_command(cmd_ctx, nand_cmd, "info", handle_nand_info_command, COMMAND_EXEC,
 280                                                  "print info about NAND flash device <num>");
 281                 register_command(cmd_ctx, nand_cmd, "probe", handle_nand_probe_command, COMMAND_EXEC,
 282                                                  "identify NAND flash device <num>");
 283                 register_command(cmd_ctx, nand_cmd, "check_bad_blocks", handle_nand_check_bad_blocks_command, COMMAND_EXEC,
 284                                                  "check NAND flash device <num> for bad blocks [<first> <last>]");
 285                 register_command(cmd_ctx, nand_cmd, "erase", handle_nand_erase_command, COMMAND_EXEC,
 286                                                  "erase blocks on NAND flash device <num> <first> <last>");
 287                 register_command(cmd_ctx, nand_cmd, "copy", handle_nand_copy_command, COMMAND_EXEC,
 288                                                  "copy from NAND flash device <num> <offset> <length> <ram-address>");
 289                 register_command(cmd_ctx, nand_cmd, "dump", handle_nand_dump_command, COMMAND_EXEC,
 290                                                  "dump from NAND flash device <num> <filename> <offset> <size> [options]");
 291                 register_command(cmd_ctx, nand_cmd, "write", handle_nand_write_command, COMMAND_EXEC,
 292                                                  "write to NAND flash device <num> <filename> <offset> [options]");
 293                 register_command(cmd_ctx, nand_cmd, "raw_access", handle_nand_raw_access_command, COMMAND_EXEC,
 294                                                  "raw access to NAND flash device <num> ['enable'|'disable']");
 295         }
 296
 297         return ERROR_OK;
 298 }
 299
 300 nand_device_t *get_nand_device_by_num(int num)
 301 {
 302         nand_device_t *p;
 303         int i = 0;
 304
 305         for (p = nand_devices; p; p = p->next)
 306         {
 307                 if (i++ == num)
 308                 {
 309                         return p;
 310                 }
 311         }
 312
 313         return NULL;
 314 }
 315
 316 int nand_build_bbt(struct nand_device_s *device, int first, int last)
 317 {
 318         u32 page = 0x0;
 319         int i;
 320         u8 *oob;
 321
 322         oob = malloc(6);
 323
 324         if ((first < 0) || (first >= device->num_blocks))
 325                 first = 0;
 326
 327         if ((last >= device->num_blocks) || (last == -1))
 328                 last = device->num_blocks - 1;
 329
 330         for (i = first; i < last; i++)
 331         {
 332                 nand_read_page(device, page, NULL, 0, oob, 6);
 333
 334                 if (((device->device->options & NAND_BUSWIDTH_16) && ((oob[0] & oob[1]) != 0xff))
 335                         || (((device->page_size == 512) && (oob[5] != 0xff)) ||
 336                                 ((device->page_size == 2048) && (oob[0] != 0xff))))
 337                 {
 338                         WARNING("invalid block: %i", i);
 339                         device->blocks[i].is_bad = 1;
 340                 }
 341                 else
 342                 {
 343                         device->blocks[i].is_bad = 0;
 344                 }
 345
 346                 page += (device->erase_size / device->page_size);
 347         }
 348
 349         return ERROR_OK;
 350 }
 351
 352 int nand_read_status(struct nand_device_s *device, u8 *status)
 353 {
 354         if (!device->device)
 355                 return ERROR_NAND_DEVICE_NOT_PROBED;
 356
 357         /* Send read status command */
 358         device->controller->command(device, NAND_CMD_STATUS);
 359
 360         usleep(1000);
 361
 362         /* read status */
 363         if (device->device->options & NAND_BUSWIDTH_16)
 364         {
 365                 u16 data;
 366                 device->controller->read_data(device, &data);
 367                 *status = data & 0xff;
 368         }
 369         else
 370         {
 371                 device->controller->read_data(device, status);
 372         }
 373
 374         return ERROR_OK;
 375 }
 376
 377 int nand_probe(struct nand_device_s *device)
 378 {
 379         u8 manufacturer_id, device_id;
 380         int retval;
 381         int i;
 382
 383         /* clear device data */
 384         device->device = NULL;
 385         device->manufacturer = NULL;
 386
 387         /* clear device parameters */
 388         device->bus_width = 0;
 389         device->address_cycles = 0;
 390         device->page_size = 0;
 391         device->erase_size = 0;
 392
 393         /* initialize controller (device parameters are zero, use controller default) */
 394         if ((retval = device->controller->init(device) != ERROR_OK))
 395         {
 396                 switch (retval)
 397                 {
 398                         case ERROR_NAND_OPERATION_FAILED:
 399                                 DEBUG("controller initialization failed");
 400                                 return ERROR_NAND_OPERATION_FAILED;
 401                         case ERROR_NAND_OPERATION_NOT_SUPPORTED:
 402                                 ERROR("BUG: controller reported that it doesn't support default parameters");
 403                                 return ERROR_NAND_OPERATION_FAILED;
 404                         default:
 405                                 ERROR("BUG: unknown controller initialization failure");
 406                                 return ERROR_NAND_OPERATION_FAILED;
 407                 }
 408         }
 409
 410         device->controller->command(device, NAND_CMD_RESET);
 411         device->controller->reset(device);
 412
 413         device->controller->command(device, NAND_CMD_READID);
 414         device->controller->address(device, 0x0);
 415
 416         if (device->bus_width == 8)
 417         {
 418                 device->controller->read_data(device, &manufacturer_id);
 419                 device->controller->read_data(device, &device_id);
 420         }
 421         else
 422         {
 423                 u16 data_buf;
 424                 device->controller->read_data(device, &data_buf);
 425                 manufacturer_id = data_buf & 0xff;
 426                 device->controller->read_data(device, &data_buf);
 427                 device_id = data_buf & 0xff;
 428         }
 429
 430         for (i = 0; nand_flash_ids[i].name; i++)
 431         {
 432                 if (nand_flash_ids[i].id == device_id)
 433                 {
 434                         device->device = &nand_flash_ids[i];
 435                         break;
 436                 }
 437         }
 438
 439         for (i = 0; nand_manuf_ids[i].name; i++)
 440         {
 441                 if (nand_manuf_ids[i].id == manufacturer_id)
 442                 {
 443                         device->manufacturer = &nand_manuf_ids[i];
 444                         break;
 445                 }
 446         }
 447
 448         if (!device->manufacturer)
 449         {
 450                 device->manufacturer = &nand_manuf_ids[0];
 451                 device->manufacturer->id = manufacturer_id;
 452         }
 453
 454         if (!device->device)
 455         {
 456                 ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
 457                         manufacturer_id, device_id);
 458                 return ERROR_NAND_OPERATION_FAILED;
 459         }
 460
 461         DEBUG("found %s (%s)", device->device->name, device->manufacturer->name);
 462
 463         /* initialize device parameters */
 464
 465         /* bus width */
 466         if (device->device->options & NAND_BUSWIDTH_16)
 467                 device->bus_width = 16;
 468         else
 469                 device->bus_width = 8;
 470
 471         /* page size */
 472         if (device->device->page_size == 0)
 473         {
 474                 /* TODO: support reading extended chip id to determine page size */
 475                 return ERROR_NAND_OPERATION_FAILED;
 476         }
 477         else if (device->device->page_size == 256)
 478         {
 479                 ERROR("NAND flashes with 256 byte pagesize are not supported");
 480                 return ERROR_NAND_OPERATION_FAILED;
 481         }
 482         else
 483         {
 484                 device->page_size = device->device->page_size;
 485         }
 486
 487         /* number of address cycles */
 488         if (device->page_size <= 512)
 489         {
 490                 /* small page devices */
 491                 if (device->device->chip_size <= 32)
 492                         device->address_cycles = 3;
 493                 else if (device->device->chip_size <= 8*1024)
 494                         device->address_cycles = 4;
 495                 else
 496                 {
 497                         ERROR("BUG: small page NAND device with more than 8 GiB encountered");
 498                         device->address_cycles = 5;
 499                 }
 500         }
 501         else
 502         {
 503                 /* large page devices */
 504                 if (device->device->chip_size <= 128)
 505                         device->address_cycles = 4;
 506                 else if (device->device->chip_size <= 32*1024)
 507                         device->address_cycles = 5;
 508                 else
 509                 {
 510                         ERROR("BUG: small page NAND device with more than 32 GiB encountered");
 511                         device->address_cycles = 6;
 512                 }
 513         }
 514
 515         /* erase size */
 516         if (device->device->erase_size == 0)
 517         {
 518                 /* TODO: support reading extended chip id to determine erase size */
 519         }
 520         else
 521         {
 522                 device->erase_size = device->device->erase_size;
 523         }
 524
 525         /* initialize controller, but leave parameters at the controllers default */
 526         if ((retval = device->controller->init(device) != ERROR_OK))
 527         {
 528                 switch (retval)
 529                 {
 530                         case ERROR_NAND_OPERATION_FAILED:
 531                                 DEBUG("controller initialization failed");
 532                                 return ERROR_NAND_OPERATION_FAILED;
 533                         case ERROR_NAND_OPERATION_NOT_SUPPORTED:
 534                                 ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
 535                                         device->bus_width, device->address_cycles, device->page_size);
 536                                 return ERROR_NAND_OPERATION_FAILED;
 537                         default:
 538                                 ERROR("BUG: unknown controller initialization failure");
 539                                 return ERROR_NAND_OPERATION_FAILED;
 540                 }
 541         }
 542
 543         device->num_blocks = (device->device->chip_size * 1024) / (device->erase_size / 1024);
 544         device->blocks = malloc(sizeof(nand_block_t) * device->num_blocks);
 545
 546         for (i = 0; i < device->num_blocks; i++)
 547         {
 548                 device->blocks[i].size = device->erase_size;
 549                 device->blocks[i].offset = i * device->erase_size;
 550                 device->blocks[i].is_erased = -1;
 551                 device->blocks[i].is_bad = -1;
 552         }
 553
 554         return ERROR_OK;
 555 }
 556
 557 int nand_erase(struct nand_device_s *device, int first_block, int last_block)
 558 {
 559         int i;
 560         u32 page;
 561         u8 status;
 562         int retval;
 563
 564         if (!device->device)
 565                 return ERROR_NAND_DEVICE_NOT_PROBED;
 566
 567         if ((first_block < 0) || (last_block > device->num_blocks))
 568                 return ERROR_INVALID_ARGUMENTS;
 569
 570         /* make sure we know if a block is bad before erasing it */
 571         for (i = first_block; i <= last_block; i++)
 572         {
 573                 if (device->blocks[i].is_bad == -1)
 574                 {
 575                         nand_build_bbt(device, i, last_block);
 576                         break;
 577                 }
 578         }
 579
 580         for (i = first_block; i <= last_block; i++)
 581         {
 582                 /* Send erase setup command */
 583                 device->controller->command(device, NAND_CMD_ERASE1);
 584
 585                 page = i * (device->erase_size / device->page_size);
 586
 587                 /* Send page address */
 588                 if (device->page_size <= 512)
 589                 {
 590                         /* row */
 591                         device->controller->address(device, page & 0xff);
 592                         device->controller->address(device, (page >> 8) & 0xff);
 593
 594                         /* 3rd cycle only on devices with more than 32 MiB */
 595                         if (device->address_cycles >= 4)
 596                                 device->controller->address(device, (page >> 16) & 0xff);
 597
 598                         /* 4th cycle only on devices with more than 8 GiB */
 599                         if (device->address_cycles >= 5)
 600                                 device->controller->address(device, (page >> 24) & 0xff);
 601                 }
 602                 else
 603                 {
 604                         /* row */
 605                         device->controller->address(device, page & 0xff);
 606                         device->controller->address(device, (page >> 8) & 0xff);
 607
 608                         /* 3rd cycle only on devices with more than 128 MiB */
 609                         if (device->address_cycles >= 5)
 610                                 device->controller->address(device, (page >> 16) & 0xff);
 611                 }
 612
 613                 /* Send erase confirm command */
 614                 device->controller->command(device, NAND_CMD_ERASE2);
 615
 616                 if (!device->controller->nand_ready(device, 1000))
 617                 {
 618                         ERROR("timeout waiting for NAND flash block erase to complete");
 619                         return ERROR_NAND_OPERATION_TIMEOUT;
 620                 }
 621
 622                 if ((retval = nand_read_status(device, &status)) != ERROR_OK)
 623                 {
 624                         ERROR("couldn't read status");
 625                         return ERROR_NAND_OPERATION_FAILED;
 626                 }
 627
 628                 if (status & 0x1)
 629                 {
 630                         ERROR("erase operation didn't pass, status: 0x%2.2x", status);
 631                         return ERROR_NAND_OPERATION_FAILED;
 632                 }
 633         }
 634
 635         return ERROR_OK;
 636 }
 637
 638 int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size)
 639 {
 640         u8 *page;
 641
 642         if (!device->device)
 643                 return ERROR_NAND_DEVICE_NOT_PROBED;
 644
 645         if (address % device->page_size)
 646         {
 647                 ERROR("reads need to be page aligned");
 648                 return ERROR_NAND_OPERATION_FAILED;
 649         }
 650
 651         page = malloc(device->page_size);
 652
 653         while (data_size > 0 )
 654         {
 655                 u32 thisrun_size = (data_size > device->page_size) ? device->page_size : data_size;
 656                 u32 page_address;
 657
 658
 659                 page_address = address / device->page_size;
 660
 661                 nand_read_page(device, page_address, page, device->page_size, NULL, 0);
 662
 663                 memcpy(data, page, thisrun_size);
 664
 665                 address += thisrun_size;
 666                 data += thisrun_size;
 667                 data_size -= thisrun_size;
 668         }
 669
 670         free(page);
 671
 672         return ERROR_OK;
 673 }
 674
 675 int nand_write_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size)
 676 {
 677         u8 *page;
 678
 679         if (!device->device)
 680                 return ERROR_NAND_DEVICE_NOT_PROBED;
 681
 682         if (address % device->page_size)
 683         {
 684                 ERROR("writes need to be page aligned");
 685                 return ERROR_NAND_OPERATION_FAILED;
 686         }
 687
 688         page = malloc(device->page_size);
 689
 690         while (data_size > 0 )
 691         {
 692                 u32 thisrun_size = (data_size > device->page_size) ? device->page_size : data_size;
 693                 u32 page_address;
 694
 695                 memset(page, 0xff, device->page_size);
 696                 memcpy(page, data, thisrun_size);
 697
 698                 page_address = address / device->page_size;
 699
 700                 nand_write_page(device, page_address, page, device->page_size, NULL, 0);
 701
 702                 address += thisrun_size;
 703                 data += thisrun_size;
 704                 data_size -= thisrun_size;
 705         }
 706
 707         free(page);
 708
 709         return ERROR_OK;
 710 }
 711
 712 int nand_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
 713 {
 714         if (!device->device)
 715                 return ERROR_NAND_DEVICE_NOT_PROBED;
 716
 717         if (device->use_raw || device->controller->write_page == NULL)
 718                 return nand_write_page_raw(device, page, data, data_size, oob, oob_size);
 719         else
 720                 return device->controller->write_page(device, page, data, data_size, oob, oob_size);
 721 }
 722
 723 int nand_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
 724 {
 725         if (!device->device)
 726                 return ERROR_NAND_DEVICE_NOT_PROBED;
 727
 728         if (device->use_raw || device->controller->read_page == NULL)
 729                 return nand_read_page_raw(device, page, data, data_size, oob, oob_size);
 730         else
 731                 return device->controller->read_page(device, page, data, data_size, oob, oob_size);
 732 }
 733
 734 int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
 735 {
 736         int i;
 737
 738         if (!device->device)
 739                 return ERROR_NAND_DEVICE_NOT_PROBED;
 740
 741         if (device->page_size <= 512)
 742         {
 743                 /* small page device */
 744                 if (data)
 745                         device->controller->command(device, NAND_CMD_READ0);
 746                 else
 747                         device->controller->command(device, NAND_CMD_READOOB);
 748
 749                 /* column (always 0, we start at the beginning of a page/OOB area) */
 750                 device->controller->address(device, 0x0);
 751
 752                 /* row */
 753                 device->controller->address(device, page & 0xff);
 754                 device->controller->address(device, (page >> 8) & 0xff);
 755
 756                 /* 4th cycle only on devices with more than 32 MiB */
 757                 if (device->address_cycles >= 4)
 758                         device->controller->address(device, (page >> 16) & 0xff);
 759
 760                 /* 5th cycle only on devices with more than 8 GiB */
 761                 if (device->address_cycles >= 5)
 762                         device->controller->address(device, (page >> 24) & 0xff);
 763         }
 764         else
 765         {
 766                 /* large page device */
 767                 device->controller->command(device, NAND_CMD_READ0);
 768
 769                 /* column (0 when we start at the beginning of a page,
 770                  * or 2048 for the beginning of OOB area)
 771                  */
 772                 device->controller->address(device, 0x0);
 773                 device->controller->address(device, 0x8);
 774
 775                 /* row */
 776                 device->controller->address(device, page & 0xff);
 777                 device->controller->address(device, (page >> 8) & 0xff);
 778
 779                 /* 5th cycle only on devices with more than 128 MiB */
 780                 if (device->address_cycles >= 5)
 781                         device->controller->address(device, (page >> 16) & 0xff);
 782
 783                 /* large page devices need a start command */
 784                 device->controller->command(device, NAND_CMD_READSTART);
 785         }
 786
 787         if (!device->controller->nand_ready(device, 100))
 788                 return ERROR_NAND_OPERATION_TIMEOUT;
 789
 790         if (data)
 791         {
 792                 if (device->controller->read_block_data != NULL)
 793                         (device->controller->read_block_data)(device, data, data_size);
 794                 else
 795                 {
 796                         for (i = 0; i < data_size;)
 797                         {
 798                                 if (device->device->options & NAND_BUSWIDTH_16)
 799                                 {
 800                                         device->controller->read_data(device, data);
 801                                         data += 2;
 802                                         i += 2;
 803                                 }
 804                                 else
 805                                 {
 806                                         device->controller->read_data(device, data);
 807                                         data += 1;
 808                                         i += 1;
 809                                 }
 810                         }
 811                 }
 812         }
 813
 814         if (oob)
 815         {
 816                 if (device->controller->read_block_data != NULL)
 817                         (device->controller->read_block_data)(device, oob, oob_size);
 818                 else
 819                 {
 820                         for (i = 0; i < oob_size;)
 821                         {
 822                                 if (device->device->options & NAND_BUSWIDTH_16)
 823                                 {
 824                                         device->controller->read_data(device, oob);
 825                                         oob += 2;
 826                                         i += 2;
 827                                 }
 828                                 else
 829                                 {
 830                                         device->controller->read_data(device, oob);
 831                                         oob += 1;
 832                                         i += 1;
 833                                 }
 834                         }
 835                 }
 836         }
 837
 838         return ERROR_OK;
 839 }
 840
 841 int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
 842 {
 843         int i;
 844         int retval;
 845         u8 status;
 846
 847         if (!device->device)
 848                 return ERROR_NAND_DEVICE_NOT_PROBED;
 849
 850         device->controller->command(device, NAND_CMD_SEQIN);
 851
 852         if (device->page_size <= 512)
 853         {
 854                 /* column (always 0, we start at the beginning of a page/OOB area) */
 855                 device->controller->address(device, 0x0);
 856
 857                 /* row */
 858                 device->controller->address(device, page & 0xff);
 859                 device->controller->address(device, (page >> 8) & 0xff);
 860
 861                 /* 4th cycle only on devices with more than 32 MiB */
 862                 if (device->address_cycles >= 4)
 863                         device->controller->address(device, (page >> 16) & 0xff);
 864
 865                 /* 5th cycle only on devices with more than 8 GiB */
 866                 if (device->address_cycles >= 5)
 867                         device->controller->address(device, (page >> 24) & 0xff);
 868         }
 869         else
 870         {
 871                 /* column (0 when we start at the beginning of a page,
 872                  * or 2048 for the beginning of OOB area)
 873                  */
 874                 device->controller->address(device, 0x0);
 875                 device->controller->address(device, 0x8);
 876
 877                 /* row */
 878                 device->controller->address(device, page & 0xff);
 879                 device->controller->address(device, (page >> 8) & 0xff);
 880
 881                 /* 5th cycle only on devices with more than 128 MiB */
 882                 if (device->address_cycles >= 5)
 883                         device->controller->address(device, (page >> 16) & 0xff);
 884         }
 885
 886         if (data)
 887         {
 888                 if (device->controller->write_block_data != NULL)
 889                         (device->controller->write_block_data)(device, data, data_size);
 890                 else
 891                 {
 892                         for (i = 0; i < data_size;)
 893                         {
 894                                 if (device->device->options & NAND_BUSWIDTH_16)
 895                                 {
 896                                         u16 data_buf = le_to_h_u16(data);
 897                                         device->controller->write_data(device, data_buf);
 898                                         data += 2;
 899                                         i += 2;
 900                                 }
 901                                 else
 902                                 {
 903                                         device->controller->write_data(device, *data);
 904                                         data += 1;
 905                                         i += 1;
 906                                 }
 907                         }
 908                 }
 909         }
 910
 911         if (oob)
 912         {
 913                 if (device->controller->write_block_data != NULL)
 914                         (device->controller->write_block_data)(device, oob, oob_size);
 915                 else
 916                 {
 917                         for (i = 0; i < oob_size;)
 918                         {
 919                                 if (device->device->options & NAND_BUSWIDTH_16)
 920                                 {
 921                                         u16 oob_buf = le_to_h_u16(data);
 922                                         device->controller->write_data(device, oob_buf);
 923                                         oob += 2;
 924                                         i += 2;
 925                                 }
 926                                 else
 927                                 {
 928                                         device->controller->write_data(device, *oob);
 929                                         oob += 1;
 930                                         i += 1;
 931                                 }
 932                         }
 933                 }
 934         }
 935
 936         device->controller->command(device, NAND_CMD_PAGEPROG);
 937
 938         if (!device->controller->nand_ready(device, 100))
 939                 return ERROR_NAND_OPERATION_TIMEOUT;
 940
 941         if ((retval = nand_read_status(device, &status)) != ERROR_OK)
 942         {
 943                 ERROR("couldn't read status");
 944                 return ERROR_NAND_OPERATION_FAILED;
 945         }
 946
 947         if (status & NAND_STATUS_FAIL)
 948         {
 949                 ERROR("write operation didn't pass, status: 0x%2.2x", status);
 950                 return ERROR_NAND_OPERATION_FAILED;
 951         }
 952
 953         return ERROR_OK;
 954 }
 955
 956 int handle_nand_list_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
 957 {
 958         nand_device_t *p;
 959         int i = 0;
 960
 961         if (!nand_devices)
 962         {
 963                 command_print(cmd_ctx, "no NAND flash devices configured");
 964                 return ERROR_OK;
 965         }
 966
 967         for (p = nand_devices; p; p = p->next)
 968         {
 969                 if (p->device)
 970                         command_print(cmd_ctx, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
 971                                 i++, p->device->name, p->manufacturer->name, p->page_size, p->bus_width, p->erase_size);
 972                 else
 973                         command_print(cmd_ctx, "#%i: not probed");
 974         }
 975
 976         return ERROR_OK;
 977 }
 978
 979 int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
 980 {
 981         nand_device_t *p;
 982         int i = 0;
 983         int j = 0;
 984         int first = -1;
 985         int last = -1;
 986
 987         if ((argc < 1) || (argc > 3))
 988         {
 989                 command_print(cmd_ctx, "usage: nand info <num> [<first> <last>]");
 990                 return ERROR_OK;
 991         }
 992
 993         if (argc == 2)
 994         {
 995                 first = last = strtoul(args[1], NULL, 0);
 996         }
 997         else if (argc == 3)
 998         {
 999                 first = strtoul(args[1], NULL, 0);
1000                 last = strtoul(args[2], NULL, 0);
1001         }
1002
1003         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1004         if (p)
1005         {
1006                 if (p->device)
1007                 {
1008                         if (first >= p->num_blocks)
1009                                 first = p->num_blocks - 1;
1010
1011                         if (last >= p->num_blocks)
1012                                 last = p->num_blocks - 1;
1013
1014                         command_print(cmd_ctx, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
1015                                 i++, p->device->name, p->manufacturer->name, p->page_size, p->bus_width, p->erase_size);
1016
1017                         for (j = first; j <= last; j++)
1018                         {
1019                                 char *erase_state, *bad_state;
1020
1021                                 if (p->blocks[j].is_erased == 0)
1022                                         erase_state = "not erased";
1023                                 else if (p->blocks[j].is_erased == 1)
1024                                         erase_state = "erased";
1025                                 else
1026                                         erase_state = "erase state unknown";
1027
1028                                 if (p->blocks[j].is_bad == 0)
1029                                         bad_state = "";
1030                                 else if (p->blocks[j].is_bad == 1)
1031                                         bad_state = " (marked bad)";
1032                                 else
1033                                         bad_state = " (block condition unknown)";
1034
1035                                 command_print(cmd_ctx, "\t#%i: 0x%8.8x (0x%xkB) %s%s",
1036                                                         j, p->blocks[j].offset, p->blocks[j].size / 1024,
1037                                                         erase_state, bad_state);
1038                         }
1039                 }
1040                 else
1041                 {
1042                         command_print(cmd_ctx, "#%i: not probed");
1043                 }
1044         }
1045
1046         return ERROR_OK;
1047 }
1048
1049 int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1050 {
1051         nand_device_t *p;
1052         int retval;
1053
1054         if (argc != 1)
1055         {
1056                 command_print(cmd_ctx, "usage: nand probe <num>");
1057                 return ERROR_OK;
1058         }
1059
1060         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1061         if (p)
1062         {
1063                 if ((retval = nand_probe(p)) == ERROR_OK)
1064                 {
1065                         command_print(cmd_ctx, "NAND flash device '%s' found", p->device->name);
1066                 }
1067                 else if (retval == ERROR_NAND_OPERATION_FAILED)
1068                 {
1069                         command_print(cmd_ctx, "probing failed for NAND flash device");
1070                 }
1071                 else
1072                 {
1073                         command_print(cmd_ctx, "unknown error when probing NAND flash device");
1074                 }
1075         }
1076         else
1077         {
1078                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1079         }
1080
1081         return ERROR_OK;
1082 }
1083
1084 int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1085 {
1086         nand_device_t *p;
1087         int retval;
1088
1089         if (argc != 3)
1090         {
1091                 command_print(cmd_ctx, "usage: nand erase <num> <first> <last>");
1092                 return ERROR_OK;
1093         }
1094
1095         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1096         if (p)
1097         {
1098                 int first = strtoul(args[1], NULL, 0);
1099                 int last = strtoul(args[2], NULL, 0);
1100
1101                 if ((retval = nand_erase(p, first, last)) == ERROR_OK)
1102                 {
1103                         command_print(cmd_ctx, "successfully erased blocks %i to %i on NAND flash device '%s'", first, last, p->device->name);
1104                 }
1105                 else if (retval == ERROR_NAND_OPERATION_FAILED)
1106                 {
1107                         command_print(cmd_ctx, "erase failed");
1108                 }
1109                 else
1110                 {
1111                         command_print(cmd_ctx, "unknown error when erasing NAND flash device");
1112                 }
1113         }
1114         else
1115         {
1116                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1117         }
1118
1119         return ERROR_OK;
1120 }
1121
1122 int handle_nand_check_bad_blocks_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1123 {
1124         nand_device_t *p;
1125         int retval;
1126         int first = -1;
1127         int last = -1;
1128
1129         if ((argc < 1) || (argc > 3) || (argc == 2))
1130         {
1131                 command_print(cmd_ctx, "usage: nand check_bad_blocks <num> [<first> <last>]");
1132                 return ERROR_OK;
1133         }
1134
1135         if (argc == 3)
1136         {
1137                 first = strtoul(args[1], NULL, 0);
1138                 last = strtoul(args[2], NULL, 0);
1139         }
1140
1141         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1142         if (p)
1143         {
1144                 if ((retval = nand_build_bbt(p, first, last)) == ERROR_OK)
1145                 {
1146                         command_print(cmd_ctx, "checked NAND flash device for bad blocks, use \"nand info\" command to list blocks", p->device->name);
1147                 }
1148                 else if (retval == ERROR_NAND_OPERATION_FAILED)
1149                 {
1150                         command_print(cmd_ctx, "error when checking for bad blocks on NAND flash device");
1151                 }
1152                 else
1153                 {
1154                         command_print(cmd_ctx, "unknown error when checking for bad blocks on NAND flash device");
1155                 }
1156         }
1157         else
1158         {
1159                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1160         }
1161
1162         return ERROR_OK;
1163 }
1164
1165 int handle_nand_copy_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1166 {
1167         nand_device_t *p;
1168
1169         if (argc != 4)
1170         {
1171                 command_print(cmd_ctx, "usage: nand copy <num> <offset> <length> <ram-address>");
1172                 return ERROR_OK;
1173         }
1174
1175         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1176         if (p)
1177         {
1178
1179         }
1180         else
1181         {
1182                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1183         }
1184
1185         return ERROR_OK;
1186 }
1187
1188 int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1189 {
1190         u32 offset;
1191         u32 binary_size;
1192         u32 buf_cnt;
1193         enum oob_formats oob_format = NAND_OOB_NONE;
1194
1195         fileio_t fileio;
1196
1197         duration_t duration;
1198         char *duration_text;
1199
1200         nand_device_t *p;
1201
1202         if (argc < 3)
1203         {
1204                 command_print(cmd_ctx, "usage: nand write <num> <file> <offset> [options]");
1205                 return ERROR_OK;
1206         }
1207
1208         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1209         if (p)
1210         {
1211                 u8 *page = NULL;
1212                 u32 page_size = 0;
1213                 u8 *oob = NULL;
1214                 u32 oob_size = 0;
1215
1216                 duration_start_measure(&duration);
1217                 offset = strtoul(args[2], NULL, 0);
1218
1219                 if (argc > 3)
1220                 {
1221                         int i;
1222                         for (i = 3; i < argc; i++)
1223                         {
1224                                 if (!strcmp(args[i], "oob_raw"))
1225                                         oob_format |= NAND_OOB_RAW;
1226                                 else if (!strcmp(args[i], "oob_only"))
1227                                         oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY;
1228                                 else
1229                                 {
1230                                         command_print(cmd_ctx, "unknown option: %s", args[i]);
1231                                 }
1232                         }
1233                 }
1234
1235                 if (fileio_open(&fileio, args[1], FILEIO_READ, FILEIO_BINARY) != ERROR_OK)
1236                 {
1237                         command_print(cmd_ctx, "file open error: %s", fileio.error_str);
1238                         return ERROR_OK;
1239                 }
1240
1241                 buf_cnt = binary_size = fileio.size;
1242
1243                 if (!(oob_format & NAND_OOB_ONLY))
1244                 {
1245                         page_size = p->page_size;
1246                         page = malloc(p->page_size);
1247                 }
1248
1249                 if (oob_format & NAND_OOB_RAW)
1250                 {
1251                         if (p->page_size == 512)
1252                                 oob_size = 16;
1253                         else if (p->page_size == 2048)
1254                                 oob_size = 64;
1255                         oob = malloc(oob_size);
1256                 }
1257
1258                 if (offset % p->page_size)
1259                 {
1260                         command_print(cmd_ctx, "only page size aligned offsets and sizes are supported");
1261                         return ERROR_OK;
1262                 }
1263
1264                 while (buf_cnt > 0)
1265                 {
1266                         u32 size_read;
1267
1268                         if (page)
1269                         {
1270                                 fileio_read(&fileio, page_size, page, &size_read);
1271                                 buf_cnt -= size_read;
1272                                 if (size_read < page_size)
1273                                 {
1274                                         memset(page + size_read, 0xff, page_size - size_read);
1275                                 }
1276                         }
1277
1278                         if (oob)
1279                         {
1280                                 fileio_read(&fileio, oob_size, oob, &size_read);
1281                                 buf_cnt -= size_read;
1282                                 if (size_read < oob_size)
1283                                 {
1284                                         memset(oob + size_read, 0xff, oob_size - size_read);
1285                                 }
1286                         }
1287
1288                         if (nand_write_page(p, offset / p->page_size, page, page_size, oob, oob_size) != ERROR_OK)
1289                         {
1290                                 command_print(cmd_ctx, "failed writing file %s to NAND flash %s at offset 0x%8.8x",
1291                                         args[1], args[0], offset);
1292                                 return ERROR_OK;
1293                         }
1294                         offset += page_size;
1295                 }
1296
1297                 fileio_close(&fileio);
1298
1299                 duration_stop_measure(&duration, &duration_text);
1300                 command_print(cmd_ctx, "wrote file %s to NAND flash %s at offset 0x%8.8x in %s",
1301                         args[1], args[0], offset, duration_text);
1302                 free(duration_text);
1303         }
1304         else
1305         {
1306                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1307         }
1308
1309         return ERROR_OK;
1310 }
1311
1312 int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1313 {
1314         nand_device_t *p;
1315
1316         if (argc < 4)
1317         {
1318                 command_print(cmd_ctx, "usage: nand dump <num> <filename> <address> <size> [options]");
1319                 return ERROR_OK;
1320         }
1321
1322         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1323         if (p)
1324         {
1325                 if (p->device)
1326                 {
1327                         fileio_t fileio;
1328                         duration_t duration;
1329                         char *duration_text;
1330                         int retval;
1331
1332                         u8 *page = NULL;
1333                         u32 page_size = 0;
1334                         u8 *oob = NULL;
1335                         u32 oob_size = 0;
1336                         u32 address = strtoul(args[2], NULL, 0);
1337                         u32 size = strtoul(args[3], NULL, 0);
1338                         u32 bytes_done = 0;
1339                         enum oob_formats oob_format = NAND_OOB_NONE;
1340
1341                         if (argc > 4)
1342                         {
1343                                 int i;
1344                                 for (i = 4; i < argc; i++)
1345                                 {
1346                                         if (!strcmp(args[i], "oob_raw"))
1347                                                 oob_format |= NAND_OOB_RAW;
1348                                         else if (!strcmp(args[i], "oob_only"))
1349                                                 oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY;
1350                                         else
1351                                                 command_print(cmd_ctx, "unknown option: '%s'", args[i]);
1352                                 }
1353                         }
1354
1355                         if ((address % p->page_size) || (size % p->page_size))
1356                         {
1357                                 command_print(cmd_ctx, "only page size aligned addresses and sizes are supported");
1358                                 return ERROR_OK;
1359                         }
1360
1361                         if (!(oob_format & NAND_OOB_ONLY))
1362                         {
1363                                 page_size = p->page_size;
1364                                 page = malloc(p->page_size);
1365                         }
1366
1367                         if (oob_format & NAND_OOB_RAW)
1368                         {
1369                                 if (p->page_size == 512)
1370                                         oob_size = 16;
1371                                 else if (p->page_size == 2048)
1372                                         oob_size = 64;
1373                                 oob = malloc(oob_size);
1374                         }
1375
1376                         if (fileio_open(&fileio, args[1], FILEIO_WRITE, FILEIO_BINARY) != ERROR_OK)
1377                         {
1378                                 command_print(cmd_ctx, "dump_image error: %s", fileio.error_str);
1379                                 return ERROR_OK;
1380                         }
1381
1382                         duration_start_measure(&duration);
1383
1384                         while (size > 0)
1385                         {
1386                                 u32 size_written;
1387                                 if ((retval = nand_read_page(p, address / p->page_size, page, page_size, oob, oob_size)) != ERROR_OK)
1388                                 {
1389                                         command_print(cmd_ctx, "reading NAND flash page failed");
1390                                         return ERROR_OK;
1391                                 }
1392
1393                                 if (page)
1394                                 {
1395                                         fileio_write(&fileio, page_size, page, &size_written);
1396                                         bytes_done += page_size;
1397                                 }
1398
1399                                 if (oob)
1400                                 {
1401                                         fileio_write(&fileio, oob_size, oob, &size_written);
1402                                         bytes_done += oob_size;
1403                                 }
1404
1405                                 size -= p->page_size;
1406                                 address += p->page_size;
1407                         }
1408
1409                         if (page)
1410                                 free(page);
1411
1412                         if (oob)
1413                                 free(oob);
1414
1415                         fileio_close(&fileio);
1416
1417                         duration_stop_measure(&duration, &duration_text);
1418                         command_print(cmd_ctx, "dumped %"PRIi64" byte in %s", fileio.size, duration_text);
1419                         free(duration_text);
1420                 }
1421                 else
1422                 {
1423                         command_print(cmd_ctx, "#%i: not probed");
1424                 }
1425         }
1426         else
1427         {
1428                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1429         }
1430
1431         return ERROR_OK;
1432 }
1433
1434 int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1435 {
1436         nand_device_t *p;
1437
1438         if ((argc < 1) || (argc > 2))
1439         {
1440                 command_print(cmd_ctx, "usage: nand raw_access <num> ['enable'|'disable']");
1441                 return ERROR_OK;
1442         }
1443
1444         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1445         if (p)
1446         {
1447                 if (p->device)
1448                 {
1449                         if (argc == 2)
1450                         {
1451                                 if (strcmp("enable", args[1]) == 0)
1452                                 {
1453                                         p->use_raw = 1;
1454                                 }
1455                                 else if (strcmp("disable", args[1]) == 0)
1456                                 {
1457                                         p->use_raw = 0;
1458                                 }
1459                                 else
1460                                 {
1461                                         command_print(cmd_ctx, "usage: nand raw_access ['enable'|disable']");
1462                                 }
1463                         }
1464
1465                         command_print(cmd_ctx, "raw access is %s", (p->use_raw) ? "enabled" : "disabled");
1466                 }
1467                 else
1468                 {
1469                         command_print(cmd_ctx, "#%i: not probed");
1470                 }
1471         }
1472         else
1473         {
1474                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1475         }
1476
1477         return ERROR_OK;
1478 }
1479