1 /***************************************************************************
2 * Copyright (C) 2007 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
6 * drivers/mtd/nand_ids.c *
8 * Copyright (C) 2002 Thomas Gleixner (tglx@linutronix.de) *
10 * This program is free software; you can redistribute it and/or modify *
11 * it under the terms of the GNU General Public License as published by *
12 * the Free Software Foundation; either version 2 of the License, or *
13 * (at your option) any later version. *
15 * This program is distributed in the hope that it will be useful, *
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
18 * GNU General Public License for more details. *
20 * You should have received a copy of the GNU General Public License *
21 * along with this program; if not, write to the *
22 * Free Software Foundation, Inc., *
23 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
24 ***************************************************************************/
29 #include "replacements.h"
39 #include "time_support.h"
42 int nand_register_commands(struct command_context_s *cmd_ctx);
43 int handle_nand_list_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
44 int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
45 int handle_nand_check_bad_blocks_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
46 int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
47 int handle_nand_copy_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
48 int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
49 int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
50 int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
52 int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
54 int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
55 int nand_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
56 int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size);
58 int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
59 int nand_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
61 /* NAND flash controller
63 extern nand_flash_controller_t lpc3180_nand_controller;
64 /* extern nand_flash_controller_t s3c2410_nand_controller; */
65 /* extern nand_flash_controller_t boundary_scan_nand_controller; */
67 nand_flash_controller_t *nand_flash_controllers[] =
69 &lpc3180_nand_controller,
70 /* &s3c2410_nand_controller, */
71 /* &boundary_scan_nand_controller, */
75 /* configured NAND devices and NAND Flash command handler */
76 nand_device_t *nand_devices = NULL;
77 static command_t *nand_cmd;
81 * Name, ID code, pagesize, chipsize in MegaByte, eraseblock size,
84 * Pagesize; 0, 256, 512
85 * 0 get this information from the extended chip ID
86 * 256 256 Byte page size
87 * 512 512 Byte page size
89 nand_info_t nand_flash_ids[] =
91 {"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, 0},
92 {"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, 0},
93 {"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, 0},
94 {"NAND 1MiB 3,3V 8-bit", 0xe8, 256, 1, 0x1000, 0},
95 {"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, 0},
96 {"NAND 2MiB 3,3V 8-bit", 0xea, 256, 2, 0x1000, 0},
97 {"NAND 4MiB 3,3V 8-bit", 0xd5, 512, 4, 0x2000, 0},
98 {"NAND 4MiB 3,3V 8-bit", 0xe3, 512, 4, 0x2000, 0},
99 {"NAND 4MiB 3,3V 8-bit", 0xe5, 512, 4, 0x2000, 0},
100 {"NAND 8MiB 3,3V 8-bit", 0xd6, 512, 8, 0x2000, 0},
102 {"NAND 8MiB 1,8V 8-bit", 0x39, 512, 8, 0x2000, 0},
103 {"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, 0},
104 {"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16},
105 {"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16},
107 {"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, 0},
108 {"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, 0},
109 {"NAND 16MiB 1,8V 16-bit", 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16},
110 {"NAND 16MiB 3,3V 16-bit", 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16},
112 {"NAND 32MiB 1,8V 8-bit", 0x35, 512, 32, 0x4000, 0},
113 {"NAND 32MiB 3,3V 8-bit", 0x75, 512, 32, 0x4000, 0},
114 {"NAND 32MiB 1,8V 16-bit", 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16},
115 {"NAND 32MiB 3,3V 16-bit", 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16},
117 {"NAND 64MiB 1,8V 8-bit", 0x36, 512, 64, 0x4000, 0},
118 {"NAND 64MiB 3,3V 8-bit", 0x76, 512, 64, 0x4000, 0},
119 {"NAND 64MiB 1,8V 16-bit", 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16},
120 {"NAND 64MiB 3,3V 16-bit", 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16},
122 {"NAND 128MiB 1,8V 8-bit", 0x78, 512, 128, 0x4000, 0},
123 {"NAND 128MiB 1,8V 8-bit", 0x39, 512, 128, 0x4000, 0},
124 {"NAND 128MiB 3,3V 8-bit", 0x79, 512, 128, 0x4000, 0},
125 {"NAND 128MiB 1,8V 16-bit", 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16},
126 {"NAND 128MiB 1,8V 16-bit", 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16},
127 {"NAND 128MiB 3,3V 16-bit", 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16},
128 {"NAND 128MiB 3,3V 16-bit", 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16},
130 {"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, 0},
132 {"NAND 64MiB 1,8V 8-bit", 0xA2, 0, 64, 0, LP_OPTIONS},
133 {"NAND 64MiB 3,3V 8-bit", 0xF2, 0, 64, 0, LP_OPTIONS},
134 {"NAND 64MiB 1,8V 16-bit", 0xB2, 0, 64, 0, LP_OPTIONS16},
135 {"NAND 64MiB 3,3V 16-bit", 0xC2, 0, 64, 0, LP_OPTIONS16},
137 {"NAND 128MiB 1,8V 8-bit", 0xA1, 0, 128, 0, LP_OPTIONS},
138 {"NAND 128MiB 3,3V 8-bit", 0xF1, 0, 128, 0, LP_OPTIONS},
139 {"NAND 128MiB 1,8V 16-bit", 0xB1, 0, 128, 0, LP_OPTIONS16},
140 {"NAND 128MiB 3,3V 16-bit", 0xC1, 0, 128, 0, LP_OPTIONS16},
142 {"NAND 256MiB 1,8V 8-bit", 0xAA, 0, 256, 0, LP_OPTIONS},
143 {"NAND 256MiB 3,3V 8-bit", 0xDA, 0, 256, 0, LP_OPTIONS},
144 {"NAND 256MiB 1,8V 16-bit", 0xBA, 0, 256, 0, LP_OPTIONS16},
145 {"NAND 256MiB 3,3V 16-bit", 0xCA, 0, 256, 0, LP_OPTIONS16},
147 {"NAND 512MiB 1,8V 8-bit", 0xAC, 0, 512, 0, LP_OPTIONS},
148 {"NAND 512MiB 3,3V 8-bit", 0xDC, 0, 512, 0, LP_OPTIONS},
149 {"NAND 512MiB 1,8V 16-bit", 0xBC, 0, 512, 0, LP_OPTIONS16},
150 {"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, LP_OPTIONS16},
152 {"NAND 1GiB 1,8V 8-bit", 0xA3, 0, 1024, 0, LP_OPTIONS},
153 {"NAND 1GiB 3,3V 8-bit", 0xD3, 0, 1024, 0, LP_OPTIONS},
154 {"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, LP_OPTIONS16},
155 {"NAND 1GiB 3,3V 16-bit", 0xC3, 0, 1024, 0, LP_OPTIONS16},
157 {"NAND 2GiB 1,8V 8-bit", 0xA5, 0, 2048, 0, LP_OPTIONS},
158 {"NAND 2GiB 3,3V 8-bit", 0xD5, 0, 2048, 0, LP_OPTIONS},
159 {"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, LP_OPTIONS16},
160 {"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16},
165 /* Manufacturer ID list
167 nand_manufacturer_t nand_manuf_ids[] =
170 {NAND_MFR_TOSHIBA, "Toshiba"},
171 {NAND_MFR_SAMSUNG, "Samsung"},
172 {NAND_MFR_FUJITSU, "Fujitsu"},
173 {NAND_MFR_NATIONAL, "National"},
174 {NAND_MFR_RENESAS, "Renesas"},
175 {NAND_MFR_STMICRO, "ST Micro"},
176 {NAND_MFR_HYNIX, "Hynix"},
180 /* nand device <nand_controller> [controller options]
182 int handle_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
189 WARNING("incomplete flash device nand configuration");
190 return ERROR_FLASH_BANK_INVALID;
193 for (i = 0; nand_flash_controllers[i]; i++)
195 nand_device_t *p, *c;
197 if (strcmp(args[0], nand_flash_controllers[i]->name) == 0)
199 /* register flash specific commands */
200 if (nand_flash_controllers[i]->register_commands(cmd_ctx) != ERROR_OK)
202 ERROR("couldn't register '%s' commands", args[0]);
206 c = malloc(sizeof(nand_device_t));
208 c->controller = nand_flash_controllers[i];
209 c->controller_priv = NULL;
210 c->manufacturer = NULL;
213 c->address_cycles = 0;
218 if ((retval = nand_flash_controllers[i]->nand_device_command(cmd_ctx, cmd, args, argc, c)) != ERROR_OK)
220 ERROR("'%s' driver rejected nand flash", c->controller->name);
225 /* put NAND device in linked list */
228 /* find last flash device */
229 for (p = nand_devices; p && p->next; p = p->next);
242 /* no valid NAND controller was found (i.e. the configuration option,
243 * didn't match one of the compiled-in controllers)
245 ERROR("No valid NAND flash controller found (%s)", args[0]);
246 ERROR("compiled-in NAND flash controllers:");
247 for (i = 0; nand_flash_controllers[i]; i++)
249 ERROR("%i: %s", i, nand_flash_controllers[i]->name);
255 int nand_register_commands(struct command_context_s *cmd_ctx)
257 nand_cmd = register_command(cmd_ctx, NULL, "nand", NULL, COMMAND_ANY, NULL);
259 register_command(cmd_ctx, nand_cmd, "device", handle_nand_device_command, COMMAND_CONFIG, NULL);
264 int nand_init(struct command_context_s *cmd_ctx)
268 register_command(cmd_ctx, nand_cmd, "list", handle_nand_list_command, COMMAND_EXEC,
269 "list configured NAND flash devices");
270 register_command(cmd_ctx, nand_cmd, "info", handle_nand_info_command, COMMAND_EXEC,
271 "print info about NAND flash device <num>");
272 register_command(cmd_ctx, nand_cmd, "probe", handle_nand_probe_command, COMMAND_EXEC,
273 "identify NAND flash device <num>");
274 register_command(cmd_ctx, nand_cmd, "check_bad_blocks", handle_nand_check_bad_blocks_command, COMMAND_EXEC,
275 "check NAND flash device <num> for bad blocks [<first> <last>]");
276 register_command(cmd_ctx, nand_cmd, "erase", handle_nand_erase_command, COMMAND_EXEC,
277 "erase blocks on NAND flash device <num> <first> <last>");
278 register_command(cmd_ctx, nand_cmd, "copy", handle_nand_copy_command, COMMAND_EXEC,
279 "copy from NAND flash device <num> <offset> <length> <ram-address>");
280 register_command(cmd_ctx, nand_cmd, "dump", handle_nand_dump_command, COMMAND_EXEC,
281 "dump from NAND flash device <num> <filename> <offset> <size> [options]");
282 register_command(cmd_ctx, nand_cmd, "write", handle_nand_write_command, COMMAND_EXEC,
283 "write to NAND flash device <num> <filename> <offset> [options]");
284 register_command(cmd_ctx, nand_cmd, "raw_access", handle_nand_raw_access_command, COMMAND_EXEC,
285 "raw access to NAND flash device <num> ['enable'|'disable']");
291 nand_device_t *get_nand_device_by_num(int num)
296 for (p = nand_devices; p; p = p->next)
307 int nand_build_bbt(struct nand_device_s *device, int first, int last)
315 if ((first < 0) || (first >= device->num_blocks))
318 if ((last >= device->num_blocks) || (last == -1))
319 last = device->num_blocks - 1;
321 for (i = first; i < last; i++)
323 nand_read_page(device, page, NULL, 0, oob, 6);
325 if (((device->device->options & NAND_BUSWIDTH_16) && ((oob[0] & oob[1]) != 0xff))
326 || (((device->page_size == 512) && (oob[5] != 0xff)) ||
327 ((device->page_size == 2048) && (oob[0] != 0xff))))
329 WARNING("invalid block: %i", i);
330 device->blocks[i].is_bad = 1;
334 device->blocks[i].is_bad = 0;
337 page += (device->erase_size / device->page_size);
343 int nand_read_status(struct nand_device_s *device, u8 *status)
346 return ERROR_NAND_DEVICE_NOT_PROBED;
348 /* Send read status command */
349 device->controller->command(device, NAND_CMD_STATUS);
354 if (device->device->options & NAND_BUSWIDTH_16)
357 device->controller->read_data(device, &data);
358 *status = data & 0xff;
362 device->controller->read_data(device, status);
368 int nand_probe(struct nand_device_s *device)
370 u8 manufacturer_id, device_id;
374 /* clear device data */
375 device->device = NULL;
376 device->manufacturer = NULL;
378 /* clear device parameters */
379 device->bus_width = 0;
380 device->address_cycles = 0;
381 device->page_size = 0;
382 device->erase_size = 0;
384 /* initialize controller (device parameters are zero, use controller default) */
385 if ((retval = device->controller->init(device) != ERROR_OK))
389 case ERROR_NAND_OPERATION_FAILED:
390 DEBUG("controller initialization failed");
391 return ERROR_NAND_OPERATION_FAILED;
392 case ERROR_NAND_OPERATION_NOT_SUPPORTED:
393 ERROR("BUG: controller reported that it doesn't support default parameters");
394 return ERROR_NAND_OPERATION_FAILED;
396 ERROR("BUG: unknown controller initialization failure");
397 return ERROR_NAND_OPERATION_FAILED;
401 device->controller->command(device, NAND_CMD_RESET);
402 device->controller->reset(device);
404 device->controller->command(device, NAND_CMD_READID);
405 device->controller->address(device, 0x0);
407 if (device->bus_width == 8)
409 device->controller->read_data(device, &manufacturer_id);
410 device->controller->read_data(device, &device_id);
415 device->controller->read_data(device, &data_buf);
416 manufacturer_id = data_buf & 0xff;
417 device->controller->read_data(device, &data_buf);
418 device_id = data_buf & 0xff;
421 for (i = 0; nand_flash_ids[i].name; i++)
423 if (nand_flash_ids[i].id == device_id)
425 device->device = &nand_flash_ids[i];
430 for (i = 0; nand_manuf_ids[i].name; i++)
432 if (nand_manuf_ids[i].id == manufacturer_id)
434 device->manufacturer = &nand_manuf_ids[i];
439 if (!device->manufacturer)
441 device->manufacturer = &nand_manuf_ids[0];
442 device->manufacturer->id = manufacturer_id;
447 ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
448 manufacturer_id, device_id);
449 return ERROR_NAND_OPERATION_FAILED;
452 DEBUG("found %s (%s)", device->device->name, device->manufacturer->name);
454 /* initialize device parameters */
457 if (device->device->options & NAND_BUSWIDTH_16)
458 device->bus_width = 16;
460 device->bus_width = 8;
463 if (device->device->page_size == 0)
465 /* TODO: support reading extended chip id to determine page size */
466 return ERROR_NAND_OPERATION_FAILED;
468 else if (device->device->page_size == 256)
470 ERROR("NAND flashes with 256 byte pagesize are not supported");
471 return ERROR_NAND_OPERATION_FAILED;
475 device->page_size = device->device->page_size;
478 /* number of address cycles */
479 if (device->page_size <= 512)
481 /* small page devices */
482 if (device->device->chip_size <= 32)
483 device->address_cycles = 3;
484 else if (device->device->chip_size <= 8*1024)
485 device->address_cycles = 4;
488 ERROR("BUG: small page NAND device with more than 8 GiB encountered");
489 device->address_cycles = 5;
494 /* large page devices */
495 if (device->device->chip_size <= 128)
496 device->address_cycles = 4;
497 else if (device->device->chip_size <= 32*1024)
498 device->address_cycles = 5;
501 ERROR("BUG: small page NAND device with more than 32 GiB encountered");
502 device->address_cycles = 6;
507 if (device->device->erase_size == 0)
509 /* TODO: support reading extended chip id to determine erase size */
513 device->erase_size = device->device->erase_size;
516 /* initialize controller, but leave parameters at the controllers default */
517 if ((retval = device->controller->init(device) != ERROR_OK))
521 case ERROR_NAND_OPERATION_FAILED:
522 DEBUG("controller initialization failed");
523 return ERROR_NAND_OPERATION_FAILED;
524 case ERROR_NAND_OPERATION_NOT_SUPPORTED:
525 ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
526 device->bus_width, device->address_cycles, device->page_size);
527 return ERROR_NAND_OPERATION_FAILED;
529 ERROR("BUG: unknown controller initialization failure");
530 return ERROR_NAND_OPERATION_FAILED;
534 device->num_blocks = (device->device->chip_size * 1024) / (device->erase_size / 1024);
535 device->blocks = malloc(sizeof(nand_block_t) * device->num_blocks);
537 for (i = 0; i < device->num_blocks; i++)
539 device->blocks[i].size = device->erase_size;
540 device->blocks[i].offset = i * device->erase_size;
541 device->blocks[i].is_erased = -1;
542 device->blocks[i].is_bad = -1;
548 int nand_erase(struct nand_device_s *device, int first_block, int last_block)
556 return ERROR_NAND_DEVICE_NOT_PROBED;
558 if ((first_block < 0) || (last_block > device->num_blocks))
559 return ERROR_INVALID_ARGUMENTS;
561 /* make sure we know if a block is bad before erasing it */
562 for (i = first_block; i <= last_block; i++)
564 if (device->blocks[i].is_bad == -1)
566 nand_build_bbt(device, i, last_block);
571 for (i = first_block; i <= last_block; i++)
573 /* Send erase setup command */
574 device->controller->command(device, NAND_CMD_ERASE1);
576 page = i * (device->erase_size / device->page_size);
578 /* Send page address */
579 if (device->page_size <= 512)
582 device->controller->address(device, page & 0xff);
583 device->controller->address(device, (page >> 8) & 0xff);
585 /* 3rd cycle only on devices with more than 32 MiB */
586 if (device->address_cycles >= 4)
587 device->controller->address(device, (page >> 16) & 0xff);
589 /* 4th cycle only on devices with more than 8 GiB */
590 if (device->address_cycles >= 5)
591 device->controller->address(device, (page >> 24) & 0xff);
596 device->controller->address(device, page & 0xff);
597 device->controller->address(device, (page >> 8) & 0xff);
599 /* 3rd cycle only on devices with more than 128 MiB */
600 if (device->address_cycles >= 5)
601 device->controller->address(device, (page >> 16) & 0xff);
604 /* Send erase confirm command */
605 device->controller->command(device, NAND_CMD_ERASE2);
607 if (!device->controller->nand_ready(device, 1000))
609 ERROR("timeout waiting for NAND flash block erase to complete");
610 return ERROR_NAND_OPERATION_TIMEOUT;
613 if ((retval = nand_read_status(device, &status)) != ERROR_OK)
615 ERROR("couldn't read status");
616 return ERROR_NAND_OPERATION_FAILED;
621 ERROR("erase operation didn't pass, status: 0x%2.2x", status);
622 return ERROR_NAND_OPERATION_FAILED;
629 int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size)
634 return ERROR_NAND_DEVICE_NOT_PROBED;
636 if (address % device->page_size)
638 ERROR("reads need to be page aligned");
639 return ERROR_NAND_OPERATION_FAILED;
642 page = malloc(device->page_size);
644 while (data_size > 0 )
646 u32 thisrun_size = (data_size > device->page_size) ? device->page_size : data_size;
650 page_address = address / device->page_size;
652 nand_read_page(device, page_address, page, device->page_size, NULL, 0);
654 memcpy(data, page, thisrun_size);
656 address += thisrun_size;
657 data += thisrun_size;
658 data_size -= thisrun_size;
666 int nand_write_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size)
671 return ERROR_NAND_DEVICE_NOT_PROBED;
673 if (address % device->page_size)
675 ERROR("writes need to be page aligned");
676 return ERROR_NAND_OPERATION_FAILED;
679 page = malloc(device->page_size);
681 while (data_size > 0 )
683 u32 thisrun_size = (data_size > device->page_size) ? device->page_size : data_size;
686 memset(page, 0xff, device->page_size);
687 memcpy(page, data, thisrun_size);
689 page_address = address / device->page_size;
691 nand_write_page(device, page_address, page, device->page_size, NULL, 0);
693 address += thisrun_size;
694 data += thisrun_size;
695 data_size -= thisrun_size;
703 int nand_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
706 return ERROR_NAND_DEVICE_NOT_PROBED;
709 return nand_write_page_raw(device, page, data, data_size, oob, oob_size);
711 return device->controller->write_page(device, page, data, data_size, oob, oob_size);
714 int nand_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
717 return ERROR_NAND_DEVICE_NOT_PROBED;
720 return nand_read_page_raw(device, page, data, data_size, oob, oob_size);
722 return device->controller->read_page(device, page, data, data_size, oob, oob_size);
725 int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
730 return ERROR_NAND_DEVICE_NOT_PROBED;
732 if (device->page_size <= 512)
734 /* small page device */
736 device->controller->command(device, NAND_CMD_READ0);
738 device->controller->command(device, NAND_CMD_READOOB);
740 /* column (always 0, we start at the beginning of a page/OOB area) */
741 device->controller->address(device, 0x0);
744 device->controller->address(device, page & 0xff);
745 device->controller->address(device, (page >> 8) & 0xff);
747 /* 4th cycle only on devices with more than 32 MiB */
748 if (device->address_cycles >= 4)
749 device->controller->address(device, (page >> 16) & 0xff);
751 /* 5th cycle only on devices with more than 8 GiB */
752 if (device->address_cycles >= 5)
753 device->controller->address(device, (page >> 24) & 0xff);
757 /* large page device */
758 device->controller->command(device, NAND_CMD_READ0);
760 /* column (0 when we start at the beginning of a page,
761 * or 2048 for the beginning of OOB area)
763 device->controller->address(device, 0x0);
764 device->controller->address(device, 0x8);
767 device->controller->address(device, page & 0xff);
768 device->controller->address(device, (page >> 8) & 0xff);
770 /* 5th cycle only on devices with more than 128 MiB */
771 if (device->address_cycles >= 5)
772 device->controller->address(device, (page >> 16) & 0xff);
774 /* large page devices need a start command */
775 device->controller->command(device, NAND_CMD_READSTART);
778 if (!device->controller->nand_ready(device, 100))
779 return ERROR_NAND_OPERATION_TIMEOUT;
783 for (i = 0; i < data_size;)
785 if (device->device->options & NAND_BUSWIDTH_16)
787 device->controller->read_data(device, data);
793 device->controller->read_data(device, data);
802 for (i = 0; i < oob_size;)
804 if (device->device->options & NAND_BUSWIDTH_16)
806 device->controller->read_data(device, oob);
812 device->controller->read_data(device, oob);
822 int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
829 return ERROR_NAND_DEVICE_NOT_PROBED;
831 device->controller->command(device, NAND_CMD_SEQIN);
833 if (device->page_size <= 512)
835 /* column (always 0, we start at the beginning of a page/OOB area) */
836 device->controller->address(device, 0x0);
839 device->controller->address(device, page & 0xff);
840 device->controller->address(device, (page >> 8) & 0xff);
842 /* 4th cycle only on devices with more than 32 MiB */
843 if (device->address_cycles >= 4)
844 device->controller->address(device, (page >> 16) & 0xff);
846 /* 5th cycle only on devices with more than 8 GiB */
847 if (device->address_cycles >= 5)
848 device->controller->address(device, (page >> 24) & 0xff);
852 /* column (0 when we start at the beginning of a page,
853 * or 2048 for the beginning of OOB area)
855 device->controller->address(device, 0x0);
856 device->controller->address(device, 0x8);
859 device->controller->address(device, page & 0xff);
860 device->controller->address(device, (page >> 8) & 0xff);
862 /* 5th cycle only on devices with more than 128 MiB */
863 if (device->address_cycles >= 5)
864 device->controller->address(device, (page >> 16) & 0xff);
869 for (i = 0; i < data_size;)
871 if (device->device->options & NAND_BUSWIDTH_16)
873 u16 data_buf = le_to_h_u16(data);
874 device->controller->write_data(device, data_buf);
880 device->controller->write_data(device, *data);
889 for (i = 0; i < oob_size;)
891 if (device->device->options & NAND_BUSWIDTH_16)
893 u16 oob_buf = le_to_h_u16(data);
894 device->controller->write_data(device, oob_buf);
900 device->controller->write_data(device, *oob);
907 device->controller->command(device, NAND_CMD_PAGEPROG);
909 if (!device->controller->nand_ready(device, 100))
910 return ERROR_NAND_OPERATION_TIMEOUT;
912 if ((retval = nand_read_status(device, &status)) != ERROR_OK)
914 ERROR("couldn't read status");
915 return ERROR_NAND_OPERATION_FAILED;
918 if (status & NAND_STATUS_FAIL)
920 ERROR("write operation didn't pass, status: 0x%2.2x", status);
921 return ERROR_NAND_OPERATION_FAILED;
927 int handle_nand_list_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
934 command_print(cmd_ctx, "no NAND flash devices configured");
938 for (p = nand_devices; p; p = p->next)
941 command_print(cmd_ctx, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
942 i++, p->device->name, p->manufacturer->name, p->page_size, p->bus_width, p->erase_size);
944 command_print(cmd_ctx, "#%i: not probed");
950 int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
958 if ((argc < 1) || (argc > 3))
960 command_print(cmd_ctx, "usage: nand info <num> [<first> <last>]");
966 first = last = strtoul(args[1], NULL, 0);
970 first = strtoul(args[1], NULL, 0);
971 last = strtoul(args[2], NULL, 0);
974 p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
979 if (first >= p->num_blocks)
980 first = p->num_blocks - 1;
982 if (last >= p->num_blocks)
983 last = p->num_blocks - 1;
985 command_print(cmd_ctx, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
986 i++, p->device->name, p->manufacturer->name, p->page_size, p->bus_width, p->erase_size);
988 for (j = first; j <= last; j++)
990 char *erase_state, *bad_state;
992 if (p->blocks[j].is_erased == 0)
993 erase_state = "not erased";
994 else if (p->blocks[j].is_erased == 1)
995 erase_state = "erased";
997 erase_state = "erase state unknown";
999 if (p->blocks[j].is_bad == 0)
1001 else if (p->blocks[j].is_bad == 1)
1002 bad_state = " (marked bad)";
1004 bad_state = " (block condition unknown)";
1006 command_print(cmd_ctx, "\t#%i: 0x%8.8x (0x%xkB) %s%s",
1007 j, p->blocks[j].offset, p->blocks[j].size / 1024,
1008 erase_state, bad_state);
1013 command_print(cmd_ctx, "#%i: not probed");
1020 int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1027 command_print(cmd_ctx, "usage: nand probe <num>");
1031 p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1034 if ((retval = nand_probe(p)) == ERROR_OK)
1036 command_print(cmd_ctx, "NAND flash device '%s' found", p->device->name);
1038 else if (retval == ERROR_NAND_OPERATION_FAILED)
1040 command_print(cmd_ctx, "probing failed for NAND flash device");
1044 command_print(cmd_ctx, "unknown error when probing NAND flash device");
1049 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1055 int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1062 command_print(cmd_ctx, "usage: nand erase <num> <first> <last>");
1066 p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1069 int first = strtoul(args[1], NULL, 0);
1070 int last = strtoul(args[2], NULL, 0);
1072 if ((retval = nand_erase(p, first, last)) == ERROR_OK)
1074 command_print(cmd_ctx, "successfully erased blocks %i to %i on NAND flash device '%s'", first, last, p->device->name);
1076 else if (retval == ERROR_NAND_OPERATION_FAILED)
1078 command_print(cmd_ctx, "erase failed");
1082 command_print(cmd_ctx, "unknown error when erasing NAND flash device");
1087 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1093 int handle_nand_check_bad_blocks_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1100 if ((argc < 1) || (argc > 3) || (argc == 2))
1102 command_print(cmd_ctx, "usage: nand check_bad_blocks <num> [<first> <last>]");
1108 first = strtoul(args[1], NULL, 0);
1109 last = strtoul(args[2], NULL, 0);
1112 p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1115 if ((retval = nand_build_bbt(p, first, last)) == ERROR_OK)
1117 command_print(cmd_ctx, "checked NAND flash device for bad blocks, use \"nand info\" command to list blocks", p->device->name);
1119 else if (retval == ERROR_NAND_OPERATION_FAILED)
1121 command_print(cmd_ctx, "error when checking for bad blocks on NAND flash device");
1125 command_print(cmd_ctx, "unknown error when checking for bad blocks on NAND flash device");
1130 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1136 int handle_nand_copy_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1142 command_print(cmd_ctx, "usage: nand copy <num> <offset> <length> <ram-address>");
1146 p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1153 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1159 int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1164 enum oob_formats oob_format = NAND_OOB_NONE;
1167 fileio_image_t image_info;
1168 int sec_type_identified = 0;
1169 enum fileio_sec_type sec_type;
1171 duration_t duration;
1172 char *duration_text;
1178 command_print(cmd_ctx, "usage: nand write <num> <file> <offset> [options]");
1182 p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1190 duration_start_measure(&duration);
1191 strtoul(args[2], NULL, 0);
1196 for (i = 3; i < argc; i++)
1198 if (!strcmp(args[i], "oob_raw"))
1199 oob_format |= NAND_OOB_RAW;
1200 else if (!strcmp(args[i], "oob_only"))
1201 oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY;
1204 if (fileio_identify_image_type(&sec_type, args[i]) == ERROR_OK)
1206 sec_type_identified = 1;
1210 command_print(cmd_ctx, "unknown option: %s", args[i]);
1216 /* if no image type option was encountered, set the default */
1217 if (!sec_type_identified)
1220 fileio_identify_image_type(&sec_type, NULL);
1221 sec_type_identified = 1;
1224 image_info.base_address = strtoul(args[2], NULL, 0);
1225 image_info.has_start_address = 0;
1227 if (fileio_open(&file, args[1], FILEIO_READ,
1228 FILEIO_IMAGE, &image_info, sec_type) != ERROR_OK)
1230 command_print(cmd_ctx, "flash write error: %s", file.error_str);
1234 /* the offset might have been overwritten by the image base address */
1235 offset = image_info.base_address;
1237 buf_cnt = binary_size = file.size;
1239 if (!(oob_format & NAND_OOB_ONLY))
1241 page_size = p->page_size;
1242 page = malloc(p->page_size);
1245 if (oob_format & NAND_OOB_RAW)
1247 if (p->page_size == 512)
1249 else if (p->page_size == 2048)
1251 oob = malloc(oob_size);
1254 if (offset % p->page_size)
1256 command_print(cmd_ctx, "only page size aligned offsets and sizes are supported");
1266 fileio_read(&file, page_size, page, &size_read);
1267 buf_cnt -= size_read;
1268 if (size_read < page_size)
1270 memset(page + size_read, 0xff, page_size - size_read);
1276 fileio_read(&file, oob_size, oob, &size_read);
1277 buf_cnt -= size_read;
1278 if (size_read < oob_size)
1280 memset(oob + size_read, 0xff, oob_size - size_read);
1284 if (nand_write_page(p, offset / p->page_size, page, page_size, oob, oob_size) != ERROR_OK)
1286 command_print(cmd_ctx, "failed writing file %s to NAND flash %s at offset 0x%8.8x",
1287 file.url, args[0], offset);
1290 offset += page_size;
1293 duration_stop_measure(&duration, &duration_text);
1294 command_print(cmd_ctx, "wrote file %s to NAND flash %s at offset 0x%8.8x in %s",
1295 file.url, args[0], image_info.base_address, duration_text);
1296 free(duration_text);
1300 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1306 int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1312 command_print(cmd_ctx, "usage: nand dump <num> <filename> <address> <size> [options]");
1316 p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1322 fileio_image_t image_info;
1323 duration_t duration;
1324 char *duration_text;
1331 u32 address = strtoul(args[2], NULL, 0);
1332 u32 size = strtoul(args[3], NULL, 0);
1334 enum oob_formats oob_format = NAND_OOB_NONE;
1339 for (i = 4; i < argc; i++)
1341 if (!strcmp(args[i], "oob_raw"))
1342 oob_format |= NAND_OOB_RAW;
1343 else if (!strcmp(args[i], "oob_only"))
1344 oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY;
1346 command_print(cmd_ctx, "unknown option: '%s'", args[i]);
1350 if ((address % p->page_size) || (size % p->page_size))
1352 command_print(cmd_ctx, "only page size aligned addresses and sizes are supported");
1356 if (!(oob_format & NAND_OOB_ONLY))
1358 page_size = p->page_size;
1359 page = malloc(p->page_size);
1362 if (oob_format & NAND_OOB_RAW)
1364 if (p->page_size == 512)
1366 else if (p->page_size == 2048)
1368 oob = malloc(oob_size);
1371 image_info.base_address = address;
1372 image_info.has_start_address = 0;
1374 if (fileio_open(&file, args[1], FILEIO_WRITE,
1375 FILEIO_IMAGE, &image_info, FILEIO_PLAIN) != ERROR_OK)
1377 command_print(cmd_ctx, "dump_image error: %s", file.error_str);
1381 duration_start_measure(&duration);
1386 if ((retval = nand_read_page(p, address / p->page_size, page, page_size, oob, oob_size)) != ERROR_OK)
1388 command_print(cmd_ctx, "reading NAND flash page failed");
1394 fileio_write(&file, page_size, page, &size_written);
1395 bytes_done += page_size;
1400 fileio_write(&file, oob_size, oob, &size_written);
1401 bytes_done += oob_size;
1404 size -= p->page_size;
1405 address += p->page_size;
1414 fileio_close(&file);
1416 duration_stop_measure(&duration, &duration_text);
1417 command_print(cmd_ctx, "dumped %lli byte in %s", file.size, duration_text);
1418 free(duration_text);
1422 command_print(cmd_ctx, "#%i: not probed");
1427 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1433 int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1437 if ((argc < 1) || (argc > 2))
1439 command_print(cmd_ctx, "usage: nand raw_access <num> ['enable'|'disable']");
1443 p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1450 if (strcmp("enable", args[1]) == 0)
1454 else if (strcmp("disable", args[1]) == 0)
1460 command_print(cmd_ctx, "usage: nand raw_access ['enable'|disable']");
1464 command_print(cmd_ctx, "raw access is %s", (p->use_raw) ? "enabled" : "disabled");
1468 command_print(cmd_ctx, "#%i: not probed");
1473 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);