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   1 /***************************************************************************
   2  *   Copyright (C) 2013 by Andes Technology                                *
   3  *   Hsiangkai Wang <hkwang@andestech.com>                                 *
   4  *                                                                         *
   5  *   This program is free software; you can redistribute it and/or modify  *
   6  *   it under the terms of the GNU General Public License as published by  *
   7  *   the Free Software Foundation; either version 2 of the License, or     *
   8  *   (at your option) any later version.                                   *
   9  *                                                                         *
  10  *   This program is distributed in the hope that it will be useful,       *
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  13  *   GNU General Public License for more details.                          *
  14  *                                                                         *
  15  *   You should have received a copy of the GNU General Public License     *
  16  *   along with this program; if not, write to the                         *
  17  *   Free Software Foundation, Inc.,                                       *
  18  *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
  19  ***************************************************************************/
  20 #ifndef __AICE_USB_H__
  21 #define __AICE_USB_H__
  22
  23 #include "aice_port.h"
  24
  25 /* AICE USB timeout value */
  26 #define AICE_USB_TIMEOUT                                5000
  27
  28 /* AICE USB buffer size */
  29 #define AICE_IN_BUFFER_SIZE                             2048
  30 #define AICE_OUT_BUFFER_SIZE                    2048
  31 #define AICE_IN_PACKETS_BUFFER_SIZE             2048
  32 #define AICE_OUT_PACKETS_BUFFER_SIZE    2048
  33 #define AICE_IN_BATCH_COMMAND_SIZE              512
  34 #define AICE_OUT_BATCH_COMMAND_SIZE             512
  35 #define AICE_IN_PACK_COMMAND_SIZE               2048
  36 #define AICE_OUT_PACK_COMMAND_SIZE              2048
  37
  38 /* Constants for AICE command */
  39 #define AICE_CMD_SCAN_CHAIN                     0x00
  40 #define AICE_CMD_SELECT_TARGET          0x01
  41 #define AICE_CMD_READ_DIM                       0x02
  42 #define AICE_CMD_READ_EDMSR                     0x03
  43 #define AICE_CMD_READ_DTR                       0x04
  44 #define AICE_CMD_READ_MEM                       0x05
  45 #define AICE_CMD_READ_MISC                      0x06
  46 #define AICE_CMD_FASTREAD_MEM           0x07
  47 #define AICE_CMD_WRITE_DIM                      0x08
  48 #define AICE_CMD_WRITE_EDMSR            0x09
  49 #define AICE_CMD_WRITE_DTR                      0x0A
  50 #define AICE_CMD_WRITE_MEM                      0x0B
  51 #define AICE_CMD_WRITE_MISC                     0x0C
  52 #define AICE_CMD_FASTWRITE_MEM          0x0D
  53 #define AICE_CMD_EXECUTE                        0x0E
  54 #define AICE_CMD_READ_MEM_B                     0x14
  55 #define AICE_CMD_READ_MEM_H                     0x15
  56 #define AICE_CMD_T_READ_MISC            0x20
  57 #define AICE_CMD_T_READ_EDMSR           0x21
  58 #define AICE_CMD_T_READ_DTR                     0x22
  59 #define AICE_CMD_T_READ_DIM                     0x23
  60 #define AICE_CMD_T_READ_MEM_B           0x24
  61 #define AICE_CMD_T_READ_MEM_H           0x25
  62 #define AICE_CMD_T_READ_MEM                     0x26
  63 #define AICE_CMD_T_FASTREAD_MEM         0x27
  64 #define AICE_CMD_T_WRITE_MISC           0x28
  65 #define AICE_CMD_T_WRITE_EDMSR          0x29
  66 #define AICE_CMD_T_WRITE_DTR            0x2A
  67 #define AICE_CMD_T_WRITE_DIM            0x2B
  68 #define AICE_CMD_T_WRITE_MEM_B          0x2C
  69 #define AICE_CMD_T_WRITE_MEM_H          0x2D
  70 #define AICE_CMD_T_WRITE_MEM            0x2E
  71 #define AICE_CMD_T_FASTWRITE_MEM        0x2F
  72 #define AICE_CMD_T_GET_TRACE_STATUS     0x36
  73 #define AICE_CMD_T_EXECUTE                      0x3E
  74 #define AICE_CMD_AICE_PROGRAM_READ      0x40
  75 #define AICE_CMD_AICE_PROGRAM_WRITE     0x41
  76 #define AICE_CMD_AICE_PROGRAM_CONTROL   0x42
  77 #define AICE_CMD_READ_CTRL                      0x50
  78 #define AICE_CMD_WRITE_CTRL                     0x51
  79 #define AICE_CMD_BATCH_BUFFER_READ      0x60
  80 #define AICE_CMD_READ_DTR_TO_BUFFER     0x61
  81 #define AICE_CMD_BATCH_BUFFER_WRITE     0x68
  82 #define AICE_CMD_WRITE_DTR_FROM_BUFFER  0x69
  83
  84 /* Constants for AICE command format length */
  85 #define AICE_FORMAT_HTDA                3
  86 #define AICE_FORMAT_HTDB                6
  87 #define AICE_FORMAT_HTDC                7
  88 #define AICE_FORMAT_HTDD                10
  89 #define AICE_FORMAT_HTDMA               4
  90 #define AICE_FORMAT_HTDMB               8
  91 #define AICE_FORMAT_HTDMC               8
  92 #define AICE_FORMAT_HTDMD               12
  93 #define AICE_FORMAT_DTHA                6
  94 #define AICE_FORMAT_DTHB                2
  95 #define AICE_FORMAT_DTHMA               8
  96 #define AICE_FORMAT_DTHMB               4
  97
  98 /* Constants for AICE command READ_CTRL */
  99 #define AICE_READ_CTRL_GET_ICE_STATE            0x00
 100 #define AICE_READ_CTRL_GET_HARDWARE_VERSION     0x01
 101 #define AICE_READ_CTRL_GET_FPGA_VERSION         0x02
 102 #define AICE_READ_CTRL_GET_FIRMWARE_VERSION     0x03
 103 #define AICE_READ_CTRL_GET_JTAG_PIN_STATUS      0x04
 104 #define AICE_READ_CTRL_BATCH_BUF_INFO           0x22
 105 #define AICE_READ_CTRL_BATCH_STATUS                     0x23
 106 #define AICE_READ_CTRL_BATCH_BUF0_STATE         0x31
 107 #define AICE_READ_CTRL_BATCH_BUF4_STATE         0x39
 108 #define AICE_READ_CTRL_BATCH_BUF5_STATE         0x3b
 109
 110 /* Constants for AICE command WRITE_CTRL */
 111 #define AICE_WRITE_CTRL_TCK_CONTROL                             0x00
 112 #define AICE_WRITE_CTRL_JTAG_PIN_CONTROL                0x01
 113 #define AICE_WRITE_CTRL_CLEAR_TIMEOUT_STATUS    0x02
 114 #define AICE_WRITE_CTRL_RESERVED                                0x03
 115 #define AICE_WRITE_CTRL_JTAG_PIN_STATUS                 0x04
 116 #define AICE_WRITE_CTRL_CUSTOM_DELAY                    0x0d
 117 #define AICE_WRITE_CTRL_BATCH_CTRL                              0x20
 118 #define AICE_WRITE_CTRL_BATCH_ITERATION                 0x21
 119 #define AICE_WRITE_CTRL_BATCH_DIM_SIZE                  0x22
 120 #define AICE_WRITE_CTRL_BATCH_CMD_BUF0_CTRL             0x30
 121 #define AICE_WRITE_CTRL_BATCH_DATA_BUF0_CTRL    0x38
 122 #define AICE_WRITE_CTRL_BATCH_DATA_BUF1_CTRL    0x3a
 123
 124 #define AICE_BATCH_COMMAND_BUFFER_0                     0x0
 125 #define AICE_BATCH_COMMAND_BUFFER_1                     0x1
 126 #define AICE_BATCH_COMMAND_BUFFER_2                     0x2
 127 #define AICE_BATCH_COMMAND_BUFFER_3                     0x3
 128 #define AICE_BATCH_DATA_BUFFER_0                        0x4
 129 #define AICE_BATCH_DATA_BUFFER_1                        0x5
 130 #define AICE_BATCH_DATA_BUFFER_2                        0x6
 131 #define AICE_BATCH_DATA_BUFFER_3                        0x7
 132
 133 /* Constants for AICE command WRITE_CTRL:TCK_CONTROL */
 134 #define AICE_TCK_CONTROL_TCK3048                0x08
 135
 136 /* Constants for AICE command WRITE_CTRL:JTAG_PIN_CONTROL */
 137 #define AICE_JTAG_PIN_CONTROL_SRST              0x01
 138 #define AICE_JTAG_PIN_CONTROL_TRST              0x02
 139 #define AICE_JTAG_PIN_CONTROL_STOP              0x04
 140 #define AICE_JTAG_PIN_CONTROL_RESTART   0x08
 141
 142 /* Constants for AICE command WRITE_CTRL:TCK_CONTROL */
 143 #define AICE_TCK_CONTROL_TCK_SCAN               0x10
 144
 145 /* Custom SRST/DBGI/TRST */
 146 #define AICE_CUSTOM_DELAY_SET_SRST              0x01
 147 #define AICE_CUSTOM_DELAY_CLEAN_SRST    0x02
 148 #define AICE_CUSTOM_DELAY_SET_DBGI              0x04
 149 #define AICE_CUSTOM_DELAY_CLEAN_DBGI    0x08
 150 #define AICE_CUSTOM_DELAY_SET_TRST              0x10
 151 #define AICE_CUSTOM_DELAY_CLEAN_TRST    0x20
 152
 153 struct aice_usb_handler_s {
 154         unsigned int usb_read_ep;
 155         unsigned int usb_write_ep;
 156         struct jtag_libusb_device_handle *usb_handle;
 157 };
 158
 159 struct cache_info {
 160         uint32_t set;
 161         uint32_t way;
 162         uint32_t line_size;
 163
 164         uint32_t log2_set;
 165         uint32_t log2_line_size;
 166 };
 167
 168 struct aice_nds32_info {
 169         uint32_t edm_version;
 170         uint32_t r0_backup;
 171         uint32_t r1_backup;
 172         uint32_t host_dtr_backup;
 173         uint32_t target_dtr_backup;
 174         uint32_t edmsw_backup;
 175         uint32_t edm_ctl_backup;
 176         bool debug_under_dex_on;
 177         bool dex_use_psw_on;
 178         bool host_dtr_valid;
 179         bool target_dtr_valid;
 180         enum nds_memory_access access_channel;
 181         enum nds_memory_select memory_select;
 182         enum aice_target_state_s core_state;
 183         bool cache_init;
 184         struct cache_info icache;
 185         struct cache_info dcache;
 186 };
 187
 188 extern struct aice_port_api_s aice_usb_api;
 189
 190 int aice_read_ctrl(uint32_t address, uint32_t *data);
 191 int aice_write_ctrl(uint32_t address, uint32_t data);
 192
 193 #endif