1 /***************************************************************************
2 * Copyright (C) 2007-2010 by Øyvind Harboe *
4 * This program is free software; you can redistribute it and/or modify *
5 * it under the terms of the GNU General Public License as published by *
6 * the Free Software Foundation; either version 2 of the License, or *
7 * (at your option) any later version. *
9 * This program is distributed in the hope that it will be useful, *
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
12 * GNU General Public License for more details. *
14 * You should have received a copy of the GNU General Public License *
15 * along with this program; if not, write to the *
16 * Free Software Foundation, Inc., *
17 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
18 ***************************************************************************/
20 /* This file supports the zy1000 debugger: http://www.zylin.com/zy1000.html
22 * The zy1000 is a standalone debugger that has a web interface and
23 * requires no drivers on the developer host as all communication
24 * is via TCP/IP. The zy1000 gets it performance(~400-700kBytes/s
25 * DCC downloads @ 16MHz target) as it has an FPGA to hardware
26 * accelerate the JTAG commands, while offering *very* low latency
27 * between OpenOCD and the FPGA registers.
29 * The disadvantage of the zy1000 is that it has a feeble CPU compared to
30 * a PC(ca. 50-500 DMIPS depending on how one counts it), whereas a PC
31 * is on the order of 10000 DMIPS(i.e. at a factor of 20-200).
33 * The zy1000 revc hardware is using an Altera Nios CPU, whereas the
34 * revb is using ARM7 + Xilinx.
36 * See Zylin web pages or contact Zylin for more information.
38 * The reason this code is in OpenOCD rather than OpenOCD linked with the
39 * ZY1000 code is that OpenOCD is the long road towards getting
40 * libopenocd into place. libopenocd will support both low performance,
41 * low latency systems(embedded) and high performance high latency
48 #include <target/embeddedice.h>
49 #include <jtag/minidriver.h>
50 #include <jtag/interface.h>
52 #include <helper/time_support.h>
54 #include <netinet/tcp.h>
57 #include "zy1000_version.h"
59 #include <cyg/hal/hal_io.h> // low level i/o
60 #include <cyg/hal/hal_diag.h>
62 #ifdef CYGPKG_HAL_NIOS2
63 #include <cyg/hal/io.h>
64 #include <cyg/firmwareutil/firmwareutil.h>
65 #define ZYLIN_KHZ 60000
67 #define ZYLIN_KHZ 64000
70 #define ZYLIN_VERSION GIT_ZY1000_VERSION
71 #define ZYLIN_DATE __DATE__
72 #define ZYLIN_TIME __TIME__
73 #define ZYLIN_OPENOCD GIT_OPENOCD_VERSION
74 #define ZYLIN_OPENOCD_VERSION "ZY1000 " ZYLIN_VERSION " " ZYLIN_DATE
77 /* Assume we're connecting to a revc w/60MHz clock. */
78 #define ZYLIN_KHZ 60000
82 /* The software needs to check if it's in RCLK mode or not */
83 static bool zy1000_rclk = false;
85 static int zy1000_khz(int khz, int *jtag_speed)
94 /* Round speed up to nearest divisor.
97 * (64000 + 15999) / 16000 = 4
104 * (64000 + 15998) / 15999 = 5
111 speed = (ZYLIN_KHZ + (khz -1)) / khz;
112 speed = (speed + 1 ) / 2;
116 /* maximum dividend */
124 static int zy1000_speed_div(int speed, int *khz)
132 *khz = ZYLIN_KHZ / speed;
138 static bool readPowerDropout(void)
141 // sample and clear power dropout
142 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x80);
143 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
145 powerDropout = (state & 0x80) != 0;
150 static bool readSRST(void)
153 // sample and clear SRST sensing
154 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000040);
155 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
157 srstAsserted = (state & 0x40) != 0;
161 static int zy1000_srst_asserted(int *srst_asserted)
163 *srst_asserted = readSRST();
167 static int zy1000_power_dropout(int *dropout)
169 *dropout = readPowerDropout();
173 void zy1000_reset(int trst, int srst)
175 LOG_DEBUG("zy1000 trst=%d, srst=%d", trst, srst);
177 /* flush the JTAG FIFO. Not flushing the queue before messing with
178 * reset has such interesting bugs as causing hard to reproduce
179 * RCLK bugs as RCLK will stop responding when TRST is asserted
185 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000001);
189 /* Danger!!! if clk != 0 when in
190 * idle in TAP_IDLE, reset halt on str912 will fail.
192 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000001);
197 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000002);
202 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000002);
205 if (trst||(srst && (jtag_get_reset_config() & RESET_SRST_PULLS_TRST)))
207 /* we're now in the RESET state until trst is deasserted */
208 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_RESET);
211 /* We'll get RCLK failure when we assert TRST, so clear any false positives here */
212 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
215 /* wait for srst to float back up */
216 if ((!srst && ((jtag_get_reset_config() & RESET_TRST_PULLS_SRST) == 0))||
217 (!srst && !trst && (jtag_get_reset_config() & RESET_TRST_PULLS_SRST)))
224 // We don't want to sense our own reset, so we clear here.
225 // There is of course a timing hole where we could loose
231 LOG_USER("SRST took %dms to deassert", (int)total);
239 start = timeval_ms();
242 total = timeval_ms() - start;
248 LOG_ERROR("SRST took too long to deassert: %dms", (int)total);
256 int zy1000_speed(int speed)
258 /* flush JTAG master FIFO before setting speed */
266 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x100);
268 LOG_DEBUG("jtag_speed using RCLK");
272 if (speed > 8190 || speed < 2)
274 LOG_USER("valid ZY1000 jtag_speed=[8190,2]. With divisor is %dkHz / even values between 8190-2, i.e. min %dHz, max %dMHz",
275 ZYLIN_KHZ, (ZYLIN_KHZ * 1000) / 8190, ZYLIN_KHZ / (2 * 1000));
276 return ERROR_INVALID_ARGUMENTS;
281 zy1000_speed_div(speed, &khz);
282 LOG_USER("jtag_speed %d => JTAG clk=%d kHz", speed, khz);
283 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x100);
284 ZY1000_POKE(ZY1000_JTAG_BASE + 0x1c, speed);
289 static bool savePower;
292 static void setPower(bool power)
297 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x8);
300 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x8);
304 COMMAND_HANDLER(handle_power_command)
310 COMMAND_PARSE_ON_OFF(CMD_ARGV[0], enable);
315 LOG_INFO("Target power %s", savePower ? "on" : "off");
318 return ERROR_INVALID_ARGUMENTS;
324 #if !BUILD_ZY1000_MASTER
325 static char *tcp_server = "notspecified";
326 static int jim_zy1000_server(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
331 tcp_server = strdup(Jim_GetString(argv[1], NULL));
338 /* Give TELNET a way to find out what version this is */
339 static int jim_zy1000_version(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
341 if ((argc < 1) || (argc > 3))
343 const char *version_str = NULL;
347 version_str = ZYLIN_OPENOCD_VERSION;
350 const char *str = Jim_GetString(argv[1], NULL);
351 const char *str2 = NULL;
353 str2 = Jim_GetString(argv[2], NULL);
354 if (strcmp("openocd", str) == 0)
356 version_str = ZYLIN_OPENOCD;
358 else if (strcmp("zy1000", str) == 0)
360 version_str = ZYLIN_VERSION;
362 else if (strcmp("date", str) == 0)
364 version_str = ZYLIN_DATE;
366 else if (strcmp("time", str) == 0)
368 version_str = ZYLIN_TIME;
370 else if (strcmp("pcb", str) == 0)
372 #ifdef CYGPKG_HAL_NIOS2
378 #ifdef CYGPKG_HAL_NIOS2
379 else if (strcmp("fpga", str) == 0)
382 /* return a list of 32 bit integers to describe the expected
385 static char *fpga_id = "0x12345678 0x12345678 0x12345678 0x12345678";
386 uint32_t id, timestamp;
387 HAL_READ_UINT32(SYSID_BASE, id);
388 HAL_READ_UINT32(SYSID_BASE+4, timestamp);
389 sprintf(fpga_id, "0x%08x 0x%08x 0x%08x 0x%08x", id, timestamp, SYSID_ID, SYSID_TIMESTAMP);
390 version_str = fpga_id;
391 if ((argc>2) && (strcmp("time", str2) == 0))
393 time_t last_mod = timestamp;
394 char * t = ctime (&last_mod) ;
407 Jim_SetResult(interp, Jim_NewStringObj(interp, version_str, -1));
413 #ifdef CYGPKG_HAL_NIOS2
419 struct cyg_upgrade_info *upgraded_file;
422 static void report_info(void *data, const char * format, va_list args)
424 char *s = alloc_vprintf(format, args);
429 struct cyg_upgrade_info firmware_info =
431 (uint8_t *)0x84000000,
437 "ZylinNiosFirmware\n",
441 // File written to /ram/firmware.phi before arriving at this fn
442 static int jim_zy1000_writefirmware(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
447 if (!cyg_firmware_upgrade(NULL, firmware_info))
455 zylinjtag_Jim_Command_powerstatus(Jim_Interp *interp,
457 Jim_Obj * const *argv)
461 Jim_WrongNumArgs(interp, 1, argv, "powerstatus");
465 bool dropout = readPowerDropout();
467 Jim_SetResult(interp, Jim_NewIntObj(interp, dropout));
474 int zy1000_quit(void)
482 int interface_jtag_execute_queue(void)
488 /* We must make sure to write data read back to memory location before we return
491 zy1000_flush_readqueue();
493 /* and handle any callbacks... */
494 zy1000_flush_callbackqueue();
498 /* Only check for errors when using RCLK to speed up
501 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, empty);
502 /* clear JTAG error register */
503 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
505 if ((empty&0x400) != 0)
507 LOG_WARNING("RCLK timeout");
508 /* the error is informative only as we don't want to break the firmware if there
509 * is a false positive.
511 // return ERROR_FAIL;
520 static void writeShiftValue(uint8_t *data, int bits);
522 // here we shuffle N bits out/in
523 static __inline void scanBits(const uint8_t *out_value, uint8_t *in_value, int num_bits, bool pause_now, tap_state_t shiftState, tap_state_t end_state)
525 tap_state_t pause_state = shiftState;
526 for (int j = 0; j < num_bits; j += 32)
528 int k = num_bits - j;
532 /* we have more to shift out */
533 } else if (pause_now)
535 /* this was the last to shift out this time */
536 pause_state = end_state;
539 // we have (num_bits + 7)/8 bytes of bits to toggle out.
540 // bits are pushed out LSB to MSB
543 if (out_value != NULL)
545 for (int l = 0; l < k; l += 8)
547 value|=out_value[(j + l)/8]<<l;
550 /* mask away unused bits for easier debugging */
553 value&=~(((uint32_t)0xffffffff) << k);
556 /* Shifting by >= 32 is not defined by the C standard
557 * and will in fact shift by &0x1f bits on nios */
560 shiftValueInner(shiftState, pause_state, k, value);
562 if (in_value != NULL)
564 writeShiftValue(in_value + (j/8), k);
569 static __inline void scanFields(int num_fields, const struct scan_field *fields, tap_state_t shiftState, tap_state_t end_state)
571 for (int i = 0; i < num_fields; i++)
573 scanBits(fields[i].out_value,
582 int interface_jtag_add_ir_scan(struct jtag_tap *active, const struct scan_field *fields, tap_state_t state)
585 struct jtag_tap *tap, *nextTap;
586 tap_state_t pause_state = TAP_IRSHIFT;
588 for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap = nextTap)
590 nextTap = jtag_tap_next_enabled(tap);
595 scan_size = tap->ir_length;
597 /* search the list */
600 scanFields(1, fields, TAP_IRSHIFT, pause_state);
601 /* update device information */
602 buf_cpy(fields[0].out_value, tap->cur_instr, scan_size);
607 /* if a device isn't listed, set it to BYPASS */
608 assert(scan_size <= 32);
609 shiftValueInner(TAP_IRSHIFT, pause_state, scan_size, 0xffffffff);
622 int interface_jtag_add_plain_ir_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits, tap_state_t state)
624 scanBits(out_bits, in_bits, num_bits, true, TAP_IRSHIFT, state);
628 int interface_jtag_add_dr_scan(struct jtag_tap *active, int num_fields, const struct scan_field *fields, tap_state_t state)
630 struct jtag_tap *tap, *nextTap;
631 tap_state_t pause_state = TAP_DRSHIFT;
632 for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap = nextTap)
634 nextTap = jtag_tap_next_enabled(tap);
640 /* Find a range of fields to write to this tap */
643 assert(!tap->bypass);
645 scanFields(num_fields, fields, TAP_DRSHIFT, pause_state);
648 /* Shift out a 0 for disabled tap's */
650 shiftValueInner(TAP_DRSHIFT, pause_state, 1, 0);
656 int interface_jtag_add_plain_dr_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits, tap_state_t state)
658 scanBits(out_bits, in_bits, num_bits, true, TAP_DRSHIFT, state);
662 int interface_jtag_add_tlr()
664 setCurrentState(TAP_RESET);
669 int interface_jtag_add_reset(int req_trst, int req_srst)
671 zy1000_reset(req_trst, req_srst);
675 static int zy1000_jtag_add_clocks(int num_cycles, tap_state_t state, tap_state_t clockstate)
677 /* num_cycles can be 0 */
678 setCurrentState(clockstate);
680 /* execute num_cycles, 32 at the time. */
682 for (i = 0; i < num_cycles; i += 32)
686 if (num_cycles-i < num)
690 shiftValueInner(clockstate, clockstate, num, 0);
694 /* finish in end_state */
695 setCurrentState(state);
697 tap_state_t t = TAP_IDLE;
698 /* test manual drive code on any target */
700 uint8_t tms_scan = tap_get_tms_path(t, state);
701 int tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
703 for (i = 0; i < tms_count; i++)
705 tms = (tms_scan >> i) & 1;
707 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
710 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
716 int interface_jtag_add_runtest(int num_cycles, tap_state_t state)
718 return zy1000_jtag_add_clocks(num_cycles, state, TAP_IDLE);
721 int interface_jtag_add_clocks(int num_cycles)
723 return zy1000_jtag_add_clocks(num_cycles, cmd_queue_cur_state, cmd_queue_cur_state);
726 int interface_add_tms_seq(unsigned num_bits, const uint8_t *seq, enum tap_state state)
728 /*wait for the fifo to be empty*/
731 for (unsigned i = 0; i < num_bits; i++)
735 if (((seq[i/8] >> (i % 8)) & 1) == 0)
745 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
749 if (state != TAP_INVALID)
751 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
754 /* this would be normal if we are switching to SWD mode */
759 int interface_jtag_add_pathmove(int num_states, const tap_state_t *path)
766 tap_state_t cur_state = cmd_queue_cur_state;
769 memset(seq, 0, sizeof(seq));
770 assert(num_states < (int)((sizeof(seq) * 8)));
774 if (tap_state_transition(cur_state, false) == path[state_count])
778 else if (tap_state_transition(cur_state, true) == path[state_count])
784 LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_name(cur_state), tap_state_name(path[state_count]));
788 seq[state_count/8] = seq[state_count/8] | (tms << (state_count % 8));
790 cur_state = path[state_count];
795 return interface_add_tms_seq(state_count, seq, cur_state);
798 static void jtag_pre_post_bits(struct jtag_tap *tap, int *pre, int *post)
800 /* bypass bits before and after */
805 struct jtag_tap *cur_tap, *nextTap;
806 for (cur_tap = jtag_tap_next_enabled(NULL); cur_tap!= NULL; cur_tap = nextTap)
808 nextTap = jtag_tap_next_enabled(cur_tap);
828 static const int embeddedice_num_bits[] = {32, 6};
832 values[1] = (1 << 5) | reg_addr;
836 embeddedice_num_bits,
841 void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, uint8_t *buffer, int little, int count)
845 for (i = 0; i < count; i++)
847 embeddedice_write_reg_inner(tap, reg_addr, fast_target_buffer_get_u32(buffer, little));
853 jtag_pre_post_bits(tap, &pre_bits, &post_bits);
855 if ((pre_bits > 32) || (post_bits + 6 > 32))
858 for (i = 0; i < count; i++)
860 embeddedice_write_reg_inner(tap, reg_addr, fast_target_buffer_get_u32(buffer, little));
866 for (i = 0; i < count; i++)
868 /* Fewer pokes means we get to use the FIFO more efficiently */
869 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
870 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, little));
871 /* Danger! here we need to exit into the TAP_IDLE state to make
872 * DCC pick up this value.
874 shiftValueInner(TAP_DRSHIFT, TAP_IDLE, 6 + post_bits, (reg_addr | (1 << 5)));
883 int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap * tap, uint32_t opcode, uint32_t * data, size_t count)
885 /* bypass bits before and after */
888 jtag_pre_post_bits(tap, &pre_bits, &post_bits);
891 if ((pre_bits > 32) || (post_bits > 32))
893 int arm11_run_instr_data_to_core_noack_inner_default(struct jtag_tap *, uint32_t, uint32_t *, size_t);
894 return arm11_run_instr_data_to_core_noack_inner_default(tap, opcode, data, count);
897 static const int bits[] = {32, 2};
898 uint32_t values[] = {0, 0};
900 /* FIX!!!!!! the target_write_memory() API started this nasty problem
901 * with unaligned uint32_t * pointers... */
902 const uint8_t *t = (const uint8_t *)data;
907 /* Danger! This code doesn't update cmd_queue_cur_state, so
908 * invoking jtag_add_pathmove() before jtag_add_dr_out() after
909 * this loop would fail!
911 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
919 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, value);
921 shiftValueInner(TAP_DRSHIFT, TAP_DRPAUSE, post_bits, 0);
923 /* copy & paste from arm11_dbgtap.c */
924 //TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
925 /* KLUDGE! we have to flush the fifo or the Nios CPU locks up.
926 * This is probably a bug in the Avalon bus(cross clocking bridge?)
927 * or in the jtag registers module.
930 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
931 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
932 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
933 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
934 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
935 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
936 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
937 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
938 /* we don't have to wait for the queue to empty here */
939 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_DRSHIFT);
942 static const tap_state_t arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay[] =
944 TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
948 values[0] |= (*t++<<8);
949 values[0] |= (*t++<<16);
950 values[0] |= (*t++<<24);
958 jtag_add_pathmove(ARRAY_SIZE(arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay),
959 arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay);
964 values[0] |= (*t++<<8);
965 values[0] |= (*t++<<16);
966 values[0] |= (*t++<<24);
968 /* This will happen on the last iteration updating cmd_queue_cur_state
969 * so we don't have to track it during the common code path
977 return jtag_execute_queue();
982 static const struct command_registration zy1000_commands[] = {
985 .handler = handle_power_command,
987 .help = "Turn power switch to target on/off. "
988 "With no arguments, prints status.",
989 .usage = "('on'|'off)",
991 #if BUILD_ZY1000_MASTER
994 .name = "zy1000_version",
996 .jim_handler = jim_zy1000_version,
997 .help = "Print version info for zy1000.",
998 .usage = "['openocd'|'zy1000'|'date'|'time'|'pcb'|'fpga']",
1003 .name = "zy1000_server",
1004 .mode = COMMAND_ANY,
1005 .jim_handler = jim_zy1000_server,
1006 .help = "Tcpip address for ZY1000 server.",
1011 .name = "powerstatus",
1012 .mode = COMMAND_ANY,
1013 .jim_handler = zylinjtag_Jim_Command_powerstatus,
1014 .help = "Returns power status of target",
1016 #ifdef CYGPKG_HAL_NIOS2
1018 .name = "updatezy1000firmware",
1019 .mode = COMMAND_ANY,
1020 .jim_handler = jim_zy1000_writefirmware,
1021 .help = "writes firmware to flash",
1022 /* .usage = "some_string", */
1025 COMMAND_REGISTRATION_DONE
1029 #if !BUILD_ZY1000_MASTER || BUILD_ECOSBOARD
1030 static int tcp_ip = -1;
1032 /* Write large packets if we can */
1033 static size_t out_pos;
1034 static uint8_t out_buffer[16384];
1035 static size_t in_pos;
1036 static size_t in_write;
1037 static uint8_t in_buffer[16384];
1039 static bool flush_writes(void)
1041 bool ok = (write(tcp_ip, out_buffer, out_pos) == (int)out_pos);
1046 static bool writeLong(uint32_t l)
1049 for (i = 0; i < 4; i++)
1051 uint8_t c = (l >> (i*8))&0xff;
1052 out_buffer[out_pos++] = c;
1053 if (out_pos >= sizeof(out_buffer))
1055 if (!flush_writes())
1064 static bool readLong(uint32_t *out_data)
1068 if (!flush_writes())
1076 for (i = 0; i < 4; i++)
1079 if (in_pos == in_write)
1083 t = read(tcp_ip, in_buffer, sizeof(in_buffer));
1088 in_write = (size_t) t;
1091 c = in_buffer[in_pos++];
1093 data |= (c << (i*8));
1102 ZY1000_CMD_POKE = 0x0,
1103 ZY1000_CMD_PEEK = 0x8,
1104 ZY1000_CMD_SLEEP = 0x1,
1105 ZY1000_CMD_WAITIDLE = 2
1109 #if !BUILD_ZY1000_MASTER
1111 #include <sys/socket.h> /* for socket(), connect(), send(), and recv() */
1112 #include <arpa/inet.h> /* for sockaddr_in and inet_addr() */
1114 /* We initialize this late since we need to know the server address
1117 static void tcpip_open(void)
1122 struct sockaddr_in echoServAddr; /* Echo server address */
1124 /* Create a reliable, stream socket using TCP */
1125 if ((tcp_ip = socket(PF_INET, SOCK_STREAM, IPPROTO_TCP)) < 0)
1127 fprintf(stderr, "Failed to connect to zy1000 server\n");
1131 /* Construct the server address structure */
1132 memset(&echoServAddr, 0, sizeof(echoServAddr)); /* Zero out structure */
1133 echoServAddr.sin_family = AF_INET; /* Internet address family */
1134 echoServAddr.sin_addr.s_addr = inet_addr(tcp_server); /* Server IP address */
1135 echoServAddr.sin_port = htons(7777); /* Server port */
1137 /* Establish the connection to the echo server */
1138 if (connect(tcp_ip, (struct sockaddr *) &echoServAddr, sizeof(echoServAddr)) < 0)
1140 fprintf(stderr, "Failed to connect to zy1000 server\n");
1145 setsockopt(tcp_ip, /* socket affected */
1146 IPPROTO_TCP, /* set option at TCP level */
1147 TCP_NODELAY, /* name of option */
1148 (char *)&flag, /* the cast is historical cruft */
1149 sizeof(int)); /* length of option value */
1155 void zy1000_tcpout(uint32_t address, uint32_t data)
1158 if (!writeLong((ZY1000_CMD_POKE << 24) | address)||
1161 fprintf(stderr, "Could not write to zy1000 server\n");
1166 /* By sending the wait to the server, we avoid a readback
1167 * of status. Radically improves performance for this operation
1168 * with long ping times.
1173 if (!writeLong((ZY1000_CMD_WAITIDLE << 24)))
1175 fprintf(stderr, "Could not write to zy1000 server\n");
1180 uint32_t zy1000_tcpin(uint32_t address)
1184 zy1000_flush_readqueue();
1187 if (!writeLong((ZY1000_CMD_PEEK << 24) | address)||
1190 fprintf(stderr, "Could not read from zy1000 server\n");
1196 int interface_jtag_add_sleep(uint32_t us)
1199 if (!writeLong((ZY1000_CMD_SLEEP << 24))||
1202 fprintf(stderr, "Could not read from zy1000 server\n");
1208 /* queue a readback */
1209 #define readqueue_size 16384
1214 } readqueue[readqueue_size];
1216 static int readqueue_pos = 0;
1218 /* flush the readqueue, this means reading any data that
1219 * we're expecting and store them into the final position
1221 void zy1000_flush_readqueue(void)
1223 if (readqueue_pos == 0)
1225 /* simply debugging by allowing easy breakpoints when there
1226 * is something to do. */
1231 for (i = 0; i < readqueue_pos; i++)
1234 if (!readLong(&value))
1236 fprintf(stderr, "Could not read from zy1000 server\n");
1240 uint8_t *in_value = readqueue[i].dest;
1241 int k = readqueue[i].bits;
1243 // we're shifting in data to MSB, shift data to be aligned for returning the value
1246 for (int l = 0; l < k; l += 8)
1248 in_value[l/8]=(value >> l)&0xff;
1254 /* By queuing the callback's we avoid flushing the
1255 read queue until jtag_execute_queue(). This can
1256 reduce latency dramatically for cases where
1257 callbacks are used extensively.
1259 #define callbackqueue_size 128
1260 static struct callbackentry
1262 jtag_callback_t callback;
1263 jtag_callback_data_t data0;
1264 jtag_callback_data_t data1;
1265 jtag_callback_data_t data2;
1266 jtag_callback_data_t data3;
1267 } callbackqueue[callbackqueue_size];
1269 static int callbackqueue_pos = 0;
1271 void zy1000_jtag_add_callback4(jtag_callback_t callback, jtag_callback_data_t data0, jtag_callback_data_t data1, jtag_callback_data_t data2, jtag_callback_data_t data3)
1273 if (callbackqueue_pos >= callbackqueue_size)
1275 zy1000_flush_callbackqueue();
1278 callbackqueue[callbackqueue_pos].callback = callback;
1279 callbackqueue[callbackqueue_pos].data0 = data0;
1280 callbackqueue[callbackqueue_pos].data1 = data1;
1281 callbackqueue[callbackqueue_pos].data2 = data2;
1282 callbackqueue[callbackqueue_pos].data3 = data3;
1283 callbackqueue_pos++;
1286 static int zy1000_jtag_convert_to_callback4(jtag_callback_data_t data0, jtag_callback_data_t data1, jtag_callback_data_t data2, jtag_callback_data_t data3)
1288 ((jtag_callback1_t)data1)(data0);
1292 void zy1000_jtag_add_callback(jtag_callback1_t callback, jtag_callback_data_t data0)
1294 zy1000_jtag_add_callback4(zy1000_jtag_convert_to_callback4, data0, (jtag_callback_data_t)callback, 0, 0);
1297 void zy1000_flush_callbackqueue(void)
1299 /* we have to flush the read queue so we have access to
1300 the data the callbacks will use
1302 zy1000_flush_readqueue();
1304 for (i = 0; i < callbackqueue_pos; i++)
1306 struct callbackentry *entry = &callbackqueue[i];
1307 jtag_set_error(entry->callback(entry->data0, entry->data1, entry->data2, entry->data3));
1309 callbackqueue_pos = 0;
1312 static void writeShiftValue(uint8_t *data, int bits)
1316 if (!writeLong((ZY1000_CMD_PEEK << 24) | (ZY1000_JTAG_BASE + 0xc)))
1318 fprintf(stderr, "Could not read from zy1000 server\n");
1322 if (readqueue_pos >= readqueue_size)
1324 zy1000_flush_readqueue();
1327 readqueue[readqueue_pos].dest = data;
1328 readqueue[readqueue_pos].bits = bits;
1334 static void writeShiftValue(uint8_t *data, int bits)
1338 ZY1000_PEEK(ZY1000_JTAG_BASE + 0xc, value);
1339 VERBOSE(LOG_INFO("getShiftValue %08x", value));
1341 // data in, LSB to MSB
1342 // we're shifting in data to MSB, shift data to be aligned for returning the value
1343 value >>= 32 - bits;
1345 for (int l = 0; l < bits; l += 8)
1347 data[l/8]=(value >> l)&0xff;
1354 static char tcpip_stack[2048];
1355 static cyg_thread tcpip_thread_object;
1356 static cyg_handle_t tcpip_thread_handle;
1358 static char watchdog_stack[2048];
1359 static cyg_thread watchdog_thread_object;
1360 static cyg_handle_t watchdog_thread_handle;
1362 /* Infinite loop peeking & poking */
1363 static void tcpipserver(void)
1368 if (!readLong(&address))
1370 enum ZY1000_CMD c = (address >> 24) & 0xff;
1371 address &= 0xffffff;
1374 case ZY1000_CMD_POKE:
1377 if (!readLong(&data))
1379 address &= ~0x80000000;
1380 ZY1000_POKE(address + ZY1000_JTAG_BASE, data);
1383 case ZY1000_CMD_PEEK:
1386 ZY1000_PEEK(address + ZY1000_JTAG_BASE, data);
1387 if (!writeLong(data))
1391 case ZY1000_CMD_SLEEP:
1394 if (!readLong(&data))
1399 case ZY1000_CMD_WAITIDLE:
1411 static void tcpip_server(cyg_addrword_t data)
1413 int so_reuseaddr_option = 1;
1416 if ((fd = socket(AF_INET, SOCK_STREAM, 0)) == -1)
1418 LOG_ERROR("error creating socket: %s", strerror(errno));
1422 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (void*) &so_reuseaddr_option,
1425 struct sockaddr_in sin;
1426 unsigned int address_size;
1427 address_size = sizeof(sin);
1428 memset(&sin, 0, sizeof(sin));
1429 sin.sin_family = AF_INET;
1430 sin.sin_addr.s_addr = INADDR_ANY;
1431 sin.sin_port = htons(7777);
1433 if (bind(fd, (struct sockaddr *) &sin, sizeof(sin)) == -1)
1435 LOG_ERROR("couldn't bind to socket: %s", strerror(errno));
1439 if (listen(fd, 1) == -1)
1441 LOG_ERROR("couldn't listen on socket: %s", strerror(errno));
1448 tcp_ip = accept(fd, (struct sockaddr *) &sin, &address_size);
1455 setsockopt(tcp_ip, /* socket affected */
1456 IPPROTO_TCP, /* set option at TCP level */
1457 TCP_NODELAY, /* name of option */
1458 (char *)&flag, /* the cast is historical cruft */
1459 sizeof(int)); /* length of option value */
1461 bool save_poll = jtag_poll_get_enabled();
1463 /* polling will screw up the "connection" */
1464 jtag_poll_set_enabled(false);
1468 jtag_poll_set_enabled(save_poll);
1477 #ifdef WATCHDOG_BASE
1478 /* If we connect to port 8888 we must send a char every 10s or the board resets itself */
1479 static void watchdog_server(cyg_addrword_t data)
1481 int so_reuseaddr_option = 1;
1484 if ((fd = socket(AF_INET, SOCK_STREAM, 0)) == -1)
1486 LOG_ERROR("error creating socket: %s", strerror(errno));
1490 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (void*) &so_reuseaddr_option,
1493 struct sockaddr_in sin;
1494 unsigned int address_size;
1495 address_size = sizeof(sin);
1496 memset(&sin, 0, sizeof(sin));
1497 sin.sin_family = AF_INET;
1498 sin.sin_addr.s_addr = INADDR_ANY;
1499 sin.sin_port = htons(8888);
1501 if (bind(fd, (struct sockaddr *) &sin, sizeof(sin)) == -1)
1503 LOG_ERROR("couldn't bind to socket: %s", strerror(errno));
1507 if (listen(fd, 1) == -1)
1509 LOG_ERROR("couldn't listen on socket: %s", strerror(errno));
1516 int watchdog_ip = accept(fd, (struct sockaddr *) &sin, &address_size);
1518 /* Start watchdog, must be reset every 10 seconds. */
1519 HAL_WRITE_UINT32(WATCHDOG_BASE + 4, 4);
1521 if (watchdog_ip < 0)
1523 LOG_ERROR("couldn't open watchdog socket: %s", strerror(errno));
1528 setsockopt(watchdog_ip, /* socket affected */
1529 IPPROTO_TCP, /* set option at TCP level */
1530 TCP_NODELAY, /* name of option */
1531 (char *)&flag, /* the cast is historical cruft */
1532 sizeof(int)); /* length of option value */
1538 if (read(watchdog_ip, &buf, 1) == 1)
1541 HAL_WRITE_UINT32(WATCHDOG_BASE + 8, 0x1234);
1542 /* Echo so we can telnet in and see that resetting works */
1543 write(watchdog_ip, &buf, 1);
1546 /* Stop tickling the watchdog, the CPU will reset in < 10 seconds
1561 #if BUILD_ZY1000_MASTER
1562 int interface_jtag_add_sleep(uint32_t us)
1569 #if BUILD_ZY1000_MASTER && !BUILD_ECOSBOARD
1570 volatile void *zy1000_jtag_master;
1571 #include <sys/mman.h>
1574 int zy1000_init(void)
1577 LOG_USER("%s", ZYLIN_OPENOCD_VERSION);
1578 #elif BUILD_ZY1000_MASTER
1580 if((fd = open("/dev/mem", O_RDWR | O_SYNC)) == -1)
1582 LOG_ERROR("No access to /dev/mem");
1585 #ifndef REGISTERS_BASE
1586 #define REGISTERS_BASE 0x9002000
1587 #define REGISTERS_SPAN 128
1590 zy1000_jtag_master = mmap(0, REGISTERS_SPAN, PROT_READ | PROT_WRITE, MAP_SHARED, fd, REGISTERS_BASE);
1592 if(zy1000_jtag_master == (void *) -1)
1595 LOG_ERROR("No access to /dev/mem");
1602 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x30); // Turn on LED1 & LED2
1604 setPower(true); // on by default
1607 /* deassert resets. Important to avoid infinite loop waiting for SRST to deassert */
1610 int retval = jtag_get_speed(&jtag_speed_var);
1611 if (retval != ERROR_OK)
1613 zy1000_speed(jtag_speed_var);
1617 cyg_thread_create(1, tcpip_server, (cyg_addrword_t) 0, "tcip/ip server",
1618 (void *) tcpip_stack, sizeof(tcpip_stack),
1619 &tcpip_thread_handle, &tcpip_thread_object);
1620 cyg_thread_resume(tcpip_thread_handle);
1621 #ifdef WATCHDOG_BASE
1622 cyg_thread_create(1, watchdog_server, (cyg_addrword_t) 0, "watchdog tcip/ip server",
1623 (void *) watchdog_stack, sizeof(watchdog_stack),
1624 &watchdog_thread_handle, &watchdog_thread_object);
1625 cyg_thread_resume(watchdog_thread_handle);
1634 struct jtag_interface zy1000_interface =
1637 .supported = DEBUG_CAP_TMS_SEQ,
1638 .execute_queue = NULL,
1639 .speed = zy1000_speed,
1640 .commands = zy1000_commands,
1641 .init = zy1000_init,
1642 .quit = zy1000_quit,
1644 .speed_div = zy1000_speed_div,
1645 .power_dropout = zy1000_power_dropout,
1646 .srst_asserted = zy1000_srst_asserted,