1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * Copyright (C) 2008 by Spencer Oliver *
6 * spen@spen-soft.co.uk *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
22 ***************************************************************************/
29 #include "arm7_9_common.h"
33 #include "embeddedice.h"
42 #define _DEBUG_INSTRUCTION_EXECUTION_
46 int arm966e_register_commands(struct command_context_s *cmd_ctx);
48 /* forward declarations */
49 int arm966e_target_create(struct target_s *target, Jim_Interp *interp);
50 int arm966e_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
51 int arm966e_quit(void);
53 target_type_t arm966e_target =
58 .arch_state = armv4_5_arch_state,
60 .target_request_data = arm7_9_target_request_data,
63 .resume = arm7_9_resume,
66 .assert_reset = arm7_9_assert_reset,
67 .deassert_reset = arm7_9_deassert_reset,
68 .soft_reset_halt = arm7_9_soft_reset_halt,
70 .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
72 .read_memory = arm7_9_read_memory,
73 .write_memory = arm7_9_write_memory,
74 .bulk_write_memory = arm7_9_bulk_write_memory,
75 .checksum_memory = arm7_9_checksum_memory,
76 .blank_check_memory = arm7_9_blank_check_memory,
78 .run_algorithm = armv4_5_run_algorithm,
80 .add_breakpoint = arm7_9_add_breakpoint,
81 .remove_breakpoint = arm7_9_remove_breakpoint,
82 .add_watchpoint = arm7_9_add_watchpoint,
83 .remove_watchpoint = arm7_9_remove_watchpoint,
85 .register_commands = arm966e_register_commands,
86 .target_create = arm966e_target_create,
87 .init_target = arm966e_init_target,
88 .examine = arm9tdmi_examine,
92 int arm966e_init_target(struct command_context_s *cmd_ctx, struct target_s *target)
94 arm9tdmi_init_target(cmd_ctx, target);
99 int arm966e_quit(void)
105 int arm966e_init_arch_info(target_t *target, arm966e_common_t *arm966e, int chain_pos, const char *variant)
107 arm9tdmi_common_t *arm9tdmi = &arm966e->arm9tdmi_common;
108 arm7_9_common_t *arm7_9 = &arm9tdmi->arm7_9_common;
110 arm9tdmi_init_arch_info(target, arm9tdmi, chain_pos, variant);
112 arm9tdmi->arch_info = arm966e;
113 arm966e->common_magic = ARM966E_COMMON_MAGIC;
115 /* The ARM966E-S implements the ARMv5TE architecture which
116 * has the BKPT instruction, so we don't have to use a watchpoint comparator
118 arm7_9->arm_bkpt = ARMV5_BKPT(0x0);
119 arm7_9->thumb_bkpt = ARMV5_T_BKPT(0x0) & 0xffff;
124 int arm966e_target_create( struct target_s *target, Jim_Interp *interp )
126 arm966e_common_t *arm966e = calloc(1,sizeof(arm966e_common_t));
128 arm966e_init_arch_info(target, arm966e, target->chain_position, target->variant);
133 int arm966e_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p, arm9tdmi_common_t **arm9tdmi_p, arm966e_common_t **arm966e_p)
135 armv4_5_common_t *armv4_5 = target->arch_info;
136 arm7_9_common_t *arm7_9;
137 arm9tdmi_common_t *arm9tdmi;
138 arm966e_common_t *arm966e;
140 if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC)
145 arm7_9 = armv4_5->arch_info;
146 if (arm7_9->common_magic != ARM7_9_COMMON_MAGIC)
151 arm9tdmi = arm7_9->arch_info;
152 if (arm9tdmi->common_magic != ARM9TDMI_COMMON_MAGIC)
157 arm966e = arm9tdmi->arch_info;
158 if (arm966e->common_magic != ARM966E_COMMON_MAGIC)
163 *armv4_5_p = armv4_5;
165 *arm9tdmi_p = arm9tdmi;
166 *arm966e_p = arm966e;
171 int arm966e_read_cp15(target_t *target, int reg_addr, u32 *value)
173 armv4_5_common_t *armv4_5 = target->arch_info;
174 arm7_9_common_t *arm7_9 = armv4_5->arch_info;
175 arm_jtag_t *jtag_info = &arm7_9->jtag_info;
176 scan_field_t fields[3];
177 u8 reg_addr_buf = reg_addr & 0x3f;
180 jtag_add_end_state(TAP_RTI);
181 arm_jtag_scann(jtag_info, 0xf);
182 arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
184 fields[0].device = jtag_info->chain_pos;
185 fields[0].num_bits = 32;
186 fields[0].out_value = NULL;
187 fields[0].out_mask = NULL;
188 fields[0].in_value = NULL;
189 fields[0].in_check_value = NULL;
190 fields[0].in_check_mask = NULL;
191 fields[0].in_handler = NULL;
192 fields[0].in_handler_priv = NULL;
194 fields[1].device = jtag_info->chain_pos;
195 fields[1].num_bits = 6;
196 fields[1].out_value = ®_addr_buf;
197 fields[1].out_mask = NULL;
198 fields[1].in_value = NULL;
199 fields[1].in_check_value = NULL;
200 fields[1].in_check_mask = NULL;
201 fields[1].in_handler = NULL;
202 fields[1].in_handler_priv = NULL;
204 fields[2].device = jtag_info->chain_pos;
205 fields[2].num_bits = 1;
206 fields[2].out_value = &nr_w_buf;
207 fields[2].out_mask = NULL;
208 fields[2].in_value = NULL;
209 fields[2].in_check_value = NULL;
210 fields[2].in_check_mask = NULL;
211 fields[2].in_handler = NULL;
212 fields[2].in_handler_priv = NULL;
214 jtag_add_dr_scan(3, fields, -1);
216 fields[0].in_handler_priv = value;
217 fields[0].in_handler = arm_jtag_buf_to_u32;
219 jtag_add_dr_scan(3, fields, -1);
221 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
222 jtag_execute_queue();
223 LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, *value);
229 int arm966e_write_cp15(target_t *target, int reg_addr, u32 value)
231 armv4_5_common_t *armv4_5 = target->arch_info;
232 arm7_9_common_t *arm7_9 = armv4_5->arch_info;
233 arm_jtag_t *jtag_info = &arm7_9->jtag_info;
234 scan_field_t fields[3];
235 u8 reg_addr_buf = reg_addr & 0x3f;
239 buf_set_u32(value_buf, 0, 32, value);
241 jtag_add_end_state(TAP_RTI);
242 arm_jtag_scann(jtag_info, 0xf);
243 arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
245 fields[0].device = jtag_info->chain_pos;
246 fields[0].num_bits = 32;
247 fields[0].out_value = value_buf;
248 fields[0].out_mask = NULL;
249 fields[0].in_value = NULL;
250 fields[0].in_check_value = NULL;
251 fields[0].in_check_mask = NULL;
252 fields[0].in_handler = NULL;
253 fields[0].in_handler_priv = NULL;
255 fields[1].device = jtag_info->chain_pos;
256 fields[1].num_bits = 6;
257 fields[1].out_value = ®_addr_buf;
258 fields[1].out_mask = NULL;
259 fields[1].in_value = NULL;
260 fields[1].in_check_value = NULL;
261 fields[1].in_check_mask = NULL;
262 fields[1].in_handler = NULL;
263 fields[1].in_handler_priv = NULL;
265 fields[2].device = jtag_info->chain_pos;
266 fields[2].num_bits = 1;
267 fields[2].out_value = &nr_w_buf;
268 fields[2].out_mask = NULL;
269 fields[2].in_value = NULL;
270 fields[2].in_check_value = NULL;
271 fields[2].in_check_mask = NULL;
272 fields[2].in_handler = NULL;
273 fields[2].in_handler_priv = NULL;
275 jtag_add_dr_scan(3, fields, -1);
277 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
278 LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, value);
284 int arm966e_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
287 target_t *target = get_current_target(cmd_ctx);
288 armv4_5_common_t *armv4_5;
289 arm7_9_common_t *arm7_9;
290 arm9tdmi_common_t *arm9tdmi;
291 arm966e_common_t *arm966e;
292 arm_jtag_t *jtag_info;
294 if (arm966e_get_arch_pointers(target, &armv4_5, &arm7_9, &arm9tdmi, &arm966e) != ERROR_OK)
296 command_print(cmd_ctx, "current target isn't an ARM966e target");
300 jtag_info = &arm7_9->jtag_info;
302 if (target->state != TARGET_HALTED)
304 command_print(cmd_ctx, "target must be stopped for \"%s\" command", cmd);
308 /* one or more argument, access a single register (write if second argument is given */
311 int address = strtoul(args[0], NULL, 0);
316 if ((retval = arm966e_read_cp15(target, address, &value)) != ERROR_OK)
318 command_print(cmd_ctx, "couldn't access reg %i", address);
321 jtag_execute_queue();
323 command_print(cmd_ctx, "%i: %8.8x", address, value);
327 u32 value = strtoul(args[1], NULL, 0);
328 if ((retval = arm966e_write_cp15(target, address, value)) != ERROR_OK)
330 command_print(cmd_ctx, "couldn't access reg %i", address);
333 command_print(cmd_ctx, "%i: %8.8x", address, value);
340 int arm966e_register_commands(struct command_context_s *cmd_ctx)
343 command_t *arm966e_cmd;
345 retval = arm9tdmi_register_commands(cmd_ctx);
346 arm966e_cmd = register_command(cmd_ctx, NULL, "arm966e", NULL, COMMAND_ANY, "arm966e specific commands");
347 register_command(cmd_ctx, arm966e_cmd, "cp15", arm966e_handle_cp15_command, COMMAND_EXEC, "display/modify cp15 register <num> [value]");