1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * Copyright (C) 2006 by Magnus Lundin *
8 * Copyright (C) 2008 by Spencer Oliver *
9 * spen@spen-soft.co.uk *
11 * This program is free software; you can redistribute it and/or modify *
12 * it under the terms of the GNU General Public License as published by *
13 * the Free Software Foundation; either version 2 of the License, or *
14 * (at your option) any later version. *
16 * This program is distributed in the hope that it will be useful, *
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
19 * GNU General Public License for more details. *
21 * You should have received a copy of the GNU General Public License *
22 * along with this program; if not, write to the *
23 * Free Software Foundation, Inc., *
24 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
25 ***************************************************************************/
27 #ifndef ARMV7M_COMMON_H
28 #define ARMV7M_COMMON_H
30 #include "arm_adi_v5.h"
33 /* define for enabling armv7 gdb workarounds */
35 #define ARMV7_GDB_HACKS
38 #ifdef ARMV7_GDB_HACKS
39 extern uint8_t armv7m_gdb_dummy_cpsr_value[];
40 extern struct reg armv7m_gdb_dummy_cpsr_reg;
44 ARMV7M_MODE_THREAD = 0,
45 ARMV7M_MODE_USER_THREAD = 1,
46 ARMV7M_MODE_HANDLER = 2,
50 extern char *armv7m_mode_strings[];
51 extern const int armv7m_psp_reg_map[];
52 extern const int armv7m_msp_reg_map[];
55 ARMV7M_REGISTER_CORE_GP,
56 ARMV7M_REGISTER_CORE_SP,
57 ARMV7M_REGISTER_MEMMAP
60 char *armv7m_exception_string(int number);
62 /* offsets into armv7m core register cache */
64 /* for convenience, the first set of indices match
65 * the Cortex-M3 DCRSR selectors
91 /* this next set of indices is arbitrary */
98 #define ARMV7M_COMMON_MAGIC 0x2A452A45
100 struct armv7m_common {
104 struct reg_cache *core_cache;
105 enum armv7m_mode core_mode;
106 int exception_number;
107 struct adiv5_dap dap;
111 /* Direct processor core register read and writes */
112 int (*load_core_reg_u32)(struct target *target,
113 enum armv7m_regtype type, uint32_t num, uint32_t *value);
114 int (*store_core_reg_u32)(struct target *target,
115 enum armv7m_regtype type, uint32_t num, uint32_t value);
117 /* register cache to processor synchronization */
118 int (*read_core_reg)(struct target *target, unsigned num);
119 int (*write_core_reg)(struct target *target, unsigned num);
121 int (*examine_debug_reason)(struct target *target);
122 int (*post_debug_entry)(struct target *target);
124 void (*pre_restore_context)(struct target *target);
127 static inline struct armv7m_common *
128 target_to_armv7m(struct target *target)
130 return container_of(target->arch_info, struct armv7m_common, arm);
133 static inline bool is_armv7m(struct armv7m_common *armv7m)
135 return armv7m->common_magic == ARMV7M_COMMON_MAGIC;
138 struct armv7m_algorithm {
141 enum armv7m_mode core_mode;
143 uint32_t context[ARMV7M_CONTROL + 1]; /* ARMV7M_NUM_REGS */
146 struct armv7m_core_reg {
148 enum armv7m_regtype type;
149 struct target *target;
150 struct armv7m_common *armv7m_common;
153 struct reg_cache *armv7m_build_reg_cache(struct target *target);
154 enum armv7m_mode armv7m_number_to_mode(int number);
155 int armv7m_mode_to_number(enum armv7m_mode mode);
157 int armv7m_arch_state(struct target *target);
158 int armv7m_get_gdb_reg_list(struct target *target,
159 struct reg **reg_list[], int *reg_list_size);
161 int armv7m_init_arch_info(struct target *target, struct armv7m_common *armv7m);
163 int armv7m_run_algorithm(struct target *target,
164 int num_mem_params, struct mem_param *mem_params,
165 int num_reg_params, struct reg_param *reg_params,
166 uint32_t entry_point, uint32_t exit_point,
167 int timeout_ms, void *arch_info);
169 int armv7m_start_algorithm(struct target *target,
170 int num_mem_params, struct mem_param *mem_params,
171 int num_reg_params, struct reg_param *reg_params,
172 uint32_t entry_point, uint32_t exit_point,
175 int armv7m_wait_algorithm(struct target *target,
176 int num_mem_params, struct mem_param *mem_params,
177 int num_reg_params, struct reg_param *reg_params,
178 uint32_t exit_point, int timeout_ms,
181 int armv7m_invalidate_core_regs(struct target *target);
183 int armv7m_restore_context(struct target *target);
185 int armv7m_checksum_memory(struct target *target,
186 uint32_t address, uint32_t count, uint32_t *checksum);
187 int armv7m_blank_check_memory(struct target *target,
188 uint32_t address, uint32_t count, uint32_t *blank);
190 int armv7m_maybe_skip_bkpt_inst(struct target *target, bool *inst_found);
192 extern const struct command_registration armv7m_command_handlers[];
194 #endif /* ARMV7M_H */