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1 /***************************************************************************
2  *   Copyright (C) 2005 by Dominic Rath                                    *
3  *   Dominic.Rath@gmx.de                                                   *
4  *                                                                         *
5  *   Copyright (C) 2006 by Magnus Lundin                                   *
6  *   lundin@mlu.mine.nu                                                    *
7  *                                                                         *
8  *   Copyright (C) 2008 by Spencer Oliver                                  *
9  *   spen@spen-soft.co.uk                                                  *
10  *                                                                         *
11  *   This program is free software; you can redistribute it and/or modify  *
12  *   it under the terms of the GNU General Public License as published by  *
13  *   the Free Software Foundation; either version 2 of the License, or     *
14  *   (at your option) any later version.                                   *
15  *                                                                         *
16  *   This program is distributed in the hope that it will be useful,       *
17  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
18  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
19  *   GNU General Public License for more details.                          *
20  *                                                                         *
21  *   You should have received a copy of the GNU General Public License     *
22  *   along with this program; if not, write to the                         *
23  *   Free Software Foundation, Inc.,                                       *
24  *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
25  ***************************************************************************/
26
27 #ifndef ARMV7M_COMMON_H
28 #define ARMV7M_COMMON_H
29
30 #include "arm_adi_v5.h"
31 #include "arm.h"
32
33 /* define for enabling armv7 gdb workarounds */
34 #if 1
35 #define ARMV7_GDB_HACKS
36 #endif
37
38 #ifdef ARMV7_GDB_HACKS
39 extern uint8_t armv7m_gdb_dummy_cpsr_value[];
40 extern struct reg armv7m_gdb_dummy_cpsr_reg;
41 #endif
42
43 extern const int armv7m_psp_reg_map[];
44 extern const int armv7m_msp_reg_map[];
45
46 char *armv7m_exception_string(int number);
47
48 /* offsets into armv7m core register cache */
49 enum {
50         /* for convenience, the first set of indices match
51          * the Cortex-M3/-M4 DCRSR selectors
52          */
53         ARMV7M_R0,
54         ARMV7M_R1,
55         ARMV7M_R2,
56         ARMV7M_R3,
57
58         ARMV7M_R4,
59         ARMV7M_R5,
60         ARMV7M_R6,
61         ARMV7M_R7,
62
63         ARMV7M_R8,
64         ARMV7M_R9,
65         ARMV7M_R10,
66         ARMV7M_R11,
67
68         ARMV7M_R12,
69         ARMV7M_R13,
70         ARMV7M_R14,
71         ARMV7M_PC = 15,
72
73         ARMV7M_xPSR = 16,
74         ARMV7M_MSP,
75         ARMV7M_PSP,
76
77         /* this next set of indices is arbitrary */
78         ARMV7M_PRIMASK,
79         ARMV7M_BASEPRI,
80         ARMV7M_FAULTMASK,
81         ARMV7M_CONTROL,
82
83         /* 32bit Floating-point registers */
84         ARMV7M_S0,
85         ARMV7M_S1,
86         ARMV7M_S2,
87         ARMV7M_S3,
88         ARMV7M_S4,
89         ARMV7M_S5,
90         ARMV7M_S6,
91         ARMV7M_S7,
92         ARMV7M_S8,
93         ARMV7M_S9,
94         ARMV7M_S10,
95         ARMV7M_S11,
96         ARMV7M_S12,
97         ARMV7M_S13,
98         ARMV7M_S14,
99         ARMV7M_S15,
100         ARMV7M_S16,
101         ARMV7M_S17,
102         ARMV7M_S18,
103         ARMV7M_S19,
104         ARMV7M_S20,
105         ARMV7M_S21,
106         ARMV7M_S22,
107         ARMV7M_S23,
108         ARMV7M_S24,
109         ARMV7M_S25,
110         ARMV7M_S26,
111         ARMV7M_S27,
112         ARMV7M_S28,
113         ARMV7M_S29,
114         ARMV7M_S30,
115         ARMV7M_S31,
116
117         /* 64bit Floating-point registers */
118         ARMV7M_D0,
119         ARMV7M_D1,
120         ARMV7M_D2,
121         ARMV7M_D3,
122         ARMV7M_D4,
123         ARMV7M_D5,
124         ARMV7M_D6,
125         ARMV7M_D7,
126         ARMV7M_D8,
127         ARMV7M_D9,
128         ARMV7M_D10,
129         ARMV7M_D11,
130         ARMV7M_D12,
131         ARMV7M_D13,
132         ARMV7M_D14,
133         ARMV7M_D15,
134
135         /* Floating-point status registers */
136         ARMV7M_FPSID,
137         ARMV7M_FPSCR,
138         ARMV7M_FPEXC,
139
140         ARMV7M_LAST_REG,
141 };
142
143 enum {
144         FP_NONE = 0,
145         FPv4_SP,
146 };
147
148 #define ARMV7M_COMMON_MAGIC 0x2A452A45
149
150 struct armv7m_common {
151         struct arm      arm;
152
153         int common_magic;
154         int exception_number;
155         struct adiv5_dap dap;
156
157         int fp_feature;
158         uint32_t demcr;
159
160         /* stlink is a high level adapter, does not support all functions */
161         bool stlink;
162
163         /* Direct processor core register read and writes */
164         int (*load_core_reg_u32)(struct target *target, uint32_t num, uint32_t *value);
165         int (*store_core_reg_u32)(struct target *target, uint32_t num, uint32_t value);
166
167         int (*examine_debug_reason)(struct target *target);
168         int (*post_debug_entry)(struct target *target);
169
170         void (*pre_restore_context)(struct target *target);
171 };
172
173 static inline struct armv7m_common *
174 target_to_armv7m(struct target *target)
175 {
176         return container_of(target->arch_info, struct armv7m_common, arm);
177 }
178
179 static inline bool is_armv7m(struct armv7m_common *armv7m)
180 {
181         return armv7m->common_magic == ARMV7M_COMMON_MAGIC;
182 }
183
184 struct armv7m_algorithm {
185         int common_magic;
186
187         enum arm_mode core_mode;
188
189         uint32_t context[ARMV7M_LAST_REG]; /* ARMV7M_NUM_REGS */
190 };
191
192 struct reg_cache *armv7m_build_reg_cache(struct target *target);
193 enum armv7m_mode armv7m_number_to_mode(int number);
194 int armv7m_mode_to_number(enum armv7m_mode mode);
195
196 int armv7m_arch_state(struct target *target);
197 int armv7m_get_gdb_reg_list(struct target *target,
198                 struct reg **reg_list[], int *reg_list_size,
199                 enum target_register_class reg_class);
200
201 int armv7m_init_arch_info(struct target *target, struct armv7m_common *armv7m);
202
203 int armv7m_run_algorithm(struct target *target,
204                 int num_mem_params, struct mem_param *mem_params,
205                 int num_reg_params, struct reg_param *reg_params,
206                 uint32_t entry_point, uint32_t exit_point,
207                 int timeout_ms, void *arch_info);
208
209 int armv7m_start_algorithm(struct target *target,
210                 int num_mem_params, struct mem_param *mem_params,
211                 int num_reg_params, struct reg_param *reg_params,
212                 uint32_t entry_point, uint32_t exit_point,
213                 void *arch_info);
214
215 int armv7m_wait_algorithm(struct target *target,
216                 int num_mem_params, struct mem_param *mem_params,
217                 int num_reg_params, struct reg_param *reg_params,
218                 uint32_t exit_point, int timeout_ms,
219                 void *arch_info);
220
221 int armv7m_invalidate_core_regs(struct target *target);
222
223 int armv7m_restore_context(struct target *target);
224
225 int armv7m_checksum_memory(struct target *target,
226                 uint32_t address, uint32_t count, uint32_t *checksum);
227 int armv7m_blank_check_memory(struct target *target,
228                 uint32_t address, uint32_t count, uint32_t *blank);
229
230 int armv7m_maybe_skip_bkpt_inst(struct target *target, bool *inst_found);
231
232 extern const struct command_registration armv7m_command_handlers[];
233
234 #endif /* ARMV7M_H */