1 /***************************************************************************
2 * Copyright (C) 2008 by Spencer Oliver *
3 * spen@spen-soft.co.uk *
5 * Copyright (C) 2008 by David T.L. Wong *
7 * This program is free software; you can redistribute it and/or modify *
8 * it under the terms of the GNU General Public License as published by *
9 * the Free Software Foundation; either version 2 of the License, or *
10 * (at your option) any later version. *
12 * This program is distributed in the hope that it will be useful, *
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
15 * GNU General Public License for more details. *
17 * You should have received a copy of the GNU General Public License *
18 * along with this program; if not, write to the *
19 * Free Software Foundation, Inc., *
20 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
21 ***************************************************************************/
27 #include "mips_ejtag.h"
29 #include "binarybuffer.h"
35 int mips_ejtag_set_instr(mips_ejtag_t *ejtag_info, int new_instr, in_handler_t handler)
37 jtag_device_t *device = jtag_get_device(ejtag_info->chain_pos);
41 if (buf_get_u32(device->cur_instr, 0, device->ir_length) != new_instr)
46 field.device = ejtag_info->chain_pos;
47 field.num_bits = device->ir_length;
49 buf_set_u32(field.out_value, 0, field.num_bits, new_instr);
50 field.out_mask = NULL;
51 field.in_value = NULL;
52 field.in_check_value = NULL;
53 field.in_check_mask = NULL;
54 field.in_handler = handler;
55 field.in_handler_priv = NULL;
56 jtag_add_ir_scan(1, &field, -1);
62 int mips_ejtag_get_idcode(mips_ejtag_t *ejtag_info, u32 *idcode, in_handler_t handler)
66 jtag_add_end_state(TAP_RTI);
68 mips_ejtag_set_instr(ejtag_info, EJTAG_INST_IDCODE, NULL);
70 field.device = ejtag_info->chain_pos;
72 field.out_value = NULL;
73 field.out_mask = NULL;
74 field.in_value = (void*)idcode;
75 field.in_check_value = NULL;
76 field.in_check_mask = NULL;
77 field.in_handler = NULL;
78 field.in_handler_priv = NULL;
79 jtag_add_dr_scan(1, &field, -1);
81 if (jtag_execute_queue() != ERROR_OK)
83 LOG_ERROR("register read failed");
89 int mips_ejtag_get_impcode(mips_ejtag_t *ejtag_info, u32 *impcode, in_handler_t handler)
93 jtag_add_end_state(TAP_RTI);
95 mips_ejtag_set_instr(ejtag_info, EJTAG_INST_IMPCODE, NULL);
97 field.device = ejtag_info->chain_pos;
99 field.out_value = NULL;
100 field.out_mask = NULL;
101 field.in_value = (void*)impcode;
102 field.in_check_value = NULL;
103 field.in_check_mask = NULL;
104 field.in_handler = NULL;
105 field.in_handler_priv = NULL;
106 jtag_add_dr_scan(1, &field, -1);
108 if (jtag_execute_queue() != ERROR_OK)
110 LOG_ERROR("register read failed");
116 int mips_ejtag_drscan_32(mips_ejtag_t *ejtag_info, u32 *data)
118 jtag_device_t *device;
119 device = jtag_get_device(ejtag_info->chain_pos);
127 field.device = ejtag_info->chain_pos;
130 buf_set_u32(field.out_value, 0, field.num_bits, *data);
131 field.out_mask = NULL;
132 field.in_value = (u8*)data;
133 field.in_check_value = NULL;
134 field.in_check_mask = NULL;
135 field.in_handler = NULL;
136 field.in_handler_priv = NULL;
137 jtag_add_dr_scan(1, &field, -1);
139 if ((retval = jtag_execute_queue()) != ERROR_OK)
141 LOG_ERROR("register read failed");
148 int mips_ejtag_step_enable(mips_ejtag_t *ejtag_info)
151 MIPS32_MTC0(1,31,0), /* move $1 to COP0 DeSave */
152 MIPS32_MFC0(1,23,0), /* move COP0 Debug to $1 */
153 MIPS32_ORI(1,1,0x0100), /* set SSt bit in debug reg */
154 MIPS32_MTC0(1,23,0), /* move $1 to COP0 Debug */
155 MIPS32_MFC0(1,31,0), /* move COP0 DeSave to $1 */
161 mips32_pracc_exec(ejtag_info, sizeof(code)/sizeof(code[0]), code, \
162 0, NULL, 0, NULL, 1);
166 int mips_ejtag_step_disable(mips_ejtag_t *ejtag_info)
169 MIPS32_MTC0(15,31,0), /* move $15 to COP0 DeSave */
170 MIPS32_LUI(15,UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */
171 MIPS32_ORI(15,15,LOWER16(MIPS32_PRACC_STACK)),
172 MIPS32_SW(1,0,15), /* sw $1,($15) */
173 MIPS32_SW(2,0,15), /* sw $2,($15) */
174 MIPS32_MFC0(1,23,0), /* move COP0 Debug to $1 */
175 MIPS32_LUI(2,0xFFFF), /* $2 = 0xfffffeff */
176 MIPS32_ORI(2,2,0xFEFF),
178 MIPS32_MTC0(1,23,0), /* move $1 to COP0 Debug */
181 MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */
187 mips32_pracc_exec(ejtag_info, sizeof(code)/sizeof(code[0]), code, \
188 0, NULL, 0, NULL, 1);
193 int mips_ejtag_config_step(mips_ejtag_t *ejtag_info, int enable_step)
196 return mips_ejtag_step_enable(ejtag_info);
197 return mips_ejtag_step_disable(ejtag_info);
200 int mips_ejtag_enter_debug(mips_ejtag_t *ejtag_info)
203 jtag_add_end_state(TAP_RTI);
204 mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
206 /* set debug break bit */
207 ejtag_ctrl = ejtag_info->ejtag_ctrl | EJTAG_CTRL_JTAGBRK;
208 mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
210 /* break bit will be cleared by hardware */
211 ejtag_ctrl = ejtag_info->ejtag_ctrl;
212 mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
213 LOG_DEBUG("ejtag_ctrl: 0x%8.8x", ejtag_ctrl);
214 if((ejtag_ctrl & EJTAG_CTRL_BRKST) == 0)
215 LOG_DEBUG("Failed to enter Debug Mode!");
220 int mips_ejtag_exit_debug(mips_ejtag_t *ejtag_info, int enable_interrupts)
225 /* TODO : enable/disable interrrupts */
227 /* execute our dret instruction */
228 mips32_pracc_exec(ejtag_info, 1, &inst, 0, NULL, 0, NULL, 0);
233 int mips_ejtag_read_debug(mips_ejtag_t *ejtag_info, u32* debug_reg)
237 MIPS32_MTC0(15,31,0), /* move $15 to COP0 DeSave */
238 MIPS32_LUI(15,UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */
239 MIPS32_ORI(15,15,LOWER16(MIPS32_PRACC_STACK)),
240 MIPS32_SW(1,0,15), /* sw $1,($15) */
241 MIPS32_SW(2,0,15), /* sw $2,($15) */
242 MIPS32_LUI(1,UPPER16(MIPS32_PRACC_PARAM_OUT)), /* $1 = MIPS32_PRACC_PARAM_OUT */
243 MIPS32_ORI(1,1,LOWER16(MIPS32_PRACC_PARAM_OUT)),
244 MIPS32_MFC0(2,23,0), /* move COP0 Debug to $2 */
248 MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */
254 mips32_pracc_exec(ejtag_info, sizeof(code)/sizeof(code[0]), code, \
255 0, NULL, 1, debug_reg, 1);
260 int mips_ejtag_init(mips_ejtag_t *ejtag_info)
264 mips_ejtag_get_impcode(ejtag_info, &ejtag_info->impcode, NULL);
265 LOG_DEBUG("impcode: 0x%8.8x", ejtag_info->impcode);
267 /* get ejtag version */
268 ejtag_version = ((ejtag_info->impcode >> 29) & 0x07);
270 switch (ejtag_version)
273 LOG_DEBUG("EJTAG: Version 1 or 2.0 Detected");
276 LOG_DEBUG("EJTAG: Version 2.5 Detected");
279 LOG_DEBUG("EJTAG: Version 2.6 Detected");
282 LOG_DEBUG("EJTAG: Version 3.1 Detected");
285 LOG_DEBUG("EJTAG: Unknown Version Detected");
288 LOG_DEBUG("EJTAG: features:%s%s%s%s%s%s%s",
289 ejtag_info->impcode & (1<<28) ? " R3k": " R4k",
290 ejtag_info->impcode & (1<<24) ? " DINT": "",
291 ejtag_info->impcode & (1<<22) ? " ASID_8": "",
292 ejtag_info->impcode & (1<<21) ? " ASID_6": "",
293 ejtag_info->impcode & (1<<16) ? " MIPS16": "",
294 ejtag_info->impcode & (1<<14) ? " noDMA": " DMA",
295 ejtag_info->impcode & (1<<0) ? " MIPS64": " MIPS32"
298 if((ejtag_info->impcode & (1<<14)) == 0)
299 LOG_DEBUG("EJTAG: DMA Access Mode Support Enabled");
301 /* set initial state for ejtag control reg */
302 ejtag_info->ejtag_ctrl = EJTAG_CTRL_ROCC | EJTAG_CTRL_PRACC | EJTAG_CTRL_PROBEN | EJTAG_CTRL_SETDEV;