1 /***************************************************************************
2 * Copyright (C) 2006 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
17 ***************************************************************************/
26 @ send word to debugger
27 .macro m_send_to_debugger reg
29 mrc p14, 0, r15, c14, c0, 0
31 mcr p14, 0, \reg, c8, c0, 0
34 @ receive word from debugger
35 .macro m_receive_from_debugger reg
37 mrc p14, 0, r15, c14, c0, 0
39 mrc p14, 0, \reg, c9, c0, 0
42 @ save register on debugger, small
43 .macro m_small_save_reg reg
48 @ save status register on debugger, small
49 .macro m_small_save_psr
54 @ wait for all outstanding coprocessor accesses to complete
56 mrc p15, 0, r0, c2, c0, 0
64 .global prefetch_abort_handler
65 .global data_abort_handler
69 .section .part1 , "ax"
73 mrc p14, 0, r13, c10, c0
74 @ check if global enable bit (GE) is set
75 ands r13, r13, #0x80000000
79 @ set global enable bit (GE)
81 mcr p14, 0, r13, c10, c0
85 @ save r0 without modifying other registers
88 @ save lr (program PC) without branching (use macro)
89 m_send_to_debugger r14
91 @ save non-banked registers and spsr (program CPSR)
103 @ prepare program PSR for debug use (clear Thumb, set I/F to disable interrupts)
105 orr r0, r0, #(PSR_I | PSR_F)
108 and r1, r0, #MODE_MASK
113 @ replace USR mode with SYS
114 bic r0, r0, #MODE_MASK
115 orr r0, r0, #MODE_SYS
119 b save_banked_registers
122 @ wait for command from debugger, than execute desired function
124 bl receive_from_debugger
126 @ 0x0n - register access
128 beq get_banked_registers
131 beq set_banked_registers
143 @ 0x2n - write memory
153 @ 0x3n - program execution
160 @ 0x4n - coprocessor access
167 @ 0x5n - cache and mmu functions
172 beq invalidate_d_cache
175 beq invalidate_i_cache
180 @ 0x6n - misc functions
185 beq read_trace_buffer
188 beq clean_trace_buffer
190 @ return (back to get_command)
195 @ resume program execution
197 @ restore CPSR (SPSR_dbg)
198 bl receive_from_debugger
201 @ restore registers (r7 - r0)
202 bl receive_from_debugger @ r7
204 bl receive_from_debugger @ r6
206 bl receive_from_debugger @ r5
208 bl receive_from_debugger @ r4
210 bl receive_from_debugger @ r3
212 bl receive_from_debugger @ r2
214 bl receive_from_debugger @ r1
216 bl receive_from_debugger @ r0
219 m_receive_from_debugger lr
221 @ branch back to application code, restoring CPSR
224 @ get banked registers
225 @ receive mode bits from host, then run into save_banked_registers to
227 get_banked_registers:
228 bl receive_from_debugger
230 @ save banked registers
231 @ r0[4:0]: desired mode bits
232 save_banked_registers:
238 @ keep current mode bits in r1 for later use
239 and r1, r0, #MODE_MASK
241 @ backup banked registers
242 m_send_to_debugger r8
243 m_send_to_debugger r9
244 m_send_to_debugger r10
245 m_send_to_debugger r11
246 m_send_to_debugger r12
247 m_send_to_debugger r13
248 m_send_to_debugger r14
250 @ if not in SYS mode (or USR, which we replaced with SYS before)
257 m_send_to_debugger r0
261 @ restore CPSR for SDS
271 @ set banked registers
272 @ receive mode bits from host, then run into save_banked_registers to
274 set_banked_registers:
275 bl receive_from_debugger
277 @ restore banked registers
278 @ r0[4:0]: desired mode bits
279 restore_banked_registers:
285 @ keep current mode bits in r1 for later use
286 and r1, r0, #MODE_MASK
288 @ set banked registers
289 m_receive_from_debugger r8
290 m_receive_from_debugger r9
291 m_receive_from_debugger r10
292 m_receive_from_debugger r11
293 m_receive_from_debugger r12
294 m_receive_from_debugger r13
295 m_receive_from_debugger r14
297 @ if not in SYS mode (or USR, which we replaced with SYS before)
300 beq no_spsr_to_restore
303 m_receive_from_debugger r0
308 @ restore CPSR for SDS
319 bl receive_from_debugger
323 bl receive_from_debugger
329 @ drain write- (and fill-) buffer to work around XScale errata
330 mcr p15, 0, r8, c7, c10, 4
344 bl receive_from_debugger
348 bl receive_from_debugger
354 @ drain write- (and fill-) buffer to work around XScale errata
355 mcr p15, 0, r8, c7, c10, 4
369 bl receive_from_debugger
373 bl receive_from_debugger
379 @ drain write- (and fill-) buffer to work around XScale errata
380 mcr p15, 0, r8, c7, c10, 4
394 bl receive_from_debugger
398 bl receive_from_debugger
402 bl receive_from_debugger
405 @ drain write- (and fill-) buffer to work around XScale errata
406 mcr p15, 0, r8, c7, c10, 4
418 bl receive_from_debugger
422 bl receive_from_debugger
426 bl receive_from_debugger
429 @ drain write- (and fill-) buffer to work around XScale errata
430 mcr p15, 0, r8, c7, c10, 4
442 bl receive_from_debugger
446 bl receive_from_debugger
450 bl receive_from_debugger
453 @ drain write- (and fill-) buffer to work around XScale errata
454 mcr p15, 0, r8, c7, c10, 4
466 mrc p14, 0, r0, c10, c0
472 mcr p14, 0, r0, c10, c0
480 @ r0: cache clean area
481 bl receive_from_debugger
485 mcr p15, 0, r0, c7, c2, 5
496 mcr p15, 0, r0, c7, c6, 0
504 mcr p15, 0, r0, c7, c5, 0
519 .section .part2 , "ax"
522 @ requested cp register
523 bl receive_from_debugger
525 adr r1, read_cp_table
526 add pc, r1, r0, lsl #3
529 mrc p15, 0, r0, c0, c0, 0 @ XSCALE_MAINID
531 mrc p15, 0, r0, c0, c0, 1 @ XSCALE_CACHETYPE
533 mrc p15, 0, r0, c1, c0, 0 @ XSCALE_CTRL
535 mrc p15, 0, r0, c1, c0, 1 @ XSCALE_AUXCTRL
537 mrc p15, 0, r0, c2, c0, 0 @ XSCALE_TTB
539 mrc p15, 0, r0, c3, c0, 0 @ XSCALE_DAC
541 mrc p15, 0, r0, c5, c0, 0 @ XSCALE_FSR
543 mrc p15, 0, r0, c6, c0, 0 @ XSCALE_FAR
545 mrc p15, 0, r0, c13, c0, 0 @ XSCALE_PID
547 mrc p15, 0, r0, c15, c0, 0 @ XSCALE_CP_ACCESS
549 mrc p15, 0, r0, c14, c8, 0 @ XSCALE_IBCR0
551 mrc p15, 0, r0, c14, c9, 0 @ XSCALE_IBCR1
553 mrc p15, 0, r0, c14, c0, 0 @ XSCALE_DBR0
555 mrc p15, 0, r0, c14, c3, 0 @ XSCALE_DBR1
557 mrc p15, 0, r0, c14, c4, 0 @ XSCALE_DBCON
559 mrc p14, 0, r0, c11, c0, 0 @ XSCALE_TBREG
561 mrc p14, 0, r0, c12, c0, 0 @ XSCALE_CHKPT0
563 mrc p14, 0, r0, c13, c0, 0 @ XSCALE_CHKPT1
565 mrc p14, 0, r0, c10, c0, 0 @ XSCALE_DCSR
577 @ requested cp register
578 bl receive_from_debugger
581 @ value to be written
582 bl receive_from_debugger
584 adr r2, write_cp_table
585 add pc, r2, r1, lsl #3
588 mcr p15, 0, r0, c0, c0, 0 @ XSCALE_MAINID (0x0)
590 mcr p15, 0, r0, c0, c0, 1 @ XSCALE_CACHETYPE (0x1)
592 mcr p15, 0, r0, c1, c0, 0 @ XSCALE_CTRL (0x2)
594 mcr p15, 0, r0, c1, c0, 1 @ XSCALE_AUXCTRL (0x3)
596 mcr p15, 0, r0, c2, c0, 0 @ XSCALE_TTB (0x4)
598 mcr p15, 0, r0, c3, c0, 0 @ XSCALE_DAC (0x5)
600 mcr p15, 0, r0, c5, c0, 0 @ XSCALE_FSR (0x6)
602 mcr p15, 0, r0, c6, c0, 0 @ XSCALE_FAR (0x7)
604 mcr p15, 0, r0, c13, c0, 0 @ XSCALE_PID (0x8)
606 mcr p15, 0, r0, c15, c0, 0 @ XSCALE_CP_ACCESS (0x9)
608 mcr p15, 0, r0, c14, c8, 0 @ XSCALE_IBCR0 (0xa)
610 mcr p15, 0, r0, c14, c9, 0 @ XSCALE_IBCR1 (0xb)
612 mcr p15, 0, r0, c14, c0, 0 @ XSCALE_DBR0 (0xc)
614 mcr p15, 0, r0, c14, c3, 0 @ XSCALE_DBR1 (0xd)
616 mcr p15, 0, r0, c14, c4, 0 @ XSCALE_DBCON (0xe)
618 mcr p14, 0, r0, c11, c0, 0 @ XSCALE_TBREG (0xf)
620 mcr p14, 0, r0, c12, c0, 0 @ XSCALE_CHKPT0 (0x10)
622 mcr p14, 0, r0, c13, c0, 0 @ XSCALE_CHKPT1 (0x11)
624 mcr p14, 0, r0, c10, c0, 0 @ XSCALE_DCSR (0x12)
631 @ dump 256 entries from trace buffer
634 mrc p14, 0, r0, c11, c0, 0 @ XSCALE_TBREG
639 @ dump checkpoint register 0
640 mrc p14, 0, r0, c12, c0, 0 @ XSCALE_CHKPT0 (0x10)
643 @ dump checkpoint register 1
644 mrc p14, 0, r0, c13, c0, 0 @ XSCALE_CHKPT1 (0x11)
654 @ clean 256 entries from trace buffer
657 mrc p14, 0, r0, c11, c0, 0 @ XSCALE_TBREG
667 @ resume program execution with trace buffer enabled
669 @ restore CPSR (SPSR_dbg)
670 bl receive_from_debugger
673 @ restore registers (r7 - r0)
674 bl receive_from_debugger @ r7
676 bl receive_from_debugger @ r6
678 bl receive_from_debugger @ r5
680 bl receive_from_debugger @ r4
682 bl receive_from_debugger @ r3
684 bl receive_from_debugger @ r2
686 bl receive_from_debugger @ r1
688 bl receive_from_debugger @ r0
691 m_receive_from_debugger lr
693 mrc p14, 0, r13, c10, c0, 0 @ XSCALE_DCSR
695 mcr p14, 0, r13, c10, c0, 0 @ XSCALE_DCSR
697 @ branch back to application code, restoring CPSR
702 prefetch_abort_handler:
710 m_send_to_debugger r0
713 receive_from_debugger:
714 m_receive_from_debugger r0