2 /*******************************************************************
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4 * CAUTION: This file is automatically generated by HSI.
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8 * Copyright (C) 2010-2016 Xilinx, Inc. All Rights Reserved.*
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9 *Permission is hereby granted, free of charge, to any person obtaining a copy
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10 *of this software and associated documentation files (the Software), to deal
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11 *in the Software without restriction, including without limitation the rights
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12 *to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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13 *copies of the Software, and to permit persons to whom the Software is
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14 *furnished to do so, subject to the following conditions:
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16 *The above copyright notice and this permission notice shall be included in
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17 *all copies or substantial portions of the Software.
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19 * Use of the Software is limited solely to applications:
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20 *(a) running on a Xilinx device, or
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21 *(b) that interact with a Xilinx device through a bus or interconnect.
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23 *THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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24 *IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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25 *FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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26 *XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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27 *WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
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28 *OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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30 *Except as contained in this notice, the name of the Xilinx shall not be used
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31 *in advertising or otherwise to promote the sale, use or other dealings in
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32 *this Software without prior written authorization from Xilinx.
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36 * Description: Driver configuration
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38 *******************************************************************/
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40 #include "xparameters.h"
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44 * The configuration table for devices
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47 XTtcPs_Config XTtcPs_ConfigTable[] =
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50 XPAR_PSU_TTC_0_DEVICE_ID,
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51 XPAR_PSU_TTC_0_BASEADDR,
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52 XPAR_PSU_TTC_0_TTC_CLK_FREQ_HZ
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55 XPAR_PSU_TTC_1_DEVICE_ID,
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56 XPAR_PSU_TTC_1_BASEADDR,
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57 XPAR_PSU_TTC_1_TTC_CLK_FREQ_HZ
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60 XPAR_PSU_TTC_2_DEVICE_ID,
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61 XPAR_PSU_TTC_2_BASEADDR,
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62 XPAR_PSU_TTC_2_TTC_CLK_FREQ_HZ
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65 XPAR_PSU_TTC_3_DEVICE_ID,
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66 XPAR_PSU_TTC_3_BASEADDR,
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67 XPAR_PSU_TTC_3_TTC_CLK_FREQ_HZ
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70 XPAR_PSU_TTC_4_DEVICE_ID,
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71 XPAR_PSU_TTC_4_BASEADDR,
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72 XPAR_PSU_TTC_4_TTC_CLK_FREQ_HZ
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75 XPAR_PSU_TTC_5_DEVICE_ID,
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76 XPAR_PSU_TTC_5_BASEADDR,
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77 XPAR_PSU_TTC_5_TTC_CLK_FREQ_HZ
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80 XPAR_PSU_TTC_6_DEVICE_ID,
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81 XPAR_PSU_TTC_6_BASEADDR,
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82 XPAR_PSU_TTC_6_TTC_CLK_FREQ_HZ
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85 XPAR_PSU_TTC_7_DEVICE_ID,
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86 XPAR_PSU_TTC_7_BASEADDR,
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87 XPAR_PSU_TTC_7_TTC_CLK_FREQ_HZ
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90 XPAR_PSU_TTC_8_DEVICE_ID,
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91 XPAR_PSU_TTC_8_BASEADDR,
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92 XPAR_PSU_TTC_8_TTC_CLK_FREQ_HZ
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95 XPAR_PSU_TTC_9_DEVICE_ID,
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96 XPAR_PSU_TTC_9_BASEADDR,
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97 XPAR_PSU_TTC_9_TTC_CLK_FREQ_HZ
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100 XPAR_PSU_TTC_10_DEVICE_ID,
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101 XPAR_PSU_TTC_10_BASEADDR,
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102 XPAR_PSU_TTC_10_TTC_CLK_FREQ_HZ
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105 XPAR_PSU_TTC_11_DEVICE_ID,
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106 XPAR_PSU_TTC_11_BASEADDR,
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107 XPAR_PSU_TTC_11_TTC_CLK_FREQ_HZ
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