1 /**********************************************************************
\r
2 * $Id$ lpc18xx_timer.h 2011-06-02
\r
4 * @file lpc18xx_timer.h
\r
5 * @brief Contains all functions support for Timer firmware library
\r
8 * @date 02. June. 2011
\r
9 * @author NXP MCU SW Application Team
\r
11 * Copyright(C) 2011, NXP Semiconductor
\r
12 * All rights reserved.
\r
14 ***********************************************************************
\r
15 * Software that is described herein is for illustrative purposes only
\r
16 * which provides customers with programming information regarding the
\r
17 * products. This software is supplied "AS IS" without any warranties.
\r
18 * NXP Semiconductors assumes no responsibility or liability for the
\r
19 * use of the software, conveys no license or title under any patent,
\r
20 * copyright, or mask work right to the product. NXP Semiconductors
\r
21 * reserves the right to make changes in the software without
\r
22 * notification. NXP Semiconductors also make no representation or
\r
23 * warranty that such application will be suitable for the specified
\r
24 * use without further testing or modification.
\r
25 **********************************************************************/
\r
27 /* Peripheral group ----------------------------------------------------------- */
\r
28 /** @defgroup TIMER TIMER
\r
29 * @ingroup LPC1800CMSIS_FwLib_Drivers
\r
33 #ifndef __LPC18XX_TIMER_H_
\r
34 #define __LPC18XX_TIMER_H_
\r
36 /* Includes ------------------------------------------------------------------- */
\r
37 #include "LPC18xx.h"
\r
38 #include "lpc_types.h"
\r
45 /* Private Macros ------------------------------------------------------------- */
\r
46 /** @defgroup TIMER_Private_Macros TIMER Private Macros
\r
50 /* --------------------- BIT DEFINITIONS -------------------------------------- */
\r
51 /**********************************************************************
\r
52 ** Interrupt information
\r
53 **********************************************************************/
\r
54 /** Macro to clean interrupt pending */
\r
55 #define TIM_IR_CLR(n) _BIT(n)
\r
57 /**********************************************************************
\r
58 ** Timer interrupt register definitions
\r
59 **********************************************************************/
\r
60 /** Macro for getting a timer match interrupt bit */
\r
61 #define TIM_MATCH_INT(n) (_BIT(n & 0x0F))
\r
62 /** Macro for getting a capture event interrupt bit */
\r
63 #define TIM_CAP_INT(n) (_BIT(((n & 0x0F) + 4)))
\r
65 /**********************************************************************
\r
66 * Timer control register definitions
\r
67 **********************************************************************/
\r
68 /** Timer/counter enable bit */
\r
69 #define TIM_ENABLE ((uint32_t)(1<<0))
\r
70 /** Timer/counter reset bit */
\r
71 #define TIM_RESET ((uint32_t)(1<<1))
\r
72 /** Timer control bit mask */
\r
73 #define TIM_TCR_MASKBIT ((uint32_t)(3))
\r
75 /**********************************************************************
\r
76 * Timer match control register definitions
\r
77 **********************************************************************/
\r
78 /** Bit location for interrupt on MRx match, n = 0 to 3 */
\r
79 #define TIM_INT_ON_MATCH(n) (_BIT((n * 3)))
\r
80 /** Bit location for reset on MRx match, n = 0 to 3 */
\r
81 #define TIM_RESET_ON_MATCH(n) (_BIT(((n * 3) + 1)))
\r
82 /** Bit location for stop on MRx match, n = 0 to 3 */
\r
83 #define TIM_STOP_ON_MATCH(n) (_BIT(((n * 3) + 2)))
\r
84 /** Timer Match control bit mask */
\r
85 #define TIM_MCR_MASKBIT ((uint32_t)(0x0FFF))
\r
86 /** Timer Match control bit mask for specific channel*/
\r
87 #define TIM_MCR_CHANNEL_MASKBIT(n) ((uint32_t)(7<<(n*3)))
\r
89 /**********************************************************************
\r
90 * Timer capture control register definitions
\r
91 **********************************************************************/
\r
92 /** Bit location for CAP.n on CRx rising edge, n = 0 to 3 */
\r
93 #define TIM_CAP_RISING(n) (_BIT((n * 3)))
\r
94 /** Bit location for CAP.n on CRx falling edge, n = 0 to 3 */
\r
95 #define TIM_CAP_FALLING(n) (_BIT(((n * 3) + 1)))
\r
96 /** Bit location for CAP.n on CRx interrupt enable, n = 0 to 3 */
\r
97 #define TIM_INT_ON_CAP(n) (_BIT(((n * 3) + 2)))
\r
98 /** Mask bit for rising and falling edge bit */
\r
99 #define TIM_EDGE_MASK(n) (_SBF((n * 3), 0x03))
\r
100 /** Timer capture control bit mask */
\r
101 #define TIM_CCR_MASKBIT ((uint32_t)(0x3F))
\r
102 /** Timer Capture control bit mask for specific channel*/
\r
103 #define TIM_CCR_CHANNEL_MASKBIT(n) ((uint32_t)(7<<(n*3)))
\r
105 /**********************************************************************
\r
106 * Timer external match register definitions
\r
107 **********************************************************************/
\r
108 /** Bit location for output state change of MAT.n when external match
\r
109 happens, n = 0 to 3 */
\r
110 #define TIM_EM(n) _BIT(n)
\r
111 /** Output state change of MAT.n when external match happens: no change */
\r
112 #define TIM_EM_NOTHING ((uint8_t)(0x0))
\r
113 /** Output state change of MAT.n when external match happens: low */
\r
114 #define TIM_EM_LOW ((uint8_t)(0x1))
\r
115 /** Output state change of MAT.n when external match happens: high */
\r
116 #define TIM_EM_HIGH ((uint8_t)(0x2))
\r
117 /** Output state change of MAT.n when external match happens: toggle */
\r
118 #define TIM_EM_TOGGLE ((uint8_t)(0x3))
\r
119 /** Macro for setting for the MAT.n change state bits */
\r
120 #define TIM_EM_SET(n,s) (_SBF(((n << 1) + 4), (s & 0x03)))
\r
121 /** Mask for the MAT.n change state bits */
\r
122 #define TIM_EM_MASK(n) (_SBF(((n << 1) + 4), 0x03))
\r
123 /** Timer external match bit mask */
\r
124 #define TIM_EMR_MASKBIT 0x0FFF
\r
126 /**********************************************************************
\r
127 * Timer Count Control Register definitions
\r
128 **********************************************************************/
\r
129 /** Mask to get the Counter/timer mode bits */
\r
130 #define TIM_CTCR_MODE_MASK 0x3
\r
131 /** Mask to get the count input select bits */
\r
132 #define TIM_CTCR_INPUT_MASK 0xC
\r
133 /** Timer Count control bit mask */
\r
134 #define TIM_CTCR_MASKBIT 0xF
\r
135 #define TIM_COUNTER_MODE ((uint8_t)(1))
\r
138 /* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
\r
139 /** Macro to determine if it is valid TIMER peripheral */
\r
140 #define PARAM_TIMx(n) ((((uint32_t *)n)==((uint32_t *)LPC_TIMER0)) || (((uint32_t *)n)==((uint32_t *)LPC_TIMER1)) \
\r
141 || (((uint32_t *)n)==((uint32_t *)LPC_TIMER2)) || (((uint32_t *)n)==((uint32_t *)LPC_TIMER3)))
\r
143 /* Macro check interrupt type */
\r
144 #define PARAM_TIM_INT_TYPE(TYPE) ((TYPE ==TIM_MR0_INT)||(TYPE ==TIM_MR1_INT)\
\r
145 ||(TYPE ==TIM_MR2_INT)||(TYPE ==TIM_MR3_INT)\
\r
146 ||(TYPE ==TIM_CR0_INT)||(TYPE ==TIM_CR1_INT)\
\r
147 ||(TYPE ==TIM_CR2_INT)||(TYPE ==TIM_CR3_INT))
\r
149 /* Macro check TIMER mode */
\r
150 #define PARAM_TIM_MODE_OPT(MODE) ((MODE == TIM_TIMER_MODE)||(MODE == TIM_COUNTER_RISING_MODE)\
\r
151 || (MODE == TIM_COUNTER_RISING_MODE)||(MODE == TIM_COUNTER_RISING_MODE))
\r
153 /* Macro check TIMER prescale value */
\r
154 #define PARAM_TIM_PRESCALE_OPT(OPT) ((OPT == TIM_PRESCALE_TICKVAL)||(OPT == TIM_PRESCALE_USVAL))
\r
156 /* Macro check TIMER counter intput mode */
\r
157 #define PARAM_TIM_COUNTER_INPUT_OPT(OPT) ((OPT == TIM_COUNTER_INCAP0)||(OPT == TIM_COUNTER_INCAP1)\
\r
158 ||(OPT == TIM_COUNTER_INCAP2)||(OPT == TIM_COUNTER_INCAP3))
\r
160 /* Macro check TIMER external match mode */
\r
161 #define PARAM_TIM_EXTMATCH_OPT(OPT) ((OPT == TIM_EXTMATCH_NOTHING)||(OPT == TIM_EXTMATCH_LOW)\
\r
162 ||(OPT == TIM_EXTMATCH_HIGH)||(OPT == TIM_EXTMATCH_TOGGLE))
\r
164 /* Macro check TIMER external match mode */
\r
165 #define PARAM_TIM_CAP_MODE_OPT(OPT) ((OPT == TIM_CAPTURE_NONE)||(OPT == TIM_CAPTURE_RISING) \
\r
166 ||(OPT == TIM_CAPTURE_FALLING)||(OPT == TIM_CAPTURE_ANY))
\r
173 /* Public Types --------------------------------------------------------------- */
\r
174 /** @defgroup TIMER_Public_Types TIMER Public Types
\r
178 /***********************************************************************
\r
179 * @brief Timer device enumeration
\r
180 **********************************************************************/
\r
181 /** @brief interrupt type */
\r
184 TIM_MR0_INT =0, /*!< interrupt for Match channel 0*/
\r
185 TIM_MR1_INT =1, /*!< interrupt for Match channel 1*/
\r
186 TIM_MR2_INT =2, /*!< interrupt for Match channel 2*/
\r
187 TIM_MR3_INT =3, /*!< interrupt for Match channel 3*/
\r
188 TIM_CR0_INT =4, /*!< interrupt for Capture channel 0*/
\r
189 TIM_CR1_INT =5, /*!< interrupt for Capture channel 1*/
\r
190 TIM_CR2_INT =6, /*!< interrupt for Capture channel 1*/
\r
191 TIM_CR3_INT =7 /*!< interrupt for Capture channel 1*/
\r
194 /** @brief Timer/counter operating mode */
\r
197 TIM_TIMER_MODE = 0, /*!< Timer mode */
\r
198 TIM_COUNTER_RISING_MODE, /*!< Counter rising mode */
\r
199 TIM_COUNTER_FALLING_MODE, /*!< Counter falling mode */
\r
200 TIM_COUNTER_ANY_MODE /*!< Counter on both edges */
\r
203 /** @brief Timer/Counter prescale option */
\r
206 TIM_PRESCALE_TICKVAL = 0, /*!< Prescale in absolute value */
\r
207 TIM_PRESCALE_USVAL /*!< Prescale in microsecond value */
\r
208 } TIM_PRESCALE_OPT;
\r
210 /** @brief Counter input option */
\r
213 TIM_COUNTER_INCAP0 = 0, /*!< CAPn.0 input pin for TIMERn */
\r
214 TIM_COUNTER_INCAP1, /*!< CAPn.1 input pin for TIMERn */
\r
215 TIM_COUNTER_INCAP2, /*!< CAPn.2 input pin for TIMERn */
\r
216 TIM_COUNTER_INCAP3 /*!< CAPn.3 input pin for TIMERn */
\r
217 } TIM_COUNTER_INPUT_OPT;
\r
219 /** @brief Timer/Counter external match option */
\r
222 TIM_EXTMATCH_NOTHING = 0, /*!< Do nothing for external output pin if match */
\r
223 TIM_EXTMATCH_LOW, /*!< Force external output pin to low if match */
\r
224 TIM_EXTMATCH_HIGH, /*!< Force external output pin to high if match */
\r
225 TIM_EXTMATCH_TOGGLE /*!< Toggle external output pin if match */
\r
228 /** @brief Timer/counter capture mode options */
\r
230 TIM_CAPTURE_NONE = 0, /*!< No Capture */
\r
231 TIM_CAPTURE_RISING, /*!< Rising capture mode */
\r
232 TIM_CAPTURE_FALLING, /*!< Falling capture mode */
\r
233 TIM_CAPTURE_ANY /*!< On both edges */
\r
234 } TIM_CAP_MODE_OPT;
\r
236 /***********************************************************************
\r
237 * @brief Timer structure definitions
\r
238 **********************************************************************/
\r
239 /** @brief Configuration structure in TIMER mode */
\r
243 uint8_t PrescaleOption; /**< Timer Prescale option, should be:
\r
244 - TIM_PRESCALE_TICKVAL: Prescale in absolute value
\r
245 - TIM_PRESCALE_USVAL: Prescale in microsecond value
\r
247 uint8_t Reserved[3]; /**< Reserved */
\r
248 uint32_t PrescaleValue; /**< Prescale value */
\r
249 } TIM_TIMERCFG_Type;
\r
251 /** @brief Configuration structure in COUNTER mode */
\r
254 uint8_t CounterOption; /**< Counter Option, should be:
\r
255 - TIM_COUNTER_INCAP0: CAPn.0 input pin for TIMERn
\r
256 - TIM_COUNTER_INCAP1: CAPn.1 input pin for TIMERn
\r
258 uint8_t CountInputSelect;
\r
259 uint8_t Reserved[2];
\r
260 } TIM_COUNTERCFG_Type;
\r
262 /** @brief Match channel configuration structure */
\r
264 uint8_t MatchChannel; /**< Match channel, should be in range
\r
266 uint8_t IntOnMatch; /**< Interrupt On match, should be:
\r
267 - ENABLE: Enable this function.
\r
268 - DISABLE: Disable this function.
\r
270 uint8_t StopOnMatch; /**< Stop On match, should be:
\r
271 - ENABLE: Enable this function.
\r
272 - DISABLE: Disable this function.
\r
274 uint8_t ResetOnMatch; /**< Reset On match, should be:
\r
275 - ENABLE: Enable this function.
\r
276 - DISABLE: Disable this function.
\r
279 uint8_t ExtMatchOutputType; /**< External Match Output type, should be:
\r
280 - TIM_EXTMATCH_NOTHING: Do nothing for external output pin if match
\r
281 - TIM_EXTMATCH_LOW: Force external output pin to low if match
\r
282 - TIM_EXTMATCH_HIGH: Force external output pin to high if match
\r
283 - TIM_EXTMATCH_TOGGLE: Toggle external output pin if match.
\r
285 uint8_t Reserved[3]; /** Reserved */
\r
286 uint32_t MatchValue; /** Match value */
\r
287 } TIM_MATCHCFG_Type;
\r
289 /** @brief Capture Input configuration structure */
\r
291 uint8_t CaptureChannel; /**< Capture channel, should be in range
\r
293 uint8_t RisingEdge; /**< caption rising edge, should be:
\r
294 - ENABLE: Enable rising edge.
\r
295 - DISABLE: Disable this function.
\r
297 uint8_t FallingEdge; /**< caption falling edge, should be:
\r
298 - ENABLE: Enable falling edge.
\r
299 - DISABLE: Disable this function.
\r
301 uint8_t IntOnCaption; /**< Interrupt On caption, should be:
\r
302 - ENABLE: Enable interrupt function.
\r
303 - DISABLE: Disable this function.
\r
306 } TIM_CAPTURECFG_Type;
\r
313 /* Public Functions ----------------------------------------------------------- */
\r
314 /** @defgroup TIMER_Public_Functions TIMER Public Functions
\r
317 /* Init/DeInit TIM functions -----------*/
\r
318 void TIM_Init(LPC_TIMERn_Type *TIMx, TIM_MODE_OPT TimerCounterMode, void *TIM_ConfigStruct);
\r
319 void TIM_DeInit(LPC_TIMERn_Type *TIMx);
\r
321 /* TIM interrupt functions -------------*/
\r
322 void TIM_ClearIntPending(LPC_TIMERn_Type *TIMx, TIM_INT_TYPE IntFlag);
\r
323 void TIM_ClearIntCapturePending(LPC_TIMERn_Type *TIMx, TIM_INT_TYPE IntFlag);
\r
324 FlagStatus TIM_GetIntStatus(LPC_TIMERn_Type *TIMx, TIM_INT_TYPE IntFlag);
\r
325 FlagStatus TIM_GetIntCaptureStatus(LPC_TIMERn_Type *TIMx, TIM_INT_TYPE IntFlag);
\r
327 /* TIM configuration functions --------*/
\r
328 void TIM_ConfigStructInit(TIM_MODE_OPT TimerCounterMode, void *TIM_ConfigStruct);
\r
329 void TIM_ConfigMatch(LPC_TIMERn_Type *TIMx, TIM_MATCHCFG_Type *TIM_MatchConfigStruct);
\r
330 void TIM_UpdateMatchValue(LPC_TIMERn_Type *TIMx,uint8_t MatchChannel, uint32_t MatchValue);
\r
331 void TIM_SetMatchExt(LPC_TIMERn_Type *TIMx,TIM_EXTMATCH_OPT ext_match );
\r
332 void TIM_ConfigCapture(LPC_TIMERn_Type *TIMx, TIM_CAPTURECFG_Type *TIM_CaptureConfigStruct);
\r
333 void TIM_Cmd(LPC_TIMERn_Type *TIMx, FunctionalState NewState);
\r
335 uint32_t TIM_GetCaptureValue(LPC_TIMERn_Type *TIMx, TIM_COUNTER_INPUT_OPT CaptureChannel);
\r
336 void TIM_ResetCounter(LPC_TIMERn_Type *TIMx);
\r
337 void TIM_Waitus(uint32_t time);
\r
338 void TIM_Waitms(uint32_t time);
\r
346 #endif /* __LPC18XX_TIMER_H_ */
\r
352 /* --------------------------------- End Of File ------------------------------ */
\r