1 /***************************************************************************//**
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3 * @brief Analog Comparator (ACMP) peripheral API
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5 *******************************************************************************
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7 * <b>(C) Copyright 2015 Silicon Labs, http://www.silabs.com</b>
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8 *******************************************************************************
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10 * Permission is granted to anyone to use this software for any purpose,
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11 * including commercial applications, and to alter it and redistribute it
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12 * freely, subject to the following restrictions:
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14 * 1. The origin of this software must not be misrepresented; you must not
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15 * claim that you wrote the original software.
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16 * 2. Altered source versions must be plainly marked as such, and must not be
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17 * misrepresented as being the original software.
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18 * 3. This notice may not be removed or altered from any source distribution.
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20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no
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21 * obligation to support this Software. Silicon Labs is providing the
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22 * Software "AS IS", with no express or implied warranties of any kind,
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23 * including, but not limited to, any implied warranties of merchantability
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24 * or fitness for any particular purpose or warranties against infringement
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25 * of any proprietary rights of a third party.
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27 * Silicon Labs will not be liable for any consequential, incidental, or
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28 * special damages, or any other relief, or for any claim by any third party,
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29 * arising from your use of this Software.
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31 ******************************************************************************/
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33 #ifndef __SILICON_LABS_EM_ACMP_H__
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34 #define __SILICON_LABS_EM_ACMP_H__
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36 #include "em_device.h"
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37 #if defined(ACMP_COUNT) && (ACMP_COUNT > 0)
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40 #include <stdbool.h>
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46 /***************************************************************************//**
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47 * @addtogroup EM_Library
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49 ******************************************************************************/
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51 /***************************************************************************//**
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54 ******************************************************************************/
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56 /*******************************************************************************
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57 ******************************** ENUMS ************************************
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58 ******************************************************************************/
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60 /** Resistor values used for the internal capacative sense resistor. See the
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61 * datasheet for your device for details on each resistor value. */
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64 acmpResistor0 = _ACMP_INPUTSEL_CSRESSEL_RES0, /**< Resistor value 0 */
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65 acmpResistor1 = _ACMP_INPUTSEL_CSRESSEL_RES1, /**< Resistor value 1 */
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66 acmpResistor2 = _ACMP_INPUTSEL_CSRESSEL_RES2, /**< Resistor value 2 */
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67 acmpResistor3 = _ACMP_INPUTSEL_CSRESSEL_RES3, /**< Resistor value 3 */
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68 #if defined(_ACMP_INPUTSEL_CSRESSEL_RES4)
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69 acmpResistor4 = _ACMP_INPUTSEL_CSRESSEL_RES4, /**< Resistor value 4 */
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70 acmpResistor5 = _ACMP_INPUTSEL_CSRESSEL_RES5, /**< Resistor value 5 */
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71 acmpResistor6 = _ACMP_INPUTSEL_CSRESSEL_RES6, /**< Resistor value 6 */
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72 acmpResistor7 = _ACMP_INPUTSEL_CSRESSEL_RES7, /**< Resistor value 7 */
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74 } ACMP_CapsenseResistor_TypeDef;
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76 /** Hysteresis level. See datasheet for your device for details on each
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80 #if defined(_ACMP_CTRL_HYSTSEL_MASK)
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81 acmpHysteresisLevel0 = _ACMP_CTRL_HYSTSEL_HYST0, /**< Hysteresis level 0 */
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82 acmpHysteresisLevel1 = _ACMP_CTRL_HYSTSEL_HYST1, /**< Hysteresis level 1 */
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83 acmpHysteresisLevel2 = _ACMP_CTRL_HYSTSEL_HYST2, /**< Hysteresis level 2 */
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84 acmpHysteresisLevel3 = _ACMP_CTRL_HYSTSEL_HYST3, /**< Hysteresis level 3 */
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85 acmpHysteresisLevel4 = _ACMP_CTRL_HYSTSEL_HYST4, /**< Hysteresis level 4 */
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86 acmpHysteresisLevel5 = _ACMP_CTRL_HYSTSEL_HYST5, /**< Hysteresis level 5 */
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87 acmpHysteresisLevel6 = _ACMP_CTRL_HYSTSEL_HYST6, /**< Hysteresis level 6 */
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88 acmpHysteresisLevel7 = _ACMP_CTRL_HYSTSEL_HYST7 /**< Hysteresis level 7 */
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90 #if defined(_ACMP_HYSTERESIS0_HYST_MASK)
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91 acmpHysteresisLevel0 = _ACMP_HYSTERESIS0_HYST_HYST0, /**< Hysteresis level 0 */
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92 acmpHysteresisLevel1 = _ACMP_HYSTERESIS0_HYST_HYST1, /**< Hysteresis level 1 */
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93 acmpHysteresisLevel2 = _ACMP_HYSTERESIS0_HYST_HYST2, /**< Hysteresis level 2 */
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94 acmpHysteresisLevel3 = _ACMP_HYSTERESIS0_HYST_HYST3, /**< Hysteresis level 3 */
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95 acmpHysteresisLevel4 = _ACMP_HYSTERESIS0_HYST_HYST4, /**< Hysteresis level 4 */
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96 acmpHysteresisLevel5 = _ACMP_HYSTERESIS0_HYST_HYST5, /**< Hysteresis level 5 */
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97 acmpHysteresisLevel6 = _ACMP_HYSTERESIS0_HYST_HYST6, /**< Hysteresis level 6 */
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98 acmpHysteresisLevel7 = _ACMP_HYSTERESIS0_HYST_HYST7, /**< Hysteresis level 7 */
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99 acmpHysteresisLevel8 = _ACMP_HYSTERESIS0_HYST_HYST8, /**< Hysteresis level 8 */
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100 acmpHysteresisLevel9 = _ACMP_HYSTERESIS0_HYST_HYST9, /**< Hysteresis level 9 */
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101 acmpHysteresisLevel10 = _ACMP_HYSTERESIS0_HYST_HYST10, /**< Hysteresis level 10 */
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102 acmpHysteresisLevel11 = _ACMP_HYSTERESIS0_HYST_HYST11, /**< Hysteresis level 11 */
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103 acmpHysteresisLevel12 = _ACMP_HYSTERESIS0_HYST_HYST12, /**< Hysteresis level 12 */
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104 acmpHysteresisLevel13 = _ACMP_HYSTERESIS0_HYST_HYST13, /**< Hysteresis level 13 */
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105 acmpHysteresisLevel14 = _ACMP_HYSTERESIS0_HYST_HYST14, /**< Hysteresis level 14 */
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106 acmpHysteresisLevel15 = _ACMP_HYSTERESIS0_HYST_HYST15, /**< Hysteresis level 15 */
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108 } ACMP_HysteresisLevel_TypeDef;
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110 #if defined(_ACMP_CTRL_WARMTIME_MASK)
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111 /** ACMP warmup time. The delay is measured in HFPERCLK cycles and should
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112 * be at least 10 us. */
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115 /** 4 HFPERCLK cycles warmup */
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116 acmpWarmTime4 = _ACMP_CTRL_WARMTIME_4CYCLES,
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117 /** 8 HFPERCLK cycles warmup */
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118 acmpWarmTime8 = _ACMP_CTRL_WARMTIME_8CYCLES,
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119 /** 16 HFPERCLK cycles warmup */
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120 acmpWarmTime16 = _ACMP_CTRL_WARMTIME_16CYCLES,
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121 /** 32 HFPERCLK cycles warmup */
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122 acmpWarmTime32 = _ACMP_CTRL_WARMTIME_32CYCLES,
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123 /** 64 HFPERCLK cycles warmup */
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124 acmpWarmTime64 = _ACMP_CTRL_WARMTIME_64CYCLES,
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125 /** 128 HFPERCLK cycles warmup */
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126 acmpWarmTime128 = _ACMP_CTRL_WARMTIME_128CYCLES,
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127 /** 256 HFPERCLK cycles warmup */
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128 acmpWarmTime256 = _ACMP_CTRL_WARMTIME_256CYCLES,
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129 /** 512 HFPERCLK cycles warmup */
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130 acmpWarmTime512 = _ACMP_CTRL_WARMTIME_512CYCLES
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131 } ACMP_WarmTime_TypeDef;
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134 #if defined(_ACMP_CTRL_INPUTRANGE_MASK)
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136 * Adjust performance of the ACMP for a given input voltage range
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140 acmpInputRangeFull = _ACMP_CTRL_INPUTRANGE_FULL, /**< Input can be from 0 to Vdd */
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141 acmpInputRangeHigh = _ACMP_CTRL_INPUTRANGE_GTVDDDIV2, /**< Input will always be greater than Vdd/2 */
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142 acmpInputRangeLow = _ACMP_CTRL_INPUTRANGE_LTVDDDIV2 /**< Input will always be less than Vdd/2 */
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143 } ACMP_InputRange_TypeDef;
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146 #if defined(_ACMP_CTRL_PWRSEL_MASK)
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148 * ACMP Power source.
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152 acmpPowerSourceAvdd = _ACMP_CTRL_PWRSEL_AVDD, /**< Power the ACMP using the AVDD supply */
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153 acmpPowerSourceVddVreg = _ACMP_CTRL_PWRSEL_VREGVDD, /**< Power the ACMP using the VREGVDD supply */
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154 acmpPowerSourceIOVdd0 = _ACMP_CTRL_PWRSEL_IOVDD0, /**< Power the ACMP using the IOVDD/IOVDD0 supply */
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155 acmpPowerSourceIOVdd1 = _ACMP_CTRL_PWRSEL_IOVDD1, /**< Power the ACMP using the IOVDD1 supply (if part has two I/O voltages) */
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156 } ACMP_PowerSource_TypeDef;
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159 #if defined(_ACMP_CTRL_ACCURACY_MASK)
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161 * ACMP accuracy mode.
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165 acmpAccuracyLow = _ACMP_CTRL_ACCURACY_LOW, /**< Low-accuracy mode but consume less current */
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166 acmpAccuracyHigh = _ACMP_CTRL_ACCURACY_HIGH /**< High-accuracy mode but consume more current */
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167 } ACMP_Accuracy_TypeDef;
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170 #if defined(_ACMP_INPUTSEL_VASEL_MASK)
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171 /** ACMP Input to the VA divider. This enum is used to select the input for
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172 * the VA Divider */
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175 acmpVAInputVDD = _ACMP_INPUTSEL_VASEL_VDD,
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176 acmpVAInputAPORT2YCH0 = _ACMP_INPUTSEL_VASEL_APORT2YCH0,
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177 acmpVAInputAPORT2YCH2 = _ACMP_INPUTSEL_VASEL_APORT2YCH2,
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178 acmpVAInputAPORT2YCH4 = _ACMP_INPUTSEL_VASEL_APORT2YCH4,
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179 acmpVAInputAPORT2YCH6 = _ACMP_INPUTSEL_VASEL_APORT2YCH6,
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180 acmpVAInputAPORT2YCH8 = _ACMP_INPUTSEL_VASEL_APORT2YCH8,
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181 acmpVAInputAPORT2YCH10 = _ACMP_INPUTSEL_VASEL_APORT2YCH10,
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182 acmpVAInputAPORT2YCH12 = _ACMP_INPUTSEL_VASEL_APORT2YCH12,
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183 acmpVAInputAPORT2YCH14 = _ACMP_INPUTSEL_VASEL_APORT2YCH14,
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184 acmpVAInputAPORT2YCH16 = _ACMP_INPUTSEL_VASEL_APORT2YCH16,
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185 acmpVAInputAPORT2YCH18 = _ACMP_INPUTSEL_VASEL_APORT2YCH18,
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186 acmpVAInputAPORT2YCH20 = _ACMP_INPUTSEL_VASEL_APORT2YCH20,
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187 acmpVAInputAPORT2YCH22 = _ACMP_INPUTSEL_VASEL_APORT2YCH22,
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188 acmpVAInputAPORT2YCH24 = _ACMP_INPUTSEL_VASEL_APORT2YCH24,
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189 acmpVAInputAPORT2YCH26 = _ACMP_INPUTSEL_VASEL_APORT2YCH26,
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190 acmpVAInputAPORT2YCH28 = _ACMP_INPUTSEL_VASEL_APORT2YCH28,
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191 acmpVAInputAPORT2YCH30 = _ACMP_INPUTSEL_VASEL_APORT2YCH30,
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192 acmpVAInputAPORT1XCH0 = _ACMP_INPUTSEL_VASEL_APORT1XCH0,
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193 acmpVAInputAPORT1YCH1 = _ACMP_INPUTSEL_VASEL_APORT1YCH1,
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194 acmpVAInputAPORT1XCH2 = _ACMP_INPUTSEL_VASEL_APORT1XCH2,
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195 acmpVAInputAPORT1YCH3 = _ACMP_INPUTSEL_VASEL_APORT1YCH3,
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196 acmpVAInputAPORT1XCH4 = _ACMP_INPUTSEL_VASEL_APORT1XCH4,
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197 acmpVAInputAPORT1YCH5 = _ACMP_INPUTSEL_VASEL_APORT1YCH5,
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198 acmpVAInputAPORT1XCH6 = _ACMP_INPUTSEL_VASEL_APORT1XCH6,
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199 acmpVAInputAPORT1YCH7 = _ACMP_INPUTSEL_VASEL_APORT1YCH7,
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200 acmpVAInputAPORT1XCH8 = _ACMP_INPUTSEL_VASEL_APORT1XCH8,
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201 acmpVAInputAPORT1YCH9 = _ACMP_INPUTSEL_VASEL_APORT1YCH9,
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202 acmpVAInputAPORT1XCH10 = _ACMP_INPUTSEL_VASEL_APORT1XCH10,
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203 acmpVAInputAPORT1YCH11 = _ACMP_INPUTSEL_VASEL_APORT1YCH11,
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204 acmpVAInputAPORT1XCH12 = _ACMP_INPUTSEL_VASEL_APORT1XCH12,
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205 acmpVAInputAPORT1YCH13 = _ACMP_INPUTSEL_VASEL_APORT1YCH13,
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206 acmpVAInputAPORT1XCH14 = _ACMP_INPUTSEL_VASEL_APORT1XCH14,
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207 acmpVAInputAPORT1YCH15 = _ACMP_INPUTSEL_VASEL_APORT1YCH15,
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208 acmpVAInputAPORT1XCH16 = _ACMP_INPUTSEL_VASEL_APORT1XCH16,
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209 acmpVAInputAPORT1YCH17 = _ACMP_INPUTSEL_VASEL_APORT1YCH17,
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210 acmpVAInputAPORT1XCH18 = _ACMP_INPUTSEL_VASEL_APORT1XCH18,
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211 acmpVAInputAPORT1YCH19 = _ACMP_INPUTSEL_VASEL_APORT1YCH19,
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212 acmpVAInputAPORT1XCH20 = _ACMP_INPUTSEL_VASEL_APORT1XCH20,
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213 acmpVAInputAPORT1YCH21 = _ACMP_INPUTSEL_VASEL_APORT1YCH21,
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214 acmpVAInputAPORT1XCH22 = _ACMP_INPUTSEL_VASEL_APORT1XCH22,
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215 acmpVAInputAPORT1YCH23 = _ACMP_INPUTSEL_VASEL_APORT1YCH23,
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216 acmpVAInputAPORT1XCH24 = _ACMP_INPUTSEL_VASEL_APORT1XCH24,
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217 acmpVAInputAPORT1YCH25 = _ACMP_INPUTSEL_VASEL_APORT1YCH25,
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218 acmpVAInputAPORT1XCH26 = _ACMP_INPUTSEL_VASEL_APORT1XCH26,
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219 acmpVAInputAPORT1YCH27 = _ACMP_INPUTSEL_VASEL_APORT1YCH27,
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220 acmpVAInputAPORT1XCH28 = _ACMP_INPUTSEL_VASEL_APORT1XCH28,
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221 acmpVAInputAPORT1YCH29 = _ACMP_INPUTSEL_VASEL_APORT1YCH29,
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222 acmpVAInputAPORT1XCH30 = _ACMP_INPUTSEL_VASEL_APORT1XCH30,
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223 acmpVAInputAPORT1YCH31 = _ACMP_INPUTSEL_VASEL_APORT1YCH31
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224 } ACMP_VAInput_TypeDef;
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227 #if defined(_ACMP_INPUTSEL_VBSEL_MASK)
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229 * ACMP Input to the VB divider. This enum is used to select the input for
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234 acmpVBInput1V25 = _ACMP_INPUTSEL_VBSEL_1V25,
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235 acmpVBInput2V5 = _ACMP_INPUTSEL_VBSEL_2V5
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236 } ACMP_VBInput_TypeDef;
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239 #if defined(_ACMP_INPUTSEL_VLPSEL_MASK)
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241 * ACMP Low-Power Input Selection.
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245 acmpVLPInputVADIV = _ACMP_INPUTSEL_VLPSEL_VADIV,
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246 acmpVLPInputVBDIV = _ACMP_INPUTSEL_VLPSEL_VBDIV
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247 } ACMP_VLPInput_Typedef;
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250 #if defined(_SILICON_LABS_32B_PLATFORM_2)
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251 /** ACMP Input Selection */
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254 acmpInputAPORT0XCH0 = _ACMP_INPUTSEL_POSSEL_APORT0XCH0,
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255 acmpInputAPORT0XCH1 = _ACMP_INPUTSEL_POSSEL_APORT0XCH1,
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256 acmpInputAPORT0XCH2 = _ACMP_INPUTSEL_POSSEL_APORT0XCH2,
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257 acmpInputAPORT0XCH3 = _ACMP_INPUTSEL_POSSEL_APORT0XCH3,
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258 acmpInputAPORT0XCH4 = _ACMP_INPUTSEL_POSSEL_APORT0XCH4,
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259 acmpInputAPORT0XCH5 = _ACMP_INPUTSEL_POSSEL_APORT0XCH5,
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260 acmpInputAPORT0XCH6 = _ACMP_INPUTSEL_POSSEL_APORT0XCH6,
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261 acmpInputAPORT0XCH7 = _ACMP_INPUTSEL_POSSEL_APORT0XCH7,
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262 acmpInputAPORT0XCH8 = _ACMP_INPUTSEL_POSSEL_APORT0XCH8,
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263 acmpInputAPORT0XCH9 = _ACMP_INPUTSEL_POSSEL_APORT0XCH9,
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264 acmpInputAPORT0XCH10 = _ACMP_INPUTSEL_POSSEL_APORT0XCH10,
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265 acmpInputAPORT0XCH11 = _ACMP_INPUTSEL_POSSEL_APORT0XCH11,
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266 acmpInputAPORT0XCH12 = _ACMP_INPUTSEL_POSSEL_APORT0XCH12,
\r
267 acmpInputAPORT0XCH13 = _ACMP_INPUTSEL_POSSEL_APORT0XCH13,
\r
268 acmpInputAPORT0XCH14 = _ACMP_INPUTSEL_POSSEL_APORT0XCH14,
\r
269 acmpInputAPORT0XCH15 = _ACMP_INPUTSEL_POSSEL_APORT0XCH15,
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270 acmpInputAPORT0YCH0 = _ACMP_INPUTSEL_POSSEL_APORT0YCH0,
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271 acmpInputAPORT0YCH1 = _ACMP_INPUTSEL_POSSEL_APORT0YCH1,
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272 acmpInputAPORT0YCH2 = _ACMP_INPUTSEL_POSSEL_APORT0YCH2,
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273 acmpInputAPORT0YCH3 = _ACMP_INPUTSEL_POSSEL_APORT0YCH3,
\r
274 acmpInputAPORT0YCH4 = _ACMP_INPUTSEL_POSSEL_APORT0YCH4,
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275 acmpInputAPORT0YCH5 = _ACMP_INPUTSEL_POSSEL_APORT0YCH5,
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276 acmpInputAPORT0YCH6 = _ACMP_INPUTSEL_POSSEL_APORT0YCH6,
\r
277 acmpInputAPORT0YCH7 = _ACMP_INPUTSEL_POSSEL_APORT0YCH7,
\r
278 acmpInputAPORT0YCH8 = _ACMP_INPUTSEL_POSSEL_APORT0YCH8,
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279 acmpInputAPORT0YCH9 = _ACMP_INPUTSEL_POSSEL_APORT0YCH9,
\r
280 acmpInputAPORT0YCH10 = _ACMP_INPUTSEL_POSSEL_APORT0YCH10,
\r
281 acmpInputAPORT0YCH11 = _ACMP_INPUTSEL_POSSEL_APORT0YCH11,
\r
282 acmpInputAPORT0YCH12 = _ACMP_INPUTSEL_POSSEL_APORT0YCH12,
\r
283 acmpInputAPORT0YCH13 = _ACMP_INPUTSEL_POSSEL_APORT0YCH13,
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284 acmpInputAPORT0YCH14 = _ACMP_INPUTSEL_POSSEL_APORT0YCH14,
\r
285 acmpInputAPORT0YCH15 = _ACMP_INPUTSEL_POSSEL_APORT0YCH15,
\r
286 acmpInputAPORT1XCH0 = _ACMP_INPUTSEL_POSSEL_APORT1XCH0,
\r
287 acmpInputAPORT1YCH1 = _ACMP_INPUTSEL_POSSEL_APORT1YCH1,
\r
288 acmpInputAPORT1XCH2 = _ACMP_INPUTSEL_POSSEL_APORT1XCH2,
\r
289 acmpInputAPORT1YCH3 = _ACMP_INPUTSEL_POSSEL_APORT1YCH3,
\r
290 acmpInputAPORT1XCH4 = _ACMP_INPUTSEL_POSSEL_APORT1XCH4,
\r
291 acmpInputAPORT1YCH5 = _ACMP_INPUTSEL_POSSEL_APORT1YCH5,
\r
292 acmpInputAPORT1XCH6 = _ACMP_INPUTSEL_POSSEL_APORT1XCH6,
\r
293 acmpInputAPORT1YCH7 = _ACMP_INPUTSEL_POSSEL_APORT1YCH7,
\r
294 acmpInputAPORT1XCH8 = _ACMP_INPUTSEL_POSSEL_APORT1XCH8,
\r
295 acmpInputAPORT1YCH9 = _ACMP_INPUTSEL_POSSEL_APORT1YCH9,
\r
296 acmpInputAPORT1XCH10 = _ACMP_INPUTSEL_POSSEL_APORT1XCH10,
\r
297 acmpInputAPORT1YCH11 = _ACMP_INPUTSEL_POSSEL_APORT1YCH11,
\r
298 acmpInputAPORT1XCH12 = _ACMP_INPUTSEL_POSSEL_APORT1XCH12,
\r
299 acmpInputAPORT1YCH13 = _ACMP_INPUTSEL_POSSEL_APORT1YCH13,
\r
300 acmpInputAPORT1XCH14 = _ACMP_INPUTSEL_POSSEL_APORT1XCH14,
\r
301 acmpInputAPORT1YCH15 = _ACMP_INPUTSEL_POSSEL_APORT1YCH15,
\r
302 acmpInputAPORT1XCH16 = _ACMP_INPUTSEL_POSSEL_APORT1XCH16,
\r
303 acmpInputAPORT1YCH17 = _ACMP_INPUTSEL_POSSEL_APORT1YCH17,
\r
304 acmpInputAPORT1XCH18 = _ACMP_INPUTSEL_POSSEL_APORT1XCH18,
\r
305 acmpInputAPORT1YCH19 = _ACMP_INPUTSEL_POSSEL_APORT1YCH19,
\r
306 acmpInputAPORT1XCH20 = _ACMP_INPUTSEL_POSSEL_APORT1XCH20,
\r
307 acmpInputAPORT1YCH21 = _ACMP_INPUTSEL_POSSEL_APORT1YCH21,
\r
308 acmpInputAPORT1XCH22 = _ACMP_INPUTSEL_POSSEL_APORT1XCH22,
\r
309 acmpInputAPORT1YCH23 = _ACMP_INPUTSEL_POSSEL_APORT1YCH23,
\r
310 acmpInputAPORT1XCH24 = _ACMP_INPUTSEL_POSSEL_APORT1XCH24,
\r
311 acmpInputAPORT1YCH25 = _ACMP_INPUTSEL_POSSEL_APORT1YCH25,
\r
312 acmpInputAPORT1XCH26 = _ACMP_INPUTSEL_POSSEL_APORT1XCH26,
\r
313 acmpInputAPORT1YCH27 = _ACMP_INPUTSEL_POSSEL_APORT1YCH27,
\r
314 acmpInputAPORT1XCH28 = _ACMP_INPUTSEL_POSSEL_APORT1XCH28,
\r
315 acmpInputAPORT1YCH29 = _ACMP_INPUTSEL_POSSEL_APORT1YCH29,
\r
316 acmpInputAPORT1XCH30 = _ACMP_INPUTSEL_POSSEL_APORT1XCH30,
\r
317 acmpInputAPORT1YCH31 = _ACMP_INPUTSEL_POSSEL_APORT1YCH31,
\r
318 acmpInputAPORT2YCH0 = _ACMP_INPUTSEL_POSSEL_APORT2YCH0,
\r
319 acmpInputAPORT2XCH1 = _ACMP_INPUTSEL_POSSEL_APORT2XCH1,
\r
320 acmpInputAPORT2YCH2 = _ACMP_INPUTSEL_POSSEL_APORT2YCH2,
\r
321 acmpInputAPORT2XCH3 = _ACMP_INPUTSEL_POSSEL_APORT2XCH3,
\r
322 acmpInputAPORT2YCH4 = _ACMP_INPUTSEL_POSSEL_APORT2YCH4,
\r
323 acmpInputAPORT2XCH5 = _ACMP_INPUTSEL_POSSEL_APORT2XCH5,
\r
324 acmpInputAPORT2YCH6 = _ACMP_INPUTSEL_POSSEL_APORT2YCH6,
\r
325 acmpInputAPORT2XCH7 = _ACMP_INPUTSEL_POSSEL_APORT2XCH7,
\r
326 acmpInputAPORT2YCH8 = _ACMP_INPUTSEL_POSSEL_APORT2YCH8,
\r
327 acmpInputAPORT2XCH9 = _ACMP_INPUTSEL_POSSEL_APORT2XCH9,
\r
328 acmpInputAPORT2YCH10 = _ACMP_INPUTSEL_POSSEL_APORT2YCH10,
\r
329 acmpInputAPORT2XCH11 = _ACMP_INPUTSEL_POSSEL_APORT2XCH11,
\r
330 acmpInputAPORT2YCH12 = _ACMP_INPUTSEL_POSSEL_APORT2YCH12,
\r
331 acmpInputAPORT2XCH13 = _ACMP_INPUTSEL_POSSEL_APORT2XCH13,
\r
332 acmpInputAPORT2YCH14 = _ACMP_INPUTSEL_POSSEL_APORT2YCH14,
\r
333 acmpInputAPORT2XCH15 = _ACMP_INPUTSEL_POSSEL_APORT2XCH15,
\r
334 acmpInputAPORT2YCH16 = _ACMP_INPUTSEL_POSSEL_APORT2YCH16,
\r
335 acmpInputAPORT2XCH17 = _ACMP_INPUTSEL_POSSEL_APORT2XCH17,
\r
336 acmpInputAPORT2YCH18 = _ACMP_INPUTSEL_POSSEL_APORT2YCH18,
\r
337 acmpInputAPORT2XCH19 = _ACMP_INPUTSEL_POSSEL_APORT2XCH19,
\r
338 acmpInputAPORT2YCH20 = _ACMP_INPUTSEL_POSSEL_APORT2YCH20,
\r
339 acmpInputAPORT2XCH21 = _ACMP_INPUTSEL_POSSEL_APORT2XCH21,
\r
340 acmpInputAPORT2YCH22 = _ACMP_INPUTSEL_POSSEL_APORT2YCH22,
\r
341 acmpInputAPORT2XCH23 = _ACMP_INPUTSEL_POSSEL_APORT2XCH23,
\r
342 acmpInputAPORT2YCH24 = _ACMP_INPUTSEL_POSSEL_APORT2YCH24,
\r
343 acmpInputAPORT2XCH25 = _ACMP_INPUTSEL_POSSEL_APORT2XCH25,
\r
344 acmpInputAPORT2YCH26 = _ACMP_INPUTSEL_POSSEL_APORT2YCH26,
\r
345 acmpInputAPORT2XCH27 = _ACMP_INPUTSEL_POSSEL_APORT2XCH27,
\r
346 acmpInputAPORT2YCH28 = _ACMP_INPUTSEL_POSSEL_APORT2YCH28,
\r
347 acmpInputAPORT2XCH29 = _ACMP_INPUTSEL_POSSEL_APORT2XCH29,
\r
348 acmpInputAPORT2YCH30 = _ACMP_INPUTSEL_POSSEL_APORT2YCH30,
\r
349 acmpInputAPORT2XCH31 = _ACMP_INPUTSEL_POSSEL_APORT2XCH31,
\r
350 acmpInputAPORT3XCH0 = _ACMP_INPUTSEL_POSSEL_APORT3XCH0,
\r
351 acmpInputAPORT3YCH1 = _ACMP_INPUTSEL_POSSEL_APORT3YCH1,
\r
352 acmpInputAPORT3XCH2 = _ACMP_INPUTSEL_POSSEL_APORT3XCH2,
\r
353 acmpInputAPORT3YCH3 = _ACMP_INPUTSEL_POSSEL_APORT3YCH3,
\r
354 acmpInputAPORT3XCH4 = _ACMP_INPUTSEL_POSSEL_APORT3XCH4,
\r
355 acmpInputAPORT3YCH5 = _ACMP_INPUTSEL_POSSEL_APORT3YCH5,
\r
356 acmpInputAPORT3XCH6 = _ACMP_INPUTSEL_POSSEL_APORT3XCH6,
\r
357 acmpInputAPORT3YCH7 = _ACMP_INPUTSEL_POSSEL_APORT3YCH7,
\r
358 acmpInputAPORT3XCH8 = _ACMP_INPUTSEL_POSSEL_APORT3XCH8,
\r
359 acmpInputAPORT3YCH9 = _ACMP_INPUTSEL_POSSEL_APORT3YCH9,
\r
360 acmpInputAPORT3XCH10 = _ACMP_INPUTSEL_POSSEL_APORT3XCH10,
\r
361 acmpInputAPORT3YCH11 = _ACMP_INPUTSEL_POSSEL_APORT3YCH11,
\r
362 acmpInputAPORT3XCH12 = _ACMP_INPUTSEL_POSSEL_APORT3XCH12,
\r
363 acmpInputAPORT3YCH13 = _ACMP_INPUTSEL_POSSEL_APORT3YCH13,
\r
364 acmpInputAPORT3XCH14 = _ACMP_INPUTSEL_POSSEL_APORT3XCH14,
\r
365 acmpInputAPORT3YCH15 = _ACMP_INPUTSEL_POSSEL_APORT3YCH15,
\r
366 acmpInputAPORT3XCH16 = _ACMP_INPUTSEL_POSSEL_APORT3XCH16,
\r
367 acmpInputAPORT3YCH17 = _ACMP_INPUTSEL_POSSEL_APORT3YCH17,
\r
368 acmpInputAPORT3XCH18 = _ACMP_INPUTSEL_POSSEL_APORT3XCH18,
\r
369 acmpInputAPORT3YCH19 = _ACMP_INPUTSEL_POSSEL_APORT3YCH19,
\r
370 acmpInputAPORT3XCH20 = _ACMP_INPUTSEL_POSSEL_APORT3XCH20,
\r
371 acmpInputAPORT3YCH21 = _ACMP_INPUTSEL_POSSEL_APORT3YCH21,
\r
372 acmpInputAPORT3XCH22 = _ACMP_INPUTSEL_POSSEL_APORT3XCH22,
\r
373 acmpInputAPORT3YCH23 = _ACMP_INPUTSEL_POSSEL_APORT3YCH23,
\r
374 acmpInputAPORT3XCH24 = _ACMP_INPUTSEL_POSSEL_APORT3XCH24,
\r
375 acmpInputAPORT3YCH25 = _ACMP_INPUTSEL_POSSEL_APORT3YCH25,
\r
376 acmpInputAPORT3XCH26 = _ACMP_INPUTSEL_POSSEL_APORT3XCH26,
\r
377 acmpInputAPORT3YCH27 = _ACMP_INPUTSEL_POSSEL_APORT3YCH27,
\r
378 acmpInputAPORT3XCH28 = _ACMP_INPUTSEL_POSSEL_APORT3XCH28,
\r
379 acmpInputAPORT3YCH29 = _ACMP_INPUTSEL_POSSEL_APORT3YCH29,
\r
380 acmpInputAPORT3XCH30 = _ACMP_INPUTSEL_POSSEL_APORT3XCH30,
\r
381 acmpInputAPORT3YCH31 = _ACMP_INPUTSEL_POSSEL_APORT3YCH31,
\r
382 acmpInputAPORT4YCH0 = _ACMP_INPUTSEL_POSSEL_APORT4YCH0,
\r
383 acmpInputAPORT4XCH1 = _ACMP_INPUTSEL_POSSEL_APORT4XCH1,
\r
384 acmpInputAPORT4YCH2 = _ACMP_INPUTSEL_POSSEL_APORT4YCH2,
\r
385 acmpInputAPORT4XCH3 = _ACMP_INPUTSEL_POSSEL_APORT4XCH3,
\r
386 acmpInputAPORT4YCH4 = _ACMP_INPUTSEL_POSSEL_APORT4YCH4,
\r
387 acmpInputAPORT4XCH5 = _ACMP_INPUTSEL_POSSEL_APORT4XCH5,
\r
388 acmpInputAPORT4YCH6 = _ACMP_INPUTSEL_POSSEL_APORT4YCH6,
\r
389 acmpInputAPORT4XCH7 = _ACMP_INPUTSEL_POSSEL_APORT4XCH7,
\r
390 acmpInputAPORT4YCH8 = _ACMP_INPUTSEL_POSSEL_APORT4YCH8,
\r
391 acmpInputAPORT4XCH9 = _ACMP_INPUTSEL_POSSEL_APORT4XCH9,
\r
392 acmpInputAPORT4YCH10 = _ACMP_INPUTSEL_POSSEL_APORT4YCH10,
\r
393 acmpInputAPORT4XCH11 = _ACMP_INPUTSEL_POSSEL_APORT4XCH11,
\r
394 acmpInputAPORT4YCH12 = _ACMP_INPUTSEL_POSSEL_APORT4YCH12,
\r
395 acmpInputAPORT4XCH13 = _ACMP_INPUTSEL_POSSEL_APORT4XCH13,
\r
396 acmpInputAPORT4YCH16 = _ACMP_INPUTSEL_POSSEL_APORT4YCH16,
\r
397 acmpInputAPORT4XCH17 = _ACMP_INPUTSEL_POSSEL_APORT4XCH17,
\r
398 acmpInputAPORT4YCH18 = _ACMP_INPUTSEL_POSSEL_APORT4YCH18,
\r
399 acmpInputAPORT4XCH19 = _ACMP_INPUTSEL_POSSEL_APORT4XCH19,
\r
400 acmpInputAPORT4YCH20 = _ACMP_INPUTSEL_POSSEL_APORT4YCH20,
\r
401 acmpInputAPORT4XCH21 = _ACMP_INPUTSEL_POSSEL_APORT4XCH21,
\r
402 acmpInputAPORT4YCH22 = _ACMP_INPUTSEL_POSSEL_APORT4YCH22,
\r
403 acmpInputAPORT4XCH23 = _ACMP_INPUTSEL_POSSEL_APORT4XCH23,
\r
404 acmpInputAPORT4YCH24 = _ACMP_INPUTSEL_POSSEL_APORT4YCH24,
\r
405 acmpInputAPORT4XCH25 = _ACMP_INPUTSEL_POSSEL_APORT4XCH25,
\r
406 acmpInputAPORT4YCH26 = _ACMP_INPUTSEL_POSSEL_APORT4YCH26,
\r
407 acmpInputAPORT4XCH27 = _ACMP_INPUTSEL_POSSEL_APORT4XCH27,
\r
408 acmpInputAPORT4YCH28 = _ACMP_INPUTSEL_POSSEL_APORT4YCH28,
\r
409 acmpInputAPORT4XCH29 = _ACMP_INPUTSEL_POSSEL_APORT4XCH29,
\r
410 acmpInputAPORT4YCH30 = _ACMP_INPUTSEL_POSSEL_APORT4YCH30,
\r
411 acmpInputAPORT4YCH14 = _ACMP_INPUTSEL_POSSEL_APORT4YCH14,
\r
412 acmpInputAPORT4XCH15 = _ACMP_INPUTSEL_POSSEL_APORT4XCH15,
\r
413 acmpInputAPORT4XCH31 = _ACMP_INPUTSEL_POSSEL_APORT4XCH31,
\r
414 acmpInputDACOUT0 = _ACMP_INPUTSEL_POSSEL_DACOUT0,
\r
415 acmpInputDACOUT1 = _ACMP_INPUTSEL_POSSEL_DACOUT1,
\r
416 acmpInputVLP = _ACMP_INPUTSEL_POSSEL_VLP,
\r
417 acmpInputVBDIV = _ACMP_INPUTSEL_POSSEL_VBDIV,
\r
418 acmpInputVADIV = _ACMP_INPUTSEL_POSSEL_VADIV,
\r
419 acmpInputVDD = _ACMP_INPUTSEL_POSSEL_VDD,
\r
420 acmpInputVSS = _ACMP_INPUTSEL_POSSEL_VSS,
\r
421 } ACMP_Channel_TypeDef;
\r
423 /** ACMP inputs. Note that scaled VDD and bandgap references can only be used
\r
424 * as negative inputs. */
\r
428 acmpChannel0 = _ACMP_INPUTSEL_NEGSEL_CH0,
\r
430 acmpChannel1 = _ACMP_INPUTSEL_NEGSEL_CH1,
\r
432 acmpChannel2 = _ACMP_INPUTSEL_NEGSEL_CH2,
\r
434 acmpChannel3 = _ACMP_INPUTSEL_NEGSEL_CH3,
\r
436 acmpChannel4 = _ACMP_INPUTSEL_NEGSEL_CH4,
\r
438 acmpChannel5 = _ACMP_INPUTSEL_NEGSEL_CH5,
\r
440 acmpChannel6 = _ACMP_INPUTSEL_NEGSEL_CH6,
\r
442 acmpChannel7 = _ACMP_INPUTSEL_NEGSEL_CH7,
\r
443 /** 1.25V internal reference */
\r
444 acmpChannel1V25 = _ACMP_INPUTSEL_NEGSEL_1V25,
\r
445 /** 2.5V internal reference */
\r
446 acmpChannel2V5 = _ACMP_INPUTSEL_NEGSEL_2V5,
\r
447 /** Scaled VDD reference */
\r
448 acmpChannelVDD = _ACMP_INPUTSEL_NEGSEL_VDD,
\r
450 #if defined(_ACMP_INPUTSEL_NEGSEL_DAC0CH0)
\r
451 /** DAC0 channel 0 */
\r
452 acmpChannelDAC0Ch0 = _ACMP_INPUTSEL_NEGSEL_DAC0CH0,
\r
455 #if defined(_ACMP_INPUTSEL_NEGSEL_DAC0CH1)
\r
456 /** DAC0 channel 1 */
\r
457 acmpChannelDAC0Ch1 = _ACMP_INPUTSEL_NEGSEL_DAC0CH1,
\r
460 #if defined(_ACMP_INPUTSEL_NEGSEL_CAPSENSE)
\r
461 /** Capacitive sense mode */
\r
462 acmpChannelCapSense = _ACMP_INPUTSEL_NEGSEL_CAPSENSE,
\r
464 } ACMP_Channel_TypeDef;
\r
467 /*******************************************************************************
\r
468 ****************************** STRUCTS ************************************
\r
469 ******************************************************************************/
\r
471 /** Capsense initialization structure. */
\r
474 /** Full bias current. See the ACMP chapter about bias and response time in
\r
475 * the reference manual for details. */
\r
478 #if defined(_ACMP_CTRL_HALFBIAS_MASK)
\r
479 /** Half bias current. See the ACMP chapter about bias and response time in
\r
480 * the reference manual for details. */
\r
484 /** Bias current. See the ACMP chapter about bias and response time in the
\r
485 * reference manual for details. */
\r
488 #if defined(_ACMP_CTRL_WARMTIME_MASK)
\r
489 /** Warmup time. This is measured in HFPERCLK cycles and should be
\r
490 * about 10us in wall clock time. */
\r
491 ACMP_WarmTime_TypeDef warmTime;
\r
494 #if defined(_ACMP_CTRL_HYSTSEL_MASK)
\r
495 /** Hysteresis level */
\r
496 ACMP_HysteresisLevel_TypeDef hysteresisLevel;
\r
498 /** Hysteresis level when ACMP output is 0 */
\r
499 ACMP_HysteresisLevel_TypeDef hysteresisLevel_0;
\r
501 /** Hysteresis level when ACMP output is 1 */
\r
502 ACMP_HysteresisLevel_TypeDef hysteresisLevel_1;
\r
505 /** Resistor used in the capacative sensing circuit. For values see
\r
506 * your device datasheet. */
\r
507 ACMP_CapsenseResistor_TypeDef resistor;
\r
509 #if defined(_ACMP_INPUTSEL_LPREF_MASK)
\r
510 /** Low power reference enabled. This setting, if enabled, reduces the
\r
511 * power used by the VDD and bandgap references. */
\r
512 bool lowPowerReferenceEnabled;
\r
515 #if defined(_ACMP_INPUTSEL_VDDLEVEL_MASK)
\r
516 /** Vdd reference value. VDD_SCALED = (Vdd * VDDLEVEL) / 63.
\r
517 * Valid values are in the range 0-63. */
\r
521 * This value configures the upper voltage threshold of the capsense
\r
522 * oscillation rail.
\r
524 * The voltage threshold is calculated as
\r
525 * Vdd * (vddLevelHigh + 1) / 64
\r
527 uint32_t vddLevelHigh;
\r
530 * This value configures the lower voltage threshold of the capsense
\r
531 * oscillation rail.
\r
533 * The voltage threshold is calculated as
\r
534 * Vdd * (vddLevelLow + 1) / 64
\r
536 uint32_t vddLevelLow;
\r
539 /** If true, ACMP is being enabled after configuration. */
\r
541 } ACMP_CapsenseInit_TypeDef;
\r
543 /** Default config for capacitive sense mode initialization. */
\r
544 #if defined(_ACMP_HYSTERESIS0_HYST_MASK)
\r
545 #define ACMP_CAPSENSE_INIT_DEFAULT \
\r
547 false, /* Don't use fullBias to lower power consumption */ \
\r
548 0x20, /* Using biasProg value of 0x20 (32) */ \
\r
549 acmpHysteresisLevel8, /* Use hysteresis level 8 when ACMP output is 0 */ \
\r
550 acmpHysteresisLevel8, /* Use hysteresis level 8 when ACMP output is 1 */ \
\r
551 acmpResistor5, /* Use internal resistor value 5 */ \
\r
552 0x30, /* VDD level high */ \
\r
553 0x10, /* VDD level low */ \
\r
554 true /* Enable after init. */ \
\r
556 #elif defined(_ACMP_CTRL_WARMTIME_MASK)
\r
557 #define ACMP_CAPSENSE_INIT_DEFAULT \
\r
559 false, /* fullBias */ \
\r
560 false, /* halfBias */ \
\r
561 0x7, /* biasProg */ \
\r
562 acmpWarmTime512, /* 512 cycle warmup to be safe */ \
\r
563 acmpHysteresisLevel5, \
\r
565 false, /* low power reference */ \
\r
566 0x3D, /* VDD level */ \
\r
567 true /* Enable after init. */ \
\r
570 #define ACMP_CAPSENSE_INIT_DEFAULT \
\r
572 false, /* fullBias */ \
\r
573 false, /* halfBias */ \
\r
574 0x7, /* biasProg */ \
\r
575 acmpHysteresisLevel5, \
\r
577 false, /* low power reference */ \
\r
578 0x3D, /* VDD level */ \
\r
579 true /* Enable after init. */ \
\r
583 /** ACMP initialization structure. */
\r
586 /** Full bias current. See the ACMP chapter about bias and response time in
\r
587 * the reference manual for details. */
\r
590 #if defined(_ACMP_CTRL_HALFBIAS_MASK)
\r
591 /** Half bias current. See the ACMP chapter about bias and response time in
\r
592 * the reference manual for details. */
\r
596 /** Bias current. See the ACMP chapter about bias and response time in the
\r
597 * reference manual for details. Valid values are in the range 0-7. */
\r
600 /** Enable setting the interrupt flag on falling edge */
\r
601 bool interruptOnFallingEdge;
\r
603 /** Enable setting the interrupt flag on rising edge */
\r
604 bool interruptOnRisingEdge;
\r
606 #if defined(_ACMP_CTRL_INPUTRANGE_MASK)
\r
607 /** Input range. Adjust this setting to optimize the performance for a
\r
608 * given input voltage range. */
\r
609 ACMP_InputRange_TypeDef inputRange;
\r
612 #if defined(_ACMP_CTRL_ACCURACY_MASK)
\r
613 /** ACMP accuracy mode. Select the accuracy mode that matches the
\r
614 * required current usage and accuracy requirement. Low accuracy
\r
615 * consumes less current while high accuracy consumes more current. */
\r
616 ACMP_Accuracy_TypeDef accuracy;
\r
619 #if defined(_ACMP_CTRL_PWRSEL_MASK)
\r
620 /** Select the power source for the ACMP. */
\r
621 ACMP_PowerSource_TypeDef powerSource;
\r
624 #if defined(_ACMP_CTRL_WARMTIME_MASK)
\r
625 /** Warmup time. This is measured in HFPERCLK cycles and should be
\r
626 * about 10us in wall clock time. */
\r
627 ACMP_WarmTime_TypeDef warmTime;
\r
630 #if defined(_ACMP_CTRL_HYSTSEL_MASK)
\r
631 /** Hysteresis level */
\r
632 ACMP_HysteresisLevel_TypeDef hysteresisLevel;
\r
634 /** Hysteresis when ACMP output is 0 */
\r
635 ACMP_HysteresisLevel_TypeDef hysteresisLevel_0;
\r
637 /** Hysteresis when ACMP output is 1 */
\r
638 ACMP_HysteresisLevel_TypeDef hysteresisLevel_1;
\r
641 #if defined(_ACMP_INPUTSEL_VLPSEL_MASK)
\r
642 /** VLP Input source. Select between using VADIV or VBDIV as the VLP
\r
644 ACMP_VLPInput_Typedef vlpInput;
\r
647 /** Inactive value emitted by the ACMP during warmup */
\r
648 bool inactiveValue;
\r
650 #if defined(_ACMP_INPUTSEL_LPREF_MASK)
\r
651 /** Low power reference enabled. This setting, if enabled, reduces the
\r
652 * power used by the VDD and bandgap references. */
\r
653 bool lowPowerReferenceEnabled;
\r
656 #if defined(_ACMP_INPUTSEL_VDDLEVEL_MASK)
\r
657 /** Vdd reference value. VDD_SCALED = VDD * VDDLEVEL * 50mV/3.8V.
\r
658 * Valid values are in the range 0-63. */
\r
662 /** If true, ACMP is being enabled after configuration. */
\r
664 } ACMP_Init_TypeDef;
\r
666 /** Default config for ACMP regular initialization. */
\r
667 #if defined(_ACMP_HYSTERESIS0_HYST_MASK)
\r
668 #define ACMP_INIT_DEFAULT \
\r
670 false, /* fullBias */ \
\r
671 0x7, /* biasProg */ \
\r
672 false, /* No interrupt on falling edge. */ \
\r
673 false, /* No interrupt on rising edge. */ \
\r
674 acmpInputRangeFull, /* Input range from 0 to Vdd. */ \
\r
675 acmpAccuracyLow, /* Low accuracy, less current usage. */ \
\r
676 acmpPowerSourceAvdd, /* Use the AVDD supply. */ \
\r
677 acmpHysteresisLevel5, /* Use hysteresis level 5 when output is 0 */ \
\r
678 acmpHysteresisLevel5, /* Use hysteresis level 5 when output is 1 */ \
\r
679 acmpVLPInputVADIV, /* Use VADIV as the VLP input source. */ \
\r
680 false, /* Output 0 when ACMP is inactive. */ \
\r
681 true /* Enable after init. */ \
\r
683 #elif defined(_ACMP_CTRL_WARMTIME_MASK)
\r
684 #define ACMP_INIT_DEFAULT \
\r
686 false, /* fullBias */ \
\r
687 false, /* halfBias */ \
\r
688 0x7, /* biasProg */ \
\r
689 false, /* No interrupt on falling edge. */ \
\r
690 false, /* No interrupt on rising edge. */ \
\r
691 acmpWarmTime512, /* 512 cycle warmup to be safe */ \
\r
692 acmpHysteresisLevel5, \
\r
693 false, /* Disabled emitting inactive value during warmup. */ \
\r
694 false, /* low power reference */ \
\r
695 0x3D, /* VDD level */ \
\r
696 true /* Enable after init. */ \
\r
699 #define ACMP_INIT_DEFAULT \
\r
701 false, /* fullBias */ \
\r
702 false, /* halfBias */ \
\r
703 0x7, /* biasProg */ \
\r
704 false, /* No interrupt on falling edge. */ \
\r
705 false, /* No interrupt on rising edge. */ \
\r
706 acmpHysteresisLevel5, \
\r
707 false, /* Disabled emitting inactive value during warmup. */ \
\r
708 false, /* low power reference */ \
\r
709 0x3D, /* VDD level */ \
\r
710 true /* Enable after init. */ \
\r
714 #if defined(_ACMP_INPUTSEL_VASEL_MASK)
\r
715 /** VA Configuration structure. This struct is used to configure the
\r
716 * VA voltage input source and it's dividers. */
\r
719 ACMP_VAInput_TypeDef input; /**< VA voltage input source */
\r
722 * Divider for VA voltage input source when ACMP output is 0. This value is
\r
723 * used to divide the VA voltage input source by a specific value. The valid
\r
724 * range is between 0 and 63.
\r
726 * VA divided = VA input * (div0 + 1) / 64
\r
731 * Divider for VA voltage input source when ACMP output is 1. This value is
\r
732 * used to divide the VA voltage input source by a specific value. The valid
\r
733 * range is between 0 and 63.
\r
735 * VA divided = VA input * (div1 + 1) / 64
\r
738 } ACMP_VAConfig_TypeDef;
\r
740 #define ACMP_VACONFIG_DEFAULT \
\r
742 acmpVAInputVDD, /* Use Vdd as VA voltage input source */ \
\r
743 63, /* No division of the VA source when ACMP output is 0 */ \
\r
744 63, /* No division of the VA source when ACMP output is 1 */ \
\r
748 #if defined(_ACMP_INPUTSEL_VBSEL_MASK)
\r
749 /** VB Configuration structure. This struct is used to configure the
\r
750 * VB voltage input source and it's dividers. */
\r
753 ACMP_VBInput_TypeDef input; /**< VB Voltage input source */
\r
756 * Divider for VB voltage input source when ACMP output is 0. This value is
\r
757 * used to divide the VB voltage input source by a specific value. The valid
\r
758 * range is between 0 and 63.
\r
760 * VB divided = VB input * (div0 + 1) / 64
\r
765 * Divider for VB voltage input source when ACMP output is 1. This value is
\r
766 * used to divide the VB voltage input source by a specific value. The valid
\r
767 * range is between 0 and 63.
\r
769 * VB divided = VB input * (div1 + 1) / 64
\r
772 } ACMP_VBConfig_TypeDef;
\r
774 #define ACMP_VBCONFIG_DEFAULT \
\r
776 acmpVBInput1V25, /* Use 1.25 V as VB voltage input source */ \
\r
777 63, /* No division of the VB source when ACMP output is 0 */ \
\r
778 63, /* No division of the VB source when ACMP output is 1 */ \
\r
782 /*******************************************************************************
\r
783 ***************************** PROTOTYPES **********************************
\r
784 ******************************************************************************/
\r
786 void ACMP_CapsenseInit(ACMP_TypeDef *acmp, const ACMP_CapsenseInit_TypeDef *init);
\r
787 void ACMP_CapsenseChannelSet(ACMP_TypeDef *acmp, ACMP_Channel_TypeDef channel);
\r
788 void ACMP_ChannelSet(ACMP_TypeDef *acmp, ACMP_Channel_TypeDef negSel, ACMP_Channel_TypeDef posSel);
\r
789 void ACMP_Disable(ACMP_TypeDef *acmp);
\r
790 void ACMP_Enable(ACMP_TypeDef *acmp);
\r
791 void ACMP_GPIOSetup(ACMP_TypeDef *acmp, uint32_t location, bool enable, bool invert);
\r
792 void ACMP_Init(ACMP_TypeDef *acmp, const ACMP_Init_TypeDef *init);
\r
793 void ACMP_Reset(ACMP_TypeDef *acmp);
\r
794 #if defined(_ACMP_INPUTSEL_VASEL_MASK)
\r
795 void ACMP_VASetup(ACMP_TypeDef *acmp, const ACMP_VAConfig_TypeDef *vaconfig);
\r
797 #if defined(_ACMP_INPUTSEL_VBSEL_MASK)
\r
798 void ACMP_VBSetup(ACMP_TypeDef *acmp, const ACMP_VBConfig_TypeDef *vbconfig);
\r
801 /***************************************************************************//**
\r
803 * Clear one or more pending ACMP interrupts.
\r
806 * Pointer to ACMP peripheral register block.
\r
809 * Pending ACMP interrupt source to clear. Use a bitwise logic OR combination
\r
810 * of valid interrupt flags for the ACMP module (ACMP_IF_nnn).
\r
811 ******************************************************************************/
\r
812 __STATIC_INLINE void ACMP_IntClear(ACMP_TypeDef *acmp, uint32_t flags)
\r
818 /***************************************************************************//**
\r
820 * Disable one or more ACMP interrupts.
\r
823 * Pointer to ACMP peripheral register block.
\r
826 * ACMP interrupt sources to disable. Use a bitwise logic OR combination of
\r
827 * valid interrupt flags for the ACMP module (ACMP_IF_nnn).
\r
828 ******************************************************************************/
\r
829 __STATIC_INLINE void ACMP_IntDisable(ACMP_TypeDef *acmp, uint32_t flags)
\r
831 acmp->IEN &= ~(flags);
\r
835 /***************************************************************************//**
\r
837 * Enable one or more ACMP interrupts.
\r
840 * Depending on the use, a pending interrupt may already be set prior to
\r
841 * enabling the interrupt. Consider using ACMP_IntClear() prior to enabling
\r
842 * if such a pending interrupt should be ignored.
\r
845 * Pointer to ACMP peripheral register block.
\r
848 * ACMP interrupt sources to enable. Use a bitwise logic OR combination of
\r
849 * valid interrupt flags for the ACMP module (ACMP_IF_nnn).
\r
850 ******************************************************************************/
\r
851 __STATIC_INLINE void ACMP_IntEnable(ACMP_TypeDef *acmp, uint32_t flags)
\r
853 acmp->IEN |= flags;
\r
857 /***************************************************************************//**
\r
859 * Get pending ACMP interrupt flags.
\r
862 * The event bits are not cleared by the use of this function.
\r
865 * Pointer to ACMP peripheral register block.
\r
868 * ACMP interrupt sources pending. A bitwise logic OR combination of valid
\r
869 * interrupt flags for the ACMP module (ACMP_IF_nnn).
\r
870 ******************************************************************************/
\r
871 __STATIC_INLINE uint32_t ACMP_IntGet(ACMP_TypeDef *acmp)
\r
877 /***************************************************************************//**
\r
879 * Get enabled and pending ACMP interrupt flags.
\r
880 * Useful for handling more interrupt sources in the same interrupt handler.
\r
883 * Pointer to ACMP peripheral register block.
\r
886 * Interrupt flags are not cleared by the use of this function.
\r
889 * Pending and enabled ACMP interrupt sources.
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890 * The return value is the bitwise AND combination of
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891 * - the OR combination of enabled interrupt sources in ACMPx_IEN_nnn
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892 * register (ACMPx_IEN_nnn) and
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893 * - the OR combination of valid interrupt flags of the ACMP module
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895 ******************************************************************************/
\r
896 __STATIC_INLINE uint32_t ACMP_IntGetEnabled(ACMP_TypeDef *acmp)
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900 /* Store ACMPx->IEN in temporary variable in order to define explicit order
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901 * of volatile accesses. */
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904 /* Bitwise AND of pending and enabled interrupts */
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905 return acmp->IF & tmp;
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909 /***************************************************************************//**
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911 * Set one or more pending ACMP interrupts from SW.
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914 * Pointer to ACMP peripheral register block.
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917 * ACMP interrupt sources to set to pending. Use a bitwise logic OR
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918 * combination of valid interrupt flags for the ACMP module (ACMP_IF_nnn).
\r
919 ******************************************************************************/
\r
920 __STATIC_INLINE void ACMP_IntSet(ACMP_TypeDef *acmp, uint32_t flags)
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925 /** @} (end addtogroup ACMP) */
\r
926 /** @} (end addtogroup EM_Library) */
\r
932 #endif /* defined(ACMP_COUNT) && (ACMP_COUNT > 0) */
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933 #endif /* __SILICON_LABS_EM_ACMP_H__ */
\r