1 /* Copyright 2018 SiFive, Inc */
2 /* SPDX-License-Identifier: Apache-2.0 */
4 #ifndef METAL__DRIVERS__RISCV_PLIC0_H
5 #define METAL__DRIVERS__RISCV_PLIC0_H
7 #include <metal/compiler.h>
8 #include <metal/drivers/riscv_cpu.h>
10 #define METAL_PLIC_SOURCE_MASK 0x1F
11 #define METAL_PLIC_SOURCE_SHIFT 5
12 #define METAL_PLIC_SOURCE_PRIORITY_SHIFT 2
13 #define METAL_PLIC_SOURCE_PENDING_SHIFT 0
15 struct __metal_driver_vtable_riscv_plic0 {
16 struct metal_interrupt_vtable plic_vtable;
19 __METAL_DECLARE_VTABLE(__metal_driver_vtable_riscv_plic0)
21 #define __METAL_MACHINE_MACROS
22 #include <metal/machine.h>
23 struct __metal_driver_riscv_plic0 {
24 struct metal_interrupt controller;
26 metal_interrupt_handler_t metal_exint_table[__METAL_PLIC_SUBINTERRUPTS];
27 __metal_interrupt_data metal_exdata_table[__METAL_PLIC_SUBINTERRUPTS];
29 #undef __METAL_MACHINE_MACROS