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   1 /******************************************************************************
   2 *
   3 * Copyright (C) 2011 - 2014 Xilinx, Inc.  All rights reserved.
   4 *
   5 * Permission is hereby granted, free of charge, to any person obtaining a copy
   6 * of this software and associated documentation files (the "Software"), to deal
   7 * in the Software without restriction, including without limitation the rights
   8 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
   9 * copies of the Software, and to permit persons to whom the Software is
  10 * furnished to do so, subject to the following conditions:
  11 *
  12 * The above copyright notice and this permission notice shall be included in
  13 * all copies or substantial portions of the Software.
  14 *
  15 * Use of the Software is limited solely to applications:
  16 * (a) running on a Xilinx device, or
  17 * (b) that interact with a Xilinx device through a bus or interconnect.
  18 *
  19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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  24 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  25 * SOFTWARE.
  26 *
  27 * Except as contained in this notice, the name of the Xilinx shall not be used
  28 * in advertising or otherwise to promote the sale, use or other dealings in
  29 * this Software without prior written authorization from Xilinx.
  30 *
  31 ******************************************************************************/
  32 /*****************************************************************************/
  33 /**
  34 *
  35 * @file xpm_counter.c
  36 *
  37 * This file contains APIs for configuring and controlling the Cortex-A9
  38 * Performance Monitor Events. For more information about the event counters,
  39 * see xpm_counter.h.
  40 *
  41 * <pre>
  42 * MODIFICATION HISTORY:
  43 *
  44 * Ver   Who  Date     Changes
  45 * ----- ---- -------- -----------------------------------------------
  46 * 1.00a sdm  07/11/11 First release
  47 * </pre>
  48 *
  49 ******************************************************************************/
  50
  51 /***************************** Include Files *********************************/
  52
  53 #include "xpm_counter.h"
  54
  55 /************************** Constant Definitions ****************************/
  56
  57 /**************************** Type Definitions ******************************/
  58
  59 typedef const u32 PmcrEventCfg[XPM_CTRCOUNT];
  60
  61 /***************** Macros (Inline Functions) Definitions ********************/
  62
  63 /************************** Variable Definitions *****************************/
  64
  65 static PmcrEventCfg PmcrEvents[] = {
  66         {
  67                 XPM_EVENT_SOFTINCR,
  68                 XPM_EVENT_INSRFETCH_CACHEREFILL,
  69                 XPM_EVENT_INSTRFECT_TLBREFILL,
  70                 XPM_EVENT_DATA_CACHEREFILL,
  71                 XPM_EVENT_DATA_CACHEACCESS,
  72                 XPM_EVENT_DATA_TLBREFILL
  73         },
  74         {
  75                 XPM_EVENT_DATA_READS,
  76                 XPM_EVENT_DATA_WRITE,
  77                 XPM_EVENT_EXCEPTION,
  78                 XPM_EVENT_EXCEPRETURN,
  79                 XPM_EVENT_CHANGECONTEXT,
  80                 XPM_EVENT_SW_CHANGEPC
  81         },
  82         {
  83                 XPM_EVENT_IMMEDBRANCH,
  84                 XPM_EVENT_UNALIGNEDACCESS,
  85                 XPM_EVENT_BRANCHMISS,
  86                 XPM_EVENT_CLOCKCYCLES,
  87                 XPM_EVENT_BRANCHPREDICT,
  88                 XPM_EVENT_JAVABYTECODE
  89         },
  90         {
  91                 XPM_EVENT_SWJAVABYTECODE,
  92                 XPM_EVENT_JAVABACKBRANCH,
  93                 XPM_EVENT_COHERLINEMISS,
  94                 XPM_EVENT_COHERLINEHIT,
  95                 XPM_EVENT_INSTRSTALL,
  96                 XPM_EVENT_DATASTALL
  97         },
  98         {
  99                 XPM_EVENT_MAINTLBSTALL,
 100                 XPM_EVENT_STREXPASS,
 101                 XPM_EVENT_STREXFAIL,
 102                 XPM_EVENT_DATAEVICT,
 103                 XPM_EVENT_NODISPATCH,
 104                 XPM_EVENT_ISSUEEMPTY
 105         },
 106         {
 107                 XPM_EVENT_INSTRRENAME,
 108                 XPM_EVENT_PREDICTFUNCRET,
 109                 XPM_EVENT_MAINEXEC,
 110                 XPM_EVENT_SECEXEC,
 111                 XPM_EVENT_LDRSTR,
 112                 XPM_EVENT_FLOATRENAME
 113         },
 114         {
 115                 XPM_EVENT_NEONRENAME,
 116                 XPM_EVENT_PLDSTALL,
 117                 XPM_EVENT_WRITESTALL,
 118                 XPM_EVENT_INSTRTLBSTALL,
 119                 XPM_EVENT_DATATLBSTALL,
 120                 XPM_EVENT_INSTR_uTLBSTALL
 121         },
 122         {
 123                 XPM_EVENT_DATA_uTLBSTALL,
 124                 XPM_EVENT_DMB_STALL,
 125                 XPM_EVENT_INT_CLKEN,
 126                 XPM_EVENT_DE_CLKEN,
 127                 XPM_EVENT_INSTRISB,
 128                 XPM_EVENT_INSTRDSB
 129         },
 130         {
 131                 XPM_EVENT_INSTRDMB,
 132                 XPM_EVENT_EXTINT,
 133                 XPM_EVENT_PLE_LRC,
 134                 XPM_EVENT_PLE_LRS,
 135                 XPM_EVENT_PLE_FLUSH,
 136                 XPM_EVENT_PLE_CMPL
 137         },
 138         {
 139                 XPM_EVENT_PLE_OVFL,
 140                 XPM_EVENT_PLE_PROG,
 141                 XPM_EVENT_PLE_LRC,
 142                 XPM_EVENT_PLE_LRS,
 143                 XPM_EVENT_PLE_FLUSH,
 144                 XPM_EVENT_PLE_CMPL
 145         },
 146         {
 147                 XPM_EVENT_DATASTALL,
 148                 XPM_EVENT_INSRFETCH_CACHEREFILL,
 149                 XPM_EVENT_INSTRFECT_TLBREFILL,
 150                 XPM_EVENT_DATA_CACHEREFILL,
 151                 XPM_EVENT_DATA_CACHEACCESS,
 152                 XPM_EVENT_DATA_TLBREFILL
 153         },
 154 };
 155
 156 /************************** Function Prototypes ******************************/
 157
 158 void Xpm_DisableEventCounters(void);
 159 void Xpm_EnableEventCounters (void);
 160 void Xpm_ResetEventCounters (void);
 161
 162 /******************************************************************************/
 163
 164 /****************************************************************************/
 165 /**
 166 *
 167 * This function disables the Cortex A9 event counters.
 168 *
 169 * @param        None.
 170 *
 171 * @return       None.
 172 *
 173 * @note         None.
 174 *
 175 *****************************************************************************/
 176 void Xpm_DisableEventCounters(void)
 177 {
 178         /* Disable the event counters */
 179         mtcp(XREG_CP15_COUNT_ENABLE_CLR, 0x3f);
 180 }
 181
 182 /****************************************************************************/
 183 /**
 184 *
 185 * This function enables the Cortex A9 event counters.
 186 *
 187 * @param        None.
 188 *
 189 * @return       None.
 190 *
 191 * @note         None.
 192 *
 193 *****************************************************************************/
 194 void Xpm_EnableEventCounters(void)
 195 {
 196         /* Enable the event counters */
 197         mtcp(XREG_CP15_COUNT_ENABLE_SET, 0x3f);
 198 }
 199
 200 /****************************************************************************/
 201 /**
 202 *
 203 * This function resets the Cortex A9 event counters.
 204 *
 205 * @param        None.
 206 *
 207 * @return       None.
 208 *
 209 * @note         None.
 210 *
 211 *****************************************************************************/
 212 void Xpm_ResetEventCounters(void)
 213 {
 214         u32 Reg;
 215
 216 #ifdef __GNUC__
 217         Reg = mfcp(XREG_CP15_PERF_MONITOR_CTRL);
 218 #else
 219         { register unsigned int C15Reg __asm(XREG_CP15_PERF_MONITOR_CTRL);
 220           Reg = C15Reg; }
 221 #endif
 222         Reg |= (1 << 2); /* reset event counters */
 223         mtcp(XREG_CP15_PERF_MONITOR_CTRL, Reg);
 224 }
 225
 226 /****************************************************************************/
 227 /**
 228 *
 229 * This function configures the Cortex A9 event counters controller, with the
 230 * event codes, in a configuration selected by the user and enables the counters.
 231 *
 232 * @param        PmcrCfg is configuration value based on which the event counters
 233 *               are configured.
 234 *               Use XPM_CNTRCFG* values defined in xpm_counter.h.
 235 *
 236 * @return       None.
 237 *
 238 * @note         None.
 239 *
 240 *****************************************************************************/
 241 void Xpm_SetEvents(int PmcrCfg)
 242 {
 243         u32 Counter;
 244         const u32 *Ptr = PmcrEvents[PmcrCfg];
 245
 246         Xpm_DisableEventCounters();
 247
 248         for(Counter = 0; Counter < XPM_CTRCOUNT; Counter++) {
 249
 250                 /* Selecet event counter */
 251                 mtcp(XREG_CP15_EVENT_CNTR_SEL, Counter);
 252
 253                 /* Set the event */
 254                 mtcp(XREG_CP15_EVENT_TYPE_SEL, Ptr[Counter]);
 255         }
 256
 257         Xpm_ResetEventCounters();
 258         Xpm_EnableEventCounters();
 259 }
 260
 261 /****************************************************************************/
 262 /**
 263 *
 264 * This function disables the event counters and returns the counter values.
 265 *
 266 * @param        PmCtrValue is a pointer to an array of type u32 PmCtrValue[6].
 267 *               It is an output parameter which is used to return the PM
 268 *               counter values.
 269 *
 270 * @return       None.
 271 *
 272 * @note         None.
 273 *
 274 *****************************************************************************/
 275 void Xpm_GetEventCounters(u32 *PmCtrValue)
 276 {
 277         u32 Counter;
 278
 279         Xpm_DisableEventCounters();
 280
 281         for(Counter = 0; Counter < XPM_CTRCOUNT; Counter++) {
 282
 283                 mtcp(XREG_CP15_EVENT_CNTR_SEL, Counter);
 284 #ifdef __GNUC__
 285                 PmCtrValue[Counter] = mfcp(XREG_CP15_PERF_MONITOR_COUNT);
 286 #else
 287                 { register unsigned int Cp15Reg __asm(XREG_CP15_PERF_MONITOR_COUNT);
 288                   PmCtrValue[Counter] = Cp15Reg; }
 289 #endif
 290         }
 291 }