1 /**************************************************************************//**
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2 * @file efm32gg_leuart.h
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3 * @brief EFM32GG_LEUART register and bit field definitions
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5 ******************************************************************************
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7 * <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
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8 ******************************************************************************
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10 * Permission is granted to anyone to use this software for any purpose,
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11 * including commercial applications, and to alter it and redistribute it
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12 * freely, subject to the following restrictions:
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14 * 1. The origin of this software must not be misrepresented; you must not
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15 * claim that you wrote the original software.@n
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16 * 2. Altered source versions must be plainly marked as such, and must not be
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17 * misrepresented as being the original software.@n
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18 * 3. This notice may not be removed or altered from any source distribution.
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20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc.
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21 * has no obligation to support this Software. Silicon Laboratories, Inc. is
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22 * providing the Software "AS IS", with no express or implied warranties of any
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23 * kind, including, but not limited to, any implied warranties of
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24 * merchantability or fitness for any particular purpose or warranties against
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25 * infringement of any proprietary rights of a third party.
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27 * Silicon Laboratories, Inc. will not be liable for any consequential,
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28 * incidental, or special damages, or any other relief, or for any claim by
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29 * any third party, arising from your use of this Software.
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31 *****************************************************************************/
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32 /**************************************************************************//**
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35 ******************************************************************************/
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36 /**************************************************************************//**
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37 * @defgroup EFM32GG_LEUART
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39 * @brief EFM32GG_LEUART Register Declaration
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40 *****************************************************************************/
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43 __IO uint32_t CTRL; /**< Control Register */
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44 __IO uint32_t CMD; /**< Command Register */
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45 __I uint32_t STATUS; /**< Status Register */
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46 __IO uint32_t CLKDIV; /**< Clock Control Register */
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47 __IO uint32_t STARTFRAME; /**< Start Frame Register */
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48 __IO uint32_t SIGFRAME; /**< Signal Frame Register */
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49 __I uint32_t RXDATAX; /**< Receive Buffer Data Extended Register */
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50 __I uint32_t RXDATA; /**< Receive Buffer Data Register */
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51 __I uint32_t RXDATAXP; /**< Receive Buffer Data Extended Peek Register */
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52 __IO uint32_t TXDATAX; /**< Transmit Buffer Data Extended Register */
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53 __IO uint32_t TXDATA; /**< Transmit Buffer Data Register */
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54 __I uint32_t IF; /**< Interrupt Flag Register */
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55 __IO uint32_t IFS; /**< Interrupt Flag Set Register */
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56 __IO uint32_t IFC; /**< Interrupt Flag Clear Register */
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57 __IO uint32_t IEN; /**< Interrupt Enable Register */
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58 __IO uint32_t PULSECTRL; /**< Pulse Control Register */
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60 __IO uint32_t FREEZE; /**< Freeze Register */
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61 __I uint32_t SYNCBUSY; /**< Synchronization Busy Register */
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63 uint32_t RESERVED0[3]; /**< Reserved for future use **/
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64 __IO uint32_t ROUTE; /**< I/O Routing Register */
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65 uint32_t RESERVED1[21]; /**< Reserved for future use **/
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66 __IO uint32_t INPUT; /**< LEUART Input Register */
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67 } LEUART_TypeDef; /** @} */
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69 /**************************************************************************//**
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70 * @defgroup EFM32GG_LEUART_BitFields
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72 *****************************************************************************/
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74 /* Bit fields for LEUART CTRL */
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75 #define _LEUART_CTRL_RESETVALUE 0x00000000UL /**< Default value for LEUART_CTRL */
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76 #define _LEUART_CTRL_MASK 0x0000FFFFUL /**< Mask for LEUART_CTRL */
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77 #define LEUART_CTRL_AUTOTRI (0x1UL << 0) /**< Automatic Transmitter Tristate */
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78 #define _LEUART_CTRL_AUTOTRI_SHIFT 0 /**< Shift value for LEUART_AUTOTRI */
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79 #define _LEUART_CTRL_AUTOTRI_MASK 0x1UL /**< Bit mask for LEUART_AUTOTRI */
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80 #define _LEUART_CTRL_AUTOTRI_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
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81 #define LEUART_CTRL_AUTOTRI_DEFAULT (_LEUART_CTRL_AUTOTRI_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_CTRL */
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82 #define LEUART_CTRL_DATABITS (0x1UL << 1) /**< Data-Bit Mode */
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83 #define _LEUART_CTRL_DATABITS_SHIFT 1 /**< Shift value for LEUART_DATABITS */
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84 #define _LEUART_CTRL_DATABITS_MASK 0x2UL /**< Bit mask for LEUART_DATABITS */
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85 #define _LEUART_CTRL_DATABITS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
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86 #define _LEUART_CTRL_DATABITS_EIGHT 0x00000000UL /**< Mode EIGHT for LEUART_CTRL */
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87 #define _LEUART_CTRL_DATABITS_NINE 0x00000001UL /**< Mode NINE for LEUART_CTRL */
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88 #define LEUART_CTRL_DATABITS_DEFAULT (_LEUART_CTRL_DATABITS_DEFAULT << 1) /**< Shifted mode DEFAULT for LEUART_CTRL */
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89 #define LEUART_CTRL_DATABITS_EIGHT (_LEUART_CTRL_DATABITS_EIGHT << 1) /**< Shifted mode EIGHT for LEUART_CTRL */
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90 #define LEUART_CTRL_DATABITS_NINE (_LEUART_CTRL_DATABITS_NINE << 1) /**< Shifted mode NINE for LEUART_CTRL */
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91 #define _LEUART_CTRL_PARITY_SHIFT 2 /**< Shift value for LEUART_PARITY */
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92 #define _LEUART_CTRL_PARITY_MASK 0xCUL /**< Bit mask for LEUART_PARITY */
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93 #define _LEUART_CTRL_PARITY_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
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94 #define _LEUART_CTRL_PARITY_NONE 0x00000000UL /**< Mode NONE for LEUART_CTRL */
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95 #define _LEUART_CTRL_PARITY_EVEN 0x00000002UL /**< Mode EVEN for LEUART_CTRL */
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96 #define _LEUART_CTRL_PARITY_ODD 0x00000003UL /**< Mode ODD for LEUART_CTRL */
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97 #define LEUART_CTRL_PARITY_DEFAULT (_LEUART_CTRL_PARITY_DEFAULT << 2) /**< Shifted mode DEFAULT for LEUART_CTRL */
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98 #define LEUART_CTRL_PARITY_NONE (_LEUART_CTRL_PARITY_NONE << 2) /**< Shifted mode NONE for LEUART_CTRL */
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99 #define LEUART_CTRL_PARITY_EVEN (_LEUART_CTRL_PARITY_EVEN << 2) /**< Shifted mode EVEN for LEUART_CTRL */
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100 #define LEUART_CTRL_PARITY_ODD (_LEUART_CTRL_PARITY_ODD << 2) /**< Shifted mode ODD for LEUART_CTRL */
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101 #define LEUART_CTRL_STOPBITS (0x1UL << 4) /**< Stop-Bit Mode */
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102 #define _LEUART_CTRL_STOPBITS_SHIFT 4 /**< Shift value for LEUART_STOPBITS */
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103 #define _LEUART_CTRL_STOPBITS_MASK 0x10UL /**< Bit mask for LEUART_STOPBITS */
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104 #define _LEUART_CTRL_STOPBITS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
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105 #define _LEUART_CTRL_STOPBITS_ONE 0x00000000UL /**< Mode ONE for LEUART_CTRL */
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106 #define _LEUART_CTRL_STOPBITS_TWO 0x00000001UL /**< Mode TWO for LEUART_CTRL */
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107 #define LEUART_CTRL_STOPBITS_DEFAULT (_LEUART_CTRL_STOPBITS_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_CTRL */
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108 #define LEUART_CTRL_STOPBITS_ONE (_LEUART_CTRL_STOPBITS_ONE << 4) /**< Shifted mode ONE for LEUART_CTRL */
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109 #define LEUART_CTRL_STOPBITS_TWO (_LEUART_CTRL_STOPBITS_TWO << 4) /**< Shifted mode TWO for LEUART_CTRL */
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110 #define LEUART_CTRL_INV (0x1UL << 5) /**< Invert Input And Output */
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111 #define _LEUART_CTRL_INV_SHIFT 5 /**< Shift value for LEUART_INV */
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112 #define _LEUART_CTRL_INV_MASK 0x20UL /**< Bit mask for LEUART_INV */
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113 #define _LEUART_CTRL_INV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
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114 #define LEUART_CTRL_INV_DEFAULT (_LEUART_CTRL_INV_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_CTRL */
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115 #define LEUART_CTRL_ERRSDMA (0x1UL << 6) /**< Clear RX DMA On Error */
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116 #define _LEUART_CTRL_ERRSDMA_SHIFT 6 /**< Shift value for LEUART_ERRSDMA */
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117 #define _LEUART_CTRL_ERRSDMA_MASK 0x40UL /**< Bit mask for LEUART_ERRSDMA */
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118 #define _LEUART_CTRL_ERRSDMA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
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119 #define LEUART_CTRL_ERRSDMA_DEFAULT (_LEUART_CTRL_ERRSDMA_DEFAULT << 6) /**< Shifted mode DEFAULT for LEUART_CTRL */
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120 #define LEUART_CTRL_LOOPBK (0x1UL << 7) /**< Loopback Enable */
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121 #define _LEUART_CTRL_LOOPBK_SHIFT 7 /**< Shift value for LEUART_LOOPBK */
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122 #define _LEUART_CTRL_LOOPBK_MASK 0x80UL /**< Bit mask for LEUART_LOOPBK */
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123 #define _LEUART_CTRL_LOOPBK_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
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124 #define LEUART_CTRL_LOOPBK_DEFAULT (_LEUART_CTRL_LOOPBK_DEFAULT << 7) /**< Shifted mode DEFAULT for LEUART_CTRL */
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125 #define LEUART_CTRL_SFUBRX (0x1UL << 8) /**< Start-Frame UnBlock RX */
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126 #define _LEUART_CTRL_SFUBRX_SHIFT 8 /**< Shift value for LEUART_SFUBRX */
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127 #define _LEUART_CTRL_SFUBRX_MASK 0x100UL /**< Bit mask for LEUART_SFUBRX */
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128 #define _LEUART_CTRL_SFUBRX_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
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129 #define LEUART_CTRL_SFUBRX_DEFAULT (_LEUART_CTRL_SFUBRX_DEFAULT << 8) /**< Shifted mode DEFAULT for LEUART_CTRL */
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130 #define LEUART_CTRL_MPM (0x1UL << 9) /**< Multi-Processor Mode */
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131 #define _LEUART_CTRL_MPM_SHIFT 9 /**< Shift value for LEUART_MPM */
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132 #define _LEUART_CTRL_MPM_MASK 0x200UL /**< Bit mask for LEUART_MPM */
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133 #define _LEUART_CTRL_MPM_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
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134 #define LEUART_CTRL_MPM_DEFAULT (_LEUART_CTRL_MPM_DEFAULT << 9) /**< Shifted mode DEFAULT for LEUART_CTRL */
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135 #define LEUART_CTRL_MPAB (0x1UL << 10) /**< Multi-Processor Address-Bit */
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136 #define _LEUART_CTRL_MPAB_SHIFT 10 /**< Shift value for LEUART_MPAB */
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137 #define _LEUART_CTRL_MPAB_MASK 0x400UL /**< Bit mask for LEUART_MPAB */
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138 #define _LEUART_CTRL_MPAB_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
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139 #define LEUART_CTRL_MPAB_DEFAULT (_LEUART_CTRL_MPAB_DEFAULT << 10) /**< Shifted mode DEFAULT for LEUART_CTRL */
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140 #define LEUART_CTRL_BIT8DV (0x1UL << 11) /**< Bit 8 Default Value */
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141 #define _LEUART_CTRL_BIT8DV_SHIFT 11 /**< Shift value for LEUART_BIT8DV */
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142 #define _LEUART_CTRL_BIT8DV_MASK 0x800UL /**< Bit mask for LEUART_BIT8DV */
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143 #define _LEUART_CTRL_BIT8DV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
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144 #define LEUART_CTRL_BIT8DV_DEFAULT (_LEUART_CTRL_BIT8DV_DEFAULT << 11) /**< Shifted mode DEFAULT for LEUART_CTRL */
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145 #define LEUART_CTRL_RXDMAWU (0x1UL << 12) /**< RX DMA Wakeup */
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146 #define _LEUART_CTRL_RXDMAWU_SHIFT 12 /**< Shift value for LEUART_RXDMAWU */
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147 #define _LEUART_CTRL_RXDMAWU_MASK 0x1000UL /**< Bit mask for LEUART_RXDMAWU */
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148 #define _LEUART_CTRL_RXDMAWU_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
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149 #define LEUART_CTRL_RXDMAWU_DEFAULT (_LEUART_CTRL_RXDMAWU_DEFAULT << 12) /**< Shifted mode DEFAULT for LEUART_CTRL */
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150 #define LEUART_CTRL_TXDMAWU (0x1UL << 13) /**< TX DMA Wakeup */
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151 #define _LEUART_CTRL_TXDMAWU_SHIFT 13 /**< Shift value for LEUART_TXDMAWU */
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152 #define _LEUART_CTRL_TXDMAWU_MASK 0x2000UL /**< Bit mask for LEUART_TXDMAWU */
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153 #define _LEUART_CTRL_TXDMAWU_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
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154 #define LEUART_CTRL_TXDMAWU_DEFAULT (_LEUART_CTRL_TXDMAWU_DEFAULT << 13) /**< Shifted mode DEFAULT for LEUART_CTRL */
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155 #define _LEUART_CTRL_TXDELAY_SHIFT 14 /**< Shift value for LEUART_TXDELAY */
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156 #define _LEUART_CTRL_TXDELAY_MASK 0xC000UL /**< Bit mask for LEUART_TXDELAY */
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157 #define _LEUART_CTRL_TXDELAY_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
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158 #define _LEUART_CTRL_TXDELAY_NONE 0x00000000UL /**< Mode NONE for LEUART_CTRL */
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159 #define _LEUART_CTRL_TXDELAY_SINGLE 0x00000001UL /**< Mode SINGLE for LEUART_CTRL */
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160 #define _LEUART_CTRL_TXDELAY_DOUBLE 0x00000002UL /**< Mode DOUBLE for LEUART_CTRL */
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161 #define _LEUART_CTRL_TXDELAY_TRIPLE 0x00000003UL /**< Mode TRIPLE for LEUART_CTRL */
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162 #define LEUART_CTRL_TXDELAY_DEFAULT (_LEUART_CTRL_TXDELAY_DEFAULT << 14) /**< Shifted mode DEFAULT for LEUART_CTRL */
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163 #define LEUART_CTRL_TXDELAY_NONE (_LEUART_CTRL_TXDELAY_NONE << 14) /**< Shifted mode NONE for LEUART_CTRL */
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164 #define LEUART_CTRL_TXDELAY_SINGLE (_LEUART_CTRL_TXDELAY_SINGLE << 14) /**< Shifted mode SINGLE for LEUART_CTRL */
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165 #define LEUART_CTRL_TXDELAY_DOUBLE (_LEUART_CTRL_TXDELAY_DOUBLE << 14) /**< Shifted mode DOUBLE for LEUART_CTRL */
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166 #define LEUART_CTRL_TXDELAY_TRIPLE (_LEUART_CTRL_TXDELAY_TRIPLE << 14) /**< Shifted mode TRIPLE for LEUART_CTRL */
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168 /* Bit fields for LEUART CMD */
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169 #define _LEUART_CMD_RESETVALUE 0x00000000UL /**< Default value for LEUART_CMD */
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170 #define _LEUART_CMD_MASK 0x000000FFUL /**< Mask for LEUART_CMD */
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171 #define LEUART_CMD_RXEN (0x1UL << 0) /**< Receiver Enable */
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172 #define _LEUART_CMD_RXEN_SHIFT 0 /**< Shift value for LEUART_RXEN */
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173 #define _LEUART_CMD_RXEN_MASK 0x1UL /**< Bit mask for LEUART_RXEN */
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174 #define _LEUART_CMD_RXEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
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175 #define LEUART_CMD_RXEN_DEFAULT (_LEUART_CMD_RXEN_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_CMD */
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176 #define LEUART_CMD_RXDIS (0x1UL << 1) /**< Receiver Disable */
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177 #define _LEUART_CMD_RXDIS_SHIFT 1 /**< Shift value for LEUART_RXDIS */
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178 #define _LEUART_CMD_RXDIS_MASK 0x2UL /**< Bit mask for LEUART_RXDIS */
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179 #define _LEUART_CMD_RXDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
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180 #define LEUART_CMD_RXDIS_DEFAULT (_LEUART_CMD_RXDIS_DEFAULT << 1) /**< Shifted mode DEFAULT for LEUART_CMD */
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181 #define LEUART_CMD_TXEN (0x1UL << 2) /**< Transmitter Enable */
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182 #define _LEUART_CMD_TXEN_SHIFT 2 /**< Shift value for LEUART_TXEN */
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183 #define _LEUART_CMD_TXEN_MASK 0x4UL /**< Bit mask for LEUART_TXEN */
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184 #define _LEUART_CMD_TXEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
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185 #define LEUART_CMD_TXEN_DEFAULT (_LEUART_CMD_TXEN_DEFAULT << 2) /**< Shifted mode DEFAULT for LEUART_CMD */
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186 #define LEUART_CMD_TXDIS (0x1UL << 3) /**< Transmitter Disable */
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187 #define _LEUART_CMD_TXDIS_SHIFT 3 /**< Shift value for LEUART_TXDIS */
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188 #define _LEUART_CMD_TXDIS_MASK 0x8UL /**< Bit mask for LEUART_TXDIS */
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189 #define _LEUART_CMD_TXDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
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190 #define LEUART_CMD_TXDIS_DEFAULT (_LEUART_CMD_TXDIS_DEFAULT << 3) /**< Shifted mode DEFAULT for LEUART_CMD */
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191 #define LEUART_CMD_RXBLOCKEN (0x1UL << 4) /**< Receiver Block Enable */
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192 #define _LEUART_CMD_RXBLOCKEN_SHIFT 4 /**< Shift value for LEUART_RXBLOCKEN */
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193 #define _LEUART_CMD_RXBLOCKEN_MASK 0x10UL /**< Bit mask for LEUART_RXBLOCKEN */
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194 #define _LEUART_CMD_RXBLOCKEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
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195 #define LEUART_CMD_RXBLOCKEN_DEFAULT (_LEUART_CMD_RXBLOCKEN_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_CMD */
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196 #define LEUART_CMD_RXBLOCKDIS (0x1UL << 5) /**< Receiver Block Disable */
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197 #define _LEUART_CMD_RXBLOCKDIS_SHIFT 5 /**< Shift value for LEUART_RXBLOCKDIS */
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198 #define _LEUART_CMD_RXBLOCKDIS_MASK 0x20UL /**< Bit mask for LEUART_RXBLOCKDIS */
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199 #define _LEUART_CMD_RXBLOCKDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
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200 #define LEUART_CMD_RXBLOCKDIS_DEFAULT (_LEUART_CMD_RXBLOCKDIS_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_CMD */
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201 #define LEUART_CMD_CLEARTX (0x1UL << 6) /**< Clear TX */
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202 #define _LEUART_CMD_CLEARTX_SHIFT 6 /**< Shift value for LEUART_CLEARTX */
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203 #define _LEUART_CMD_CLEARTX_MASK 0x40UL /**< Bit mask for LEUART_CLEARTX */
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204 #define _LEUART_CMD_CLEARTX_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
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205 #define LEUART_CMD_CLEARTX_DEFAULT (_LEUART_CMD_CLEARTX_DEFAULT << 6) /**< Shifted mode DEFAULT for LEUART_CMD */
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206 #define LEUART_CMD_CLEARRX (0x1UL << 7) /**< Clear RX */
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207 #define _LEUART_CMD_CLEARRX_SHIFT 7 /**< Shift value for LEUART_CLEARRX */
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208 #define _LEUART_CMD_CLEARRX_MASK 0x80UL /**< Bit mask for LEUART_CLEARRX */
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209 #define _LEUART_CMD_CLEARRX_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
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210 #define LEUART_CMD_CLEARRX_DEFAULT (_LEUART_CMD_CLEARRX_DEFAULT << 7) /**< Shifted mode DEFAULT for LEUART_CMD */
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212 /* Bit fields for LEUART STATUS */
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213 #define _LEUART_STATUS_RESETVALUE 0x00000010UL /**< Default value for LEUART_STATUS */
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214 #define _LEUART_STATUS_MASK 0x0000003FUL /**< Mask for LEUART_STATUS */
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215 #define LEUART_STATUS_RXENS (0x1UL << 0) /**< Receiver Enable Status */
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216 #define _LEUART_STATUS_RXENS_SHIFT 0 /**< Shift value for LEUART_RXENS */
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217 #define _LEUART_STATUS_RXENS_MASK 0x1UL /**< Bit mask for LEUART_RXENS */
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218 #define _LEUART_STATUS_RXENS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_STATUS */
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219 #define LEUART_STATUS_RXENS_DEFAULT (_LEUART_STATUS_RXENS_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_STATUS */
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220 #define LEUART_STATUS_TXENS (0x1UL << 1) /**< Transmitter Enable Status */
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221 #define _LEUART_STATUS_TXENS_SHIFT 1 /**< Shift value for LEUART_TXENS */
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222 #define _LEUART_STATUS_TXENS_MASK 0x2UL /**< Bit mask for LEUART_TXENS */
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223 #define _LEUART_STATUS_TXENS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_STATUS */
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224 #define LEUART_STATUS_TXENS_DEFAULT (_LEUART_STATUS_TXENS_DEFAULT << 1) /**< Shifted mode DEFAULT for LEUART_STATUS */
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225 #define LEUART_STATUS_RXBLOCK (0x1UL << 2) /**< Block Incoming Data */
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226 #define _LEUART_STATUS_RXBLOCK_SHIFT 2 /**< Shift value for LEUART_RXBLOCK */
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227 #define _LEUART_STATUS_RXBLOCK_MASK 0x4UL /**< Bit mask for LEUART_RXBLOCK */
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228 #define _LEUART_STATUS_RXBLOCK_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_STATUS */
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229 #define LEUART_STATUS_RXBLOCK_DEFAULT (_LEUART_STATUS_RXBLOCK_DEFAULT << 2) /**< Shifted mode DEFAULT for LEUART_STATUS */
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230 #define LEUART_STATUS_TXC (0x1UL << 3) /**< TX Complete */
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231 #define _LEUART_STATUS_TXC_SHIFT 3 /**< Shift value for LEUART_TXC */
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232 #define _LEUART_STATUS_TXC_MASK 0x8UL /**< Bit mask for LEUART_TXC */
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233 #define _LEUART_STATUS_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_STATUS */
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234 #define LEUART_STATUS_TXC_DEFAULT (_LEUART_STATUS_TXC_DEFAULT << 3) /**< Shifted mode DEFAULT for LEUART_STATUS */
\r
235 #define LEUART_STATUS_TXBL (0x1UL << 4) /**< TX Buffer Level */
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236 #define _LEUART_STATUS_TXBL_SHIFT 4 /**< Shift value for LEUART_TXBL */
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237 #define _LEUART_STATUS_TXBL_MASK 0x10UL /**< Bit mask for LEUART_TXBL */
\r
238 #define _LEUART_STATUS_TXBL_DEFAULT 0x00000001UL /**< Mode DEFAULT for LEUART_STATUS */
\r
239 #define LEUART_STATUS_TXBL_DEFAULT (_LEUART_STATUS_TXBL_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_STATUS */
\r
240 #define LEUART_STATUS_RXDATAV (0x1UL << 5) /**< RX Data Valid */
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241 #define _LEUART_STATUS_RXDATAV_SHIFT 5 /**< Shift value for LEUART_RXDATAV */
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242 #define _LEUART_STATUS_RXDATAV_MASK 0x20UL /**< Bit mask for LEUART_RXDATAV */
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243 #define _LEUART_STATUS_RXDATAV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_STATUS */
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244 #define LEUART_STATUS_RXDATAV_DEFAULT (_LEUART_STATUS_RXDATAV_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_STATUS */
\r
246 /* Bit fields for LEUART CLKDIV */
\r
247 #define _LEUART_CLKDIV_RESETVALUE 0x00000000UL /**< Default value for LEUART_CLKDIV */
\r
248 #define _LEUART_CLKDIV_MASK 0x00007FF8UL /**< Mask for LEUART_CLKDIV */
\r
249 #define _LEUART_CLKDIV_DIV_SHIFT 3 /**< Shift value for LEUART_DIV */
\r
250 #define _LEUART_CLKDIV_DIV_MASK 0x7FF8UL /**< Bit mask for LEUART_DIV */
\r
251 #define _LEUART_CLKDIV_DIV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CLKDIV */
\r
252 #define LEUART_CLKDIV_DIV_DEFAULT (_LEUART_CLKDIV_DIV_DEFAULT << 3) /**< Shifted mode DEFAULT for LEUART_CLKDIV */
\r
254 /* Bit fields for LEUART STARTFRAME */
\r
255 #define _LEUART_STARTFRAME_RESETVALUE 0x00000000UL /**< Default value for LEUART_STARTFRAME */
\r
256 #define _LEUART_STARTFRAME_MASK 0x000001FFUL /**< Mask for LEUART_STARTFRAME */
\r
257 #define _LEUART_STARTFRAME_STARTFRAME_SHIFT 0 /**< Shift value for LEUART_STARTFRAME */
\r
258 #define _LEUART_STARTFRAME_STARTFRAME_MASK 0x1FFUL /**< Bit mask for LEUART_STARTFRAME */
\r
259 #define _LEUART_STARTFRAME_STARTFRAME_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_STARTFRAME */
\r
260 #define LEUART_STARTFRAME_STARTFRAME_DEFAULT (_LEUART_STARTFRAME_STARTFRAME_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_STARTFRAME */
\r
262 /* Bit fields for LEUART SIGFRAME */
\r
263 #define _LEUART_SIGFRAME_RESETVALUE 0x00000000UL /**< Default value for LEUART_SIGFRAME */
\r
264 #define _LEUART_SIGFRAME_MASK 0x000001FFUL /**< Mask for LEUART_SIGFRAME */
\r
265 #define _LEUART_SIGFRAME_SIGFRAME_SHIFT 0 /**< Shift value for LEUART_SIGFRAME */
\r
266 #define _LEUART_SIGFRAME_SIGFRAME_MASK 0x1FFUL /**< Bit mask for LEUART_SIGFRAME */
\r
267 #define _LEUART_SIGFRAME_SIGFRAME_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SIGFRAME */
\r
268 #define LEUART_SIGFRAME_SIGFRAME_DEFAULT (_LEUART_SIGFRAME_SIGFRAME_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_SIGFRAME */
\r
270 /* Bit fields for LEUART RXDATAX */
\r
271 #define _LEUART_RXDATAX_RESETVALUE 0x00000000UL /**< Default value for LEUART_RXDATAX */
\r
272 #define _LEUART_RXDATAX_MASK 0x0000C1FFUL /**< Mask for LEUART_RXDATAX */
\r
273 #define _LEUART_RXDATAX_RXDATA_SHIFT 0 /**< Shift value for LEUART_RXDATA */
\r
274 #define _LEUART_RXDATAX_RXDATA_MASK 0x1FFUL /**< Bit mask for LEUART_RXDATA */
\r
275 #define _LEUART_RXDATAX_RXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATAX */
\r
276 #define LEUART_RXDATAX_RXDATA_DEFAULT (_LEUART_RXDATAX_RXDATA_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_RXDATAX */
\r
277 #define LEUART_RXDATAX_PERR (0x1UL << 14) /**< Receive Data Parity Error */
\r
278 #define _LEUART_RXDATAX_PERR_SHIFT 14 /**< Shift value for LEUART_PERR */
\r
279 #define _LEUART_RXDATAX_PERR_MASK 0x4000UL /**< Bit mask for LEUART_PERR */
\r
280 #define _LEUART_RXDATAX_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATAX */
\r
281 #define LEUART_RXDATAX_PERR_DEFAULT (_LEUART_RXDATAX_PERR_DEFAULT << 14) /**< Shifted mode DEFAULT for LEUART_RXDATAX */
\r
282 #define LEUART_RXDATAX_FERR (0x1UL << 15) /**< Receive Data Framing Error */
\r
283 #define _LEUART_RXDATAX_FERR_SHIFT 15 /**< Shift value for LEUART_FERR */
\r
284 #define _LEUART_RXDATAX_FERR_MASK 0x8000UL /**< Bit mask for LEUART_FERR */
\r
285 #define _LEUART_RXDATAX_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATAX */
\r
286 #define LEUART_RXDATAX_FERR_DEFAULT (_LEUART_RXDATAX_FERR_DEFAULT << 15) /**< Shifted mode DEFAULT for LEUART_RXDATAX */
\r
288 /* Bit fields for LEUART RXDATA */
\r
289 #define _LEUART_RXDATA_RESETVALUE 0x00000000UL /**< Default value for LEUART_RXDATA */
\r
290 #define _LEUART_RXDATA_MASK 0x000000FFUL /**< Mask for LEUART_RXDATA */
\r
291 #define _LEUART_RXDATA_RXDATA_SHIFT 0 /**< Shift value for LEUART_RXDATA */
\r
292 #define _LEUART_RXDATA_RXDATA_MASK 0xFFUL /**< Bit mask for LEUART_RXDATA */
\r
293 #define _LEUART_RXDATA_RXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATA */
\r
294 #define LEUART_RXDATA_RXDATA_DEFAULT (_LEUART_RXDATA_RXDATA_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_RXDATA */
\r
296 /* Bit fields for LEUART RXDATAXP */
\r
297 #define _LEUART_RXDATAXP_RESETVALUE 0x00000000UL /**< Default value for LEUART_RXDATAXP */
\r
298 #define _LEUART_RXDATAXP_MASK 0x0000C1FFUL /**< Mask for LEUART_RXDATAXP */
\r
299 #define _LEUART_RXDATAXP_RXDATAP_SHIFT 0 /**< Shift value for LEUART_RXDATAP */
\r
300 #define _LEUART_RXDATAXP_RXDATAP_MASK 0x1FFUL /**< Bit mask for LEUART_RXDATAP */
\r
301 #define _LEUART_RXDATAXP_RXDATAP_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATAXP */
\r
302 #define LEUART_RXDATAXP_RXDATAP_DEFAULT (_LEUART_RXDATAXP_RXDATAP_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_RXDATAXP */
\r
303 #define LEUART_RXDATAXP_PERRP (0x1UL << 14) /**< Receive Data Parity Error Peek */
\r
304 #define _LEUART_RXDATAXP_PERRP_SHIFT 14 /**< Shift value for LEUART_PERRP */
\r
305 #define _LEUART_RXDATAXP_PERRP_MASK 0x4000UL /**< Bit mask for LEUART_PERRP */
\r
306 #define _LEUART_RXDATAXP_PERRP_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATAXP */
\r
307 #define LEUART_RXDATAXP_PERRP_DEFAULT (_LEUART_RXDATAXP_PERRP_DEFAULT << 14) /**< Shifted mode DEFAULT for LEUART_RXDATAXP */
\r
308 #define LEUART_RXDATAXP_FERRP (0x1UL << 15) /**< Receive Data Framing Error Peek */
\r
309 #define _LEUART_RXDATAXP_FERRP_SHIFT 15 /**< Shift value for LEUART_FERRP */
\r
310 #define _LEUART_RXDATAXP_FERRP_MASK 0x8000UL /**< Bit mask for LEUART_FERRP */
\r
311 #define _LEUART_RXDATAXP_FERRP_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATAXP */
\r
312 #define LEUART_RXDATAXP_FERRP_DEFAULT (_LEUART_RXDATAXP_FERRP_DEFAULT << 15) /**< Shifted mode DEFAULT for LEUART_RXDATAXP */
\r
314 /* Bit fields for LEUART TXDATAX */
\r
315 #define _LEUART_TXDATAX_RESETVALUE 0x00000000UL /**< Default value for LEUART_TXDATAX */
\r
316 #define _LEUART_TXDATAX_MASK 0x0000E1FFUL /**< Mask for LEUART_TXDATAX */
\r
317 #define _LEUART_TXDATAX_TXDATA_SHIFT 0 /**< Shift value for LEUART_TXDATA */
\r
318 #define _LEUART_TXDATAX_TXDATA_MASK 0x1FFUL /**< Bit mask for LEUART_TXDATA */
\r
319 #define _LEUART_TXDATAX_TXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_TXDATAX */
\r
320 #define LEUART_TXDATAX_TXDATA_DEFAULT (_LEUART_TXDATAX_TXDATA_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_TXDATAX */
\r
321 #define LEUART_TXDATAX_TXBREAK (0x1UL << 13) /**< Transmit Data As Break */
\r
322 #define _LEUART_TXDATAX_TXBREAK_SHIFT 13 /**< Shift value for LEUART_TXBREAK */
\r
323 #define _LEUART_TXDATAX_TXBREAK_MASK 0x2000UL /**< Bit mask for LEUART_TXBREAK */
\r
324 #define _LEUART_TXDATAX_TXBREAK_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_TXDATAX */
\r
325 #define LEUART_TXDATAX_TXBREAK_DEFAULT (_LEUART_TXDATAX_TXBREAK_DEFAULT << 13) /**< Shifted mode DEFAULT for LEUART_TXDATAX */
\r
326 #define LEUART_TXDATAX_TXDISAT (0x1UL << 14) /**< Disable TX After Transmission */
\r
327 #define _LEUART_TXDATAX_TXDISAT_SHIFT 14 /**< Shift value for LEUART_TXDISAT */
\r
328 #define _LEUART_TXDATAX_TXDISAT_MASK 0x4000UL /**< Bit mask for LEUART_TXDISAT */
\r
329 #define _LEUART_TXDATAX_TXDISAT_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_TXDATAX */
\r
330 #define LEUART_TXDATAX_TXDISAT_DEFAULT (_LEUART_TXDATAX_TXDISAT_DEFAULT << 14) /**< Shifted mode DEFAULT for LEUART_TXDATAX */
\r
331 #define LEUART_TXDATAX_RXENAT (0x1UL << 15) /**< Enable RX After Transmission */
\r
332 #define _LEUART_TXDATAX_RXENAT_SHIFT 15 /**< Shift value for LEUART_RXENAT */
\r
333 #define _LEUART_TXDATAX_RXENAT_MASK 0x8000UL /**< Bit mask for LEUART_RXENAT */
\r
334 #define _LEUART_TXDATAX_RXENAT_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_TXDATAX */
\r
335 #define LEUART_TXDATAX_RXENAT_DEFAULT (_LEUART_TXDATAX_RXENAT_DEFAULT << 15) /**< Shifted mode DEFAULT for LEUART_TXDATAX */
\r
337 /* Bit fields for LEUART TXDATA */
\r
338 #define _LEUART_TXDATA_RESETVALUE 0x00000000UL /**< Default value for LEUART_TXDATA */
\r
339 #define _LEUART_TXDATA_MASK 0x000000FFUL /**< Mask for LEUART_TXDATA */
\r
340 #define _LEUART_TXDATA_TXDATA_SHIFT 0 /**< Shift value for LEUART_TXDATA */
\r
341 #define _LEUART_TXDATA_TXDATA_MASK 0xFFUL /**< Bit mask for LEUART_TXDATA */
\r
342 #define _LEUART_TXDATA_TXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_TXDATA */
\r
343 #define LEUART_TXDATA_TXDATA_DEFAULT (_LEUART_TXDATA_TXDATA_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_TXDATA */
\r
345 /* Bit fields for LEUART IF */
\r
346 #define _LEUART_IF_RESETVALUE 0x00000002UL /**< Default value for LEUART_IF */
\r
347 #define _LEUART_IF_MASK 0x000007FFUL /**< Mask for LEUART_IF */
\r
348 #define LEUART_IF_TXC (0x1UL << 0) /**< TX Complete Interrupt Flag */
\r
349 #define _LEUART_IF_TXC_SHIFT 0 /**< Shift value for LEUART_TXC */
\r
350 #define _LEUART_IF_TXC_MASK 0x1UL /**< Bit mask for LEUART_TXC */
\r
351 #define _LEUART_IF_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
\r
352 #define LEUART_IF_TXC_DEFAULT (_LEUART_IF_TXC_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_IF */
\r
353 #define LEUART_IF_TXBL (0x1UL << 1) /**< TX Buffer Level Interrupt Flag */
\r
354 #define _LEUART_IF_TXBL_SHIFT 1 /**< Shift value for LEUART_TXBL */
\r
355 #define _LEUART_IF_TXBL_MASK 0x2UL /**< Bit mask for LEUART_TXBL */
\r
356 #define _LEUART_IF_TXBL_DEFAULT 0x00000001UL /**< Mode DEFAULT for LEUART_IF */
\r
357 #define LEUART_IF_TXBL_DEFAULT (_LEUART_IF_TXBL_DEFAULT << 1) /**< Shifted mode DEFAULT for LEUART_IF */
\r
358 #define LEUART_IF_RXDATAV (0x1UL << 2) /**< RX Data Valid Interrupt Flag */
\r
359 #define _LEUART_IF_RXDATAV_SHIFT 2 /**< Shift value for LEUART_RXDATAV */
\r
360 #define _LEUART_IF_RXDATAV_MASK 0x4UL /**< Bit mask for LEUART_RXDATAV */
\r
361 #define _LEUART_IF_RXDATAV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
\r
362 #define LEUART_IF_RXDATAV_DEFAULT (_LEUART_IF_RXDATAV_DEFAULT << 2) /**< Shifted mode DEFAULT for LEUART_IF */
\r
363 #define LEUART_IF_RXOF (0x1UL << 3) /**< RX Overflow Interrupt Flag */
\r
364 #define _LEUART_IF_RXOF_SHIFT 3 /**< Shift value for LEUART_RXOF */
\r
365 #define _LEUART_IF_RXOF_MASK 0x8UL /**< Bit mask for LEUART_RXOF */
\r
366 #define _LEUART_IF_RXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
\r
367 #define LEUART_IF_RXOF_DEFAULT (_LEUART_IF_RXOF_DEFAULT << 3) /**< Shifted mode DEFAULT for LEUART_IF */
\r
368 #define LEUART_IF_RXUF (0x1UL << 4) /**< RX Underflow Interrupt Flag */
\r
369 #define _LEUART_IF_RXUF_SHIFT 4 /**< Shift value for LEUART_RXUF */
\r
370 #define _LEUART_IF_RXUF_MASK 0x10UL /**< Bit mask for LEUART_RXUF */
\r
371 #define _LEUART_IF_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
\r
372 #define LEUART_IF_RXUF_DEFAULT (_LEUART_IF_RXUF_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_IF */
\r
373 #define LEUART_IF_TXOF (0x1UL << 5) /**< TX Overflow Interrupt Flag */
\r
374 #define _LEUART_IF_TXOF_SHIFT 5 /**< Shift value for LEUART_TXOF */
\r
375 #define _LEUART_IF_TXOF_MASK 0x20UL /**< Bit mask for LEUART_TXOF */
\r
376 #define _LEUART_IF_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
\r
377 #define LEUART_IF_TXOF_DEFAULT (_LEUART_IF_TXOF_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_IF */
\r
378 #define LEUART_IF_PERR (0x1UL << 6) /**< Parity Error Interrupt Flag */
\r
379 #define _LEUART_IF_PERR_SHIFT 6 /**< Shift value for LEUART_PERR */
\r
380 #define _LEUART_IF_PERR_MASK 0x40UL /**< Bit mask for LEUART_PERR */
\r
381 #define _LEUART_IF_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
\r
382 #define LEUART_IF_PERR_DEFAULT (_LEUART_IF_PERR_DEFAULT << 6) /**< Shifted mode DEFAULT for LEUART_IF */
\r
383 #define LEUART_IF_FERR (0x1UL << 7) /**< Framing Error Interrupt Flag */
\r
384 #define _LEUART_IF_FERR_SHIFT 7 /**< Shift value for LEUART_FERR */
\r
385 #define _LEUART_IF_FERR_MASK 0x80UL /**< Bit mask for LEUART_FERR */
\r
386 #define _LEUART_IF_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
\r
387 #define LEUART_IF_FERR_DEFAULT (_LEUART_IF_FERR_DEFAULT << 7) /**< Shifted mode DEFAULT for LEUART_IF */
\r
388 #define LEUART_IF_MPAF (0x1UL << 8) /**< Multi-Processor Address Frame Interrupt Flag */
\r
389 #define _LEUART_IF_MPAF_SHIFT 8 /**< Shift value for LEUART_MPAF */
\r
390 #define _LEUART_IF_MPAF_MASK 0x100UL /**< Bit mask for LEUART_MPAF */
\r
391 #define _LEUART_IF_MPAF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
\r
392 #define LEUART_IF_MPAF_DEFAULT (_LEUART_IF_MPAF_DEFAULT << 8) /**< Shifted mode DEFAULT for LEUART_IF */
\r
393 #define LEUART_IF_STARTF (0x1UL << 9) /**< Start Frame Interrupt Flag */
\r
394 #define _LEUART_IF_STARTF_SHIFT 9 /**< Shift value for LEUART_STARTF */
\r
395 #define _LEUART_IF_STARTF_MASK 0x200UL /**< Bit mask for LEUART_STARTF */
\r
396 #define _LEUART_IF_STARTF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
\r
397 #define LEUART_IF_STARTF_DEFAULT (_LEUART_IF_STARTF_DEFAULT << 9) /**< Shifted mode DEFAULT for LEUART_IF */
\r
398 #define LEUART_IF_SIGF (0x1UL << 10) /**< Signal Frame Interrupt Flag */
\r
399 #define _LEUART_IF_SIGF_SHIFT 10 /**< Shift value for LEUART_SIGF */
\r
400 #define _LEUART_IF_SIGF_MASK 0x400UL /**< Bit mask for LEUART_SIGF */
\r
401 #define _LEUART_IF_SIGF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
\r
402 #define LEUART_IF_SIGF_DEFAULT (_LEUART_IF_SIGF_DEFAULT << 10) /**< Shifted mode DEFAULT for LEUART_IF */
\r
404 /* Bit fields for LEUART IFS */
\r
405 #define _LEUART_IFS_RESETVALUE 0x00000000UL /**< Default value for LEUART_IFS */
\r
406 #define _LEUART_IFS_MASK 0x000007F9UL /**< Mask for LEUART_IFS */
\r
407 #define LEUART_IFS_TXC (0x1UL << 0) /**< Set TX Complete Interrupt Flag */
\r
408 #define _LEUART_IFS_TXC_SHIFT 0 /**< Shift value for LEUART_TXC */
\r
409 #define _LEUART_IFS_TXC_MASK 0x1UL /**< Bit mask for LEUART_TXC */
\r
410 #define _LEUART_IFS_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
\r
411 #define LEUART_IFS_TXC_DEFAULT (_LEUART_IFS_TXC_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_IFS */
\r
412 #define LEUART_IFS_RXOF (0x1UL << 3) /**< Set RX Overflow Interrupt Flag */
\r
413 #define _LEUART_IFS_RXOF_SHIFT 3 /**< Shift value for LEUART_RXOF */
\r
414 #define _LEUART_IFS_RXOF_MASK 0x8UL /**< Bit mask for LEUART_RXOF */
\r
415 #define _LEUART_IFS_RXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
\r
416 #define LEUART_IFS_RXOF_DEFAULT (_LEUART_IFS_RXOF_DEFAULT << 3) /**< Shifted mode DEFAULT for LEUART_IFS */
\r
417 #define LEUART_IFS_RXUF (0x1UL << 4) /**< Set RX Underflow Interrupt Flag */
\r
418 #define _LEUART_IFS_RXUF_SHIFT 4 /**< Shift value for LEUART_RXUF */
\r
419 #define _LEUART_IFS_RXUF_MASK 0x10UL /**< Bit mask for LEUART_RXUF */
\r
420 #define _LEUART_IFS_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
\r
421 #define LEUART_IFS_RXUF_DEFAULT (_LEUART_IFS_RXUF_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_IFS */
\r
422 #define LEUART_IFS_TXOF (0x1UL << 5) /**< Set TX Overflow Interrupt Flag */
\r
423 #define _LEUART_IFS_TXOF_SHIFT 5 /**< Shift value for LEUART_TXOF */
\r
424 #define _LEUART_IFS_TXOF_MASK 0x20UL /**< Bit mask for LEUART_TXOF */
\r
425 #define _LEUART_IFS_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
\r
426 #define LEUART_IFS_TXOF_DEFAULT (_LEUART_IFS_TXOF_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_IFS */
\r
427 #define LEUART_IFS_PERR (0x1UL << 6) /**< Set Parity Error Interrupt Flag */
\r
428 #define _LEUART_IFS_PERR_SHIFT 6 /**< Shift value for LEUART_PERR */
\r
429 #define _LEUART_IFS_PERR_MASK 0x40UL /**< Bit mask for LEUART_PERR */
\r
430 #define _LEUART_IFS_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
\r
431 #define LEUART_IFS_PERR_DEFAULT (_LEUART_IFS_PERR_DEFAULT << 6) /**< Shifted mode DEFAULT for LEUART_IFS */
\r
432 #define LEUART_IFS_FERR (0x1UL << 7) /**< Set Framing Error Interrupt Flag */
\r
433 #define _LEUART_IFS_FERR_SHIFT 7 /**< Shift value for LEUART_FERR */
\r
434 #define _LEUART_IFS_FERR_MASK 0x80UL /**< Bit mask for LEUART_FERR */
\r
435 #define _LEUART_IFS_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
\r
436 #define LEUART_IFS_FERR_DEFAULT (_LEUART_IFS_FERR_DEFAULT << 7) /**< Shifted mode DEFAULT for LEUART_IFS */
\r
437 #define LEUART_IFS_MPAF (0x1UL << 8) /**< Set Multi-Processor Address Frame Interrupt Flag */
\r
438 #define _LEUART_IFS_MPAF_SHIFT 8 /**< Shift value for LEUART_MPAF */
\r
439 #define _LEUART_IFS_MPAF_MASK 0x100UL /**< Bit mask for LEUART_MPAF */
\r
440 #define _LEUART_IFS_MPAF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
\r
441 #define LEUART_IFS_MPAF_DEFAULT (_LEUART_IFS_MPAF_DEFAULT << 8) /**< Shifted mode DEFAULT for LEUART_IFS */
\r
442 #define LEUART_IFS_STARTF (0x1UL << 9) /**< Set Start Frame Interrupt Flag */
\r
443 #define _LEUART_IFS_STARTF_SHIFT 9 /**< Shift value for LEUART_STARTF */
\r
444 #define _LEUART_IFS_STARTF_MASK 0x200UL /**< Bit mask for LEUART_STARTF */
\r
445 #define _LEUART_IFS_STARTF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
\r
446 #define LEUART_IFS_STARTF_DEFAULT (_LEUART_IFS_STARTF_DEFAULT << 9) /**< Shifted mode DEFAULT for LEUART_IFS */
\r
447 #define LEUART_IFS_SIGF (0x1UL << 10) /**< Set Signal Frame Interrupt Flag */
\r
448 #define _LEUART_IFS_SIGF_SHIFT 10 /**< Shift value for LEUART_SIGF */
\r
449 #define _LEUART_IFS_SIGF_MASK 0x400UL /**< Bit mask for LEUART_SIGF */
\r
450 #define _LEUART_IFS_SIGF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
\r
451 #define LEUART_IFS_SIGF_DEFAULT (_LEUART_IFS_SIGF_DEFAULT << 10) /**< Shifted mode DEFAULT for LEUART_IFS */
\r
453 /* Bit fields for LEUART IFC */
\r
454 #define _LEUART_IFC_RESETVALUE 0x00000000UL /**< Default value for LEUART_IFC */
\r
455 #define _LEUART_IFC_MASK 0x000007F9UL /**< Mask for LEUART_IFC */
\r
456 #define LEUART_IFC_TXC (0x1UL << 0) /**< Clear TX Complete Interrupt Flag */
\r
457 #define _LEUART_IFC_TXC_SHIFT 0 /**< Shift value for LEUART_TXC */
\r
458 #define _LEUART_IFC_TXC_MASK 0x1UL /**< Bit mask for LEUART_TXC */
\r
459 #define _LEUART_IFC_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
\r
460 #define LEUART_IFC_TXC_DEFAULT (_LEUART_IFC_TXC_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_IFC */
\r
461 #define LEUART_IFC_RXOF (0x1UL << 3) /**< Clear RX Overflow Interrupt Flag */
\r
462 #define _LEUART_IFC_RXOF_SHIFT 3 /**< Shift value for LEUART_RXOF */
\r
463 #define _LEUART_IFC_RXOF_MASK 0x8UL /**< Bit mask for LEUART_RXOF */
\r
464 #define _LEUART_IFC_RXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
\r
465 #define LEUART_IFC_RXOF_DEFAULT (_LEUART_IFC_RXOF_DEFAULT << 3) /**< Shifted mode DEFAULT for LEUART_IFC */
\r
466 #define LEUART_IFC_RXUF (0x1UL << 4) /**< Clear RX Underflow Interrupt Flag */
\r
467 #define _LEUART_IFC_RXUF_SHIFT 4 /**< Shift value for LEUART_RXUF */
\r
468 #define _LEUART_IFC_RXUF_MASK 0x10UL /**< Bit mask for LEUART_RXUF */
\r
469 #define _LEUART_IFC_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
\r
470 #define LEUART_IFC_RXUF_DEFAULT (_LEUART_IFC_RXUF_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_IFC */
\r
471 #define LEUART_IFC_TXOF (0x1UL << 5) /**< Clear TX Overflow Interrupt Flag */
\r
472 #define _LEUART_IFC_TXOF_SHIFT 5 /**< Shift value for LEUART_TXOF */
\r
473 #define _LEUART_IFC_TXOF_MASK 0x20UL /**< Bit mask for LEUART_TXOF */
\r
474 #define _LEUART_IFC_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
\r
475 #define LEUART_IFC_TXOF_DEFAULT (_LEUART_IFC_TXOF_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_IFC */
\r
476 #define LEUART_IFC_PERR (0x1UL << 6) /**< Clear Parity Error Interrupt Flag */
\r
477 #define _LEUART_IFC_PERR_SHIFT 6 /**< Shift value for LEUART_PERR */
\r
478 #define _LEUART_IFC_PERR_MASK 0x40UL /**< Bit mask for LEUART_PERR */
\r
479 #define _LEUART_IFC_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
\r
480 #define LEUART_IFC_PERR_DEFAULT (_LEUART_IFC_PERR_DEFAULT << 6) /**< Shifted mode DEFAULT for LEUART_IFC */
\r
481 #define LEUART_IFC_FERR (0x1UL << 7) /**< Clear Framing Error Interrupt Flag */
\r
482 #define _LEUART_IFC_FERR_SHIFT 7 /**< Shift value for LEUART_FERR */
\r
483 #define _LEUART_IFC_FERR_MASK 0x80UL /**< Bit mask for LEUART_FERR */
\r
484 #define _LEUART_IFC_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
\r
485 #define LEUART_IFC_FERR_DEFAULT (_LEUART_IFC_FERR_DEFAULT << 7) /**< Shifted mode DEFAULT for LEUART_IFC */
\r
486 #define LEUART_IFC_MPAF (0x1UL << 8) /**< Clear Multi-Processor Address Frame Interrupt Flag */
\r
487 #define _LEUART_IFC_MPAF_SHIFT 8 /**< Shift value for LEUART_MPAF */
\r
488 #define _LEUART_IFC_MPAF_MASK 0x100UL /**< Bit mask for LEUART_MPAF */
\r
489 #define _LEUART_IFC_MPAF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
\r
490 #define LEUART_IFC_MPAF_DEFAULT (_LEUART_IFC_MPAF_DEFAULT << 8) /**< Shifted mode DEFAULT for LEUART_IFC */
\r
491 #define LEUART_IFC_STARTF (0x1UL << 9) /**< Clear Start-Frame Interrupt Flag */
\r
492 #define _LEUART_IFC_STARTF_SHIFT 9 /**< Shift value for LEUART_STARTF */
\r
493 #define _LEUART_IFC_STARTF_MASK 0x200UL /**< Bit mask for LEUART_STARTF */
\r
494 #define _LEUART_IFC_STARTF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
\r
495 #define LEUART_IFC_STARTF_DEFAULT (_LEUART_IFC_STARTF_DEFAULT << 9) /**< Shifted mode DEFAULT for LEUART_IFC */
\r
496 #define LEUART_IFC_SIGF (0x1UL << 10) /**< Clear Signal-Frame Interrupt Flag */
\r
497 #define _LEUART_IFC_SIGF_SHIFT 10 /**< Shift value for LEUART_SIGF */
\r
498 #define _LEUART_IFC_SIGF_MASK 0x400UL /**< Bit mask for LEUART_SIGF */
\r
499 #define _LEUART_IFC_SIGF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
\r
500 #define LEUART_IFC_SIGF_DEFAULT (_LEUART_IFC_SIGF_DEFAULT << 10) /**< Shifted mode DEFAULT for LEUART_IFC */
\r
502 /* Bit fields for LEUART IEN */
\r
503 #define _LEUART_IEN_RESETVALUE 0x00000000UL /**< Default value for LEUART_IEN */
\r
504 #define _LEUART_IEN_MASK 0x000007FFUL /**< Mask for LEUART_IEN */
\r
505 #define LEUART_IEN_TXC (0x1UL << 0) /**< TX Complete Interrupt Enable */
\r
506 #define _LEUART_IEN_TXC_SHIFT 0 /**< Shift value for LEUART_TXC */
\r
507 #define _LEUART_IEN_TXC_MASK 0x1UL /**< Bit mask for LEUART_TXC */
\r
508 #define _LEUART_IEN_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
\r
509 #define LEUART_IEN_TXC_DEFAULT (_LEUART_IEN_TXC_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_IEN */
\r
510 #define LEUART_IEN_TXBL (0x1UL << 1) /**< TX Buffer Level Interrupt Enable */
\r
511 #define _LEUART_IEN_TXBL_SHIFT 1 /**< Shift value for LEUART_TXBL */
\r
512 #define _LEUART_IEN_TXBL_MASK 0x2UL /**< Bit mask for LEUART_TXBL */
\r
513 #define _LEUART_IEN_TXBL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
\r
514 #define LEUART_IEN_TXBL_DEFAULT (_LEUART_IEN_TXBL_DEFAULT << 1) /**< Shifted mode DEFAULT for LEUART_IEN */
\r
515 #define LEUART_IEN_RXDATAV (0x1UL << 2) /**< RX Data Valid Interrupt Enable */
\r
516 #define _LEUART_IEN_RXDATAV_SHIFT 2 /**< Shift value for LEUART_RXDATAV */
\r
517 #define _LEUART_IEN_RXDATAV_MASK 0x4UL /**< Bit mask for LEUART_RXDATAV */
\r
518 #define _LEUART_IEN_RXDATAV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
\r
519 #define LEUART_IEN_RXDATAV_DEFAULT (_LEUART_IEN_RXDATAV_DEFAULT << 2) /**< Shifted mode DEFAULT for LEUART_IEN */
\r
520 #define LEUART_IEN_RXOF (0x1UL << 3) /**< RX Overflow Interrupt Enable */
\r
521 #define _LEUART_IEN_RXOF_SHIFT 3 /**< Shift value for LEUART_RXOF */
\r
522 #define _LEUART_IEN_RXOF_MASK 0x8UL /**< Bit mask for LEUART_RXOF */
\r
523 #define _LEUART_IEN_RXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
\r
524 #define LEUART_IEN_RXOF_DEFAULT (_LEUART_IEN_RXOF_DEFAULT << 3) /**< Shifted mode DEFAULT for LEUART_IEN */
\r
525 #define LEUART_IEN_RXUF (0x1UL << 4) /**< RX Underflow Interrupt Enable */
\r
526 #define _LEUART_IEN_RXUF_SHIFT 4 /**< Shift value for LEUART_RXUF */
\r
527 #define _LEUART_IEN_RXUF_MASK 0x10UL /**< Bit mask for LEUART_RXUF */
\r
528 #define _LEUART_IEN_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
\r
529 #define LEUART_IEN_RXUF_DEFAULT (_LEUART_IEN_RXUF_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_IEN */
\r
530 #define LEUART_IEN_TXOF (0x1UL << 5) /**< TX Overflow Interrupt Enable */
\r
531 #define _LEUART_IEN_TXOF_SHIFT 5 /**< Shift value for LEUART_TXOF */
\r
532 #define _LEUART_IEN_TXOF_MASK 0x20UL /**< Bit mask for LEUART_TXOF */
\r
533 #define _LEUART_IEN_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
\r
534 #define LEUART_IEN_TXOF_DEFAULT (_LEUART_IEN_TXOF_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_IEN */
\r
535 #define LEUART_IEN_PERR (0x1UL << 6) /**< Parity Error Interrupt Enable */
\r
536 #define _LEUART_IEN_PERR_SHIFT 6 /**< Shift value for LEUART_PERR */
\r
537 #define _LEUART_IEN_PERR_MASK 0x40UL /**< Bit mask for LEUART_PERR */
\r
538 #define _LEUART_IEN_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
\r
539 #define LEUART_IEN_PERR_DEFAULT (_LEUART_IEN_PERR_DEFAULT << 6) /**< Shifted mode DEFAULT for LEUART_IEN */
\r
540 #define LEUART_IEN_FERR (0x1UL << 7) /**< Framing Error Interrupt Enable */
\r
541 #define _LEUART_IEN_FERR_SHIFT 7 /**< Shift value for LEUART_FERR */
\r
542 #define _LEUART_IEN_FERR_MASK 0x80UL /**< Bit mask for LEUART_FERR */
\r
543 #define _LEUART_IEN_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
\r
544 #define LEUART_IEN_FERR_DEFAULT (_LEUART_IEN_FERR_DEFAULT << 7) /**< Shifted mode DEFAULT for LEUART_IEN */
\r
545 #define LEUART_IEN_MPAF (0x1UL << 8) /**< Multi-Processor Address Frame Interrupt Enable */
\r
546 #define _LEUART_IEN_MPAF_SHIFT 8 /**< Shift value for LEUART_MPAF */
\r
547 #define _LEUART_IEN_MPAF_MASK 0x100UL /**< Bit mask for LEUART_MPAF */
\r
548 #define _LEUART_IEN_MPAF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
\r
549 #define LEUART_IEN_MPAF_DEFAULT (_LEUART_IEN_MPAF_DEFAULT << 8) /**< Shifted mode DEFAULT for LEUART_IEN */
\r
550 #define LEUART_IEN_STARTF (0x1UL << 9) /**< Start Frame Interrupt Enable */
\r
551 #define _LEUART_IEN_STARTF_SHIFT 9 /**< Shift value for LEUART_STARTF */
\r
552 #define _LEUART_IEN_STARTF_MASK 0x200UL /**< Bit mask for LEUART_STARTF */
\r
553 #define _LEUART_IEN_STARTF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
\r
554 #define LEUART_IEN_STARTF_DEFAULT (_LEUART_IEN_STARTF_DEFAULT << 9) /**< Shifted mode DEFAULT for LEUART_IEN */
\r
555 #define LEUART_IEN_SIGF (0x1UL << 10) /**< Signal Frame Interrupt Enable */
\r
556 #define _LEUART_IEN_SIGF_SHIFT 10 /**< Shift value for LEUART_SIGF */
\r
557 #define _LEUART_IEN_SIGF_MASK 0x400UL /**< Bit mask for LEUART_SIGF */
\r
558 #define _LEUART_IEN_SIGF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
\r
559 #define LEUART_IEN_SIGF_DEFAULT (_LEUART_IEN_SIGF_DEFAULT << 10) /**< Shifted mode DEFAULT for LEUART_IEN */
\r
561 /* Bit fields for LEUART PULSECTRL */
\r
562 #define _LEUART_PULSECTRL_RESETVALUE 0x00000000UL /**< Default value for LEUART_PULSECTRL */
\r
563 #define _LEUART_PULSECTRL_MASK 0x0000003FUL /**< Mask for LEUART_PULSECTRL */
\r
564 #define _LEUART_PULSECTRL_PULSEW_SHIFT 0 /**< Shift value for LEUART_PULSEW */
\r
565 #define _LEUART_PULSECTRL_PULSEW_MASK 0xFUL /**< Bit mask for LEUART_PULSEW */
\r
566 #define _LEUART_PULSECTRL_PULSEW_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_PULSECTRL */
\r
567 #define LEUART_PULSECTRL_PULSEW_DEFAULT (_LEUART_PULSECTRL_PULSEW_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_PULSECTRL */
\r
568 #define LEUART_PULSECTRL_PULSEEN (0x1UL << 4) /**< Pulse Generator/Extender Enable */
\r
569 #define _LEUART_PULSECTRL_PULSEEN_SHIFT 4 /**< Shift value for LEUART_PULSEEN */
\r
570 #define _LEUART_PULSECTRL_PULSEEN_MASK 0x10UL /**< Bit mask for LEUART_PULSEEN */
\r
571 #define _LEUART_PULSECTRL_PULSEEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_PULSECTRL */
\r
572 #define LEUART_PULSECTRL_PULSEEN_DEFAULT (_LEUART_PULSECTRL_PULSEEN_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_PULSECTRL */
\r
573 #define LEUART_PULSECTRL_PULSEFILT (0x1UL << 5) /**< Pulse Filter */
\r
574 #define _LEUART_PULSECTRL_PULSEFILT_SHIFT 5 /**< Shift value for LEUART_PULSEFILT */
\r
575 #define _LEUART_PULSECTRL_PULSEFILT_MASK 0x20UL /**< Bit mask for LEUART_PULSEFILT */
\r
576 #define _LEUART_PULSECTRL_PULSEFILT_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_PULSECTRL */
\r
577 #define LEUART_PULSECTRL_PULSEFILT_DEFAULT (_LEUART_PULSECTRL_PULSEFILT_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_PULSECTRL */
\r
579 /* Bit fields for LEUART FREEZE */
\r
580 #define _LEUART_FREEZE_RESETVALUE 0x00000000UL /**< Default value for LEUART_FREEZE */
\r
581 #define _LEUART_FREEZE_MASK 0x00000001UL /**< Mask for LEUART_FREEZE */
\r
582 #define LEUART_FREEZE_REGFREEZE (0x1UL << 0) /**< Register Update Freeze */
\r
583 #define _LEUART_FREEZE_REGFREEZE_SHIFT 0 /**< Shift value for LEUART_REGFREEZE */
\r
584 #define _LEUART_FREEZE_REGFREEZE_MASK 0x1UL /**< Bit mask for LEUART_REGFREEZE */
\r
585 #define _LEUART_FREEZE_REGFREEZE_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_FREEZE */
\r
586 #define _LEUART_FREEZE_REGFREEZE_UPDATE 0x00000000UL /**< Mode UPDATE for LEUART_FREEZE */
\r
587 #define _LEUART_FREEZE_REGFREEZE_FREEZE 0x00000001UL /**< Mode FREEZE for LEUART_FREEZE */
\r
588 #define LEUART_FREEZE_REGFREEZE_DEFAULT (_LEUART_FREEZE_REGFREEZE_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_FREEZE */
\r
589 #define LEUART_FREEZE_REGFREEZE_UPDATE (_LEUART_FREEZE_REGFREEZE_UPDATE << 0) /**< Shifted mode UPDATE for LEUART_FREEZE */
\r
590 #define LEUART_FREEZE_REGFREEZE_FREEZE (_LEUART_FREEZE_REGFREEZE_FREEZE << 0) /**< Shifted mode FREEZE for LEUART_FREEZE */
\r
592 /* Bit fields for LEUART SYNCBUSY */
\r
593 #define _LEUART_SYNCBUSY_RESETVALUE 0x00000000UL /**< Default value for LEUART_SYNCBUSY */
\r
594 #define _LEUART_SYNCBUSY_MASK 0x000000FFUL /**< Mask for LEUART_SYNCBUSY */
\r
595 #define LEUART_SYNCBUSY_CTRL (0x1UL << 0) /**< CTRL Register Busy */
\r
596 #define _LEUART_SYNCBUSY_CTRL_SHIFT 0 /**< Shift value for LEUART_CTRL */
\r
597 #define _LEUART_SYNCBUSY_CTRL_MASK 0x1UL /**< Bit mask for LEUART_CTRL */
\r
598 #define _LEUART_SYNCBUSY_CTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
\r
599 #define LEUART_SYNCBUSY_CTRL_DEFAULT (_LEUART_SYNCBUSY_CTRL_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
\r
600 #define LEUART_SYNCBUSY_CMD (0x1UL << 1) /**< CMD Register Busy */
\r
601 #define _LEUART_SYNCBUSY_CMD_SHIFT 1 /**< Shift value for LEUART_CMD */
\r
602 #define _LEUART_SYNCBUSY_CMD_MASK 0x2UL /**< Bit mask for LEUART_CMD */
\r
603 #define _LEUART_SYNCBUSY_CMD_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
\r
604 #define LEUART_SYNCBUSY_CMD_DEFAULT (_LEUART_SYNCBUSY_CMD_DEFAULT << 1) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
\r
605 #define LEUART_SYNCBUSY_CLKDIV (0x1UL << 2) /**< CLKDIV Register Busy */
\r
606 #define _LEUART_SYNCBUSY_CLKDIV_SHIFT 2 /**< Shift value for LEUART_CLKDIV */
\r
607 #define _LEUART_SYNCBUSY_CLKDIV_MASK 0x4UL /**< Bit mask for LEUART_CLKDIV */
\r
608 #define _LEUART_SYNCBUSY_CLKDIV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
\r
609 #define LEUART_SYNCBUSY_CLKDIV_DEFAULT (_LEUART_SYNCBUSY_CLKDIV_DEFAULT << 2) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
\r
610 #define LEUART_SYNCBUSY_STARTFRAME (0x1UL << 3) /**< STARTFRAME Register Busy */
\r
611 #define _LEUART_SYNCBUSY_STARTFRAME_SHIFT 3 /**< Shift value for LEUART_STARTFRAME */
\r
612 #define _LEUART_SYNCBUSY_STARTFRAME_MASK 0x8UL /**< Bit mask for LEUART_STARTFRAME */
\r
613 #define _LEUART_SYNCBUSY_STARTFRAME_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
\r
614 #define LEUART_SYNCBUSY_STARTFRAME_DEFAULT (_LEUART_SYNCBUSY_STARTFRAME_DEFAULT << 3) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
\r
615 #define LEUART_SYNCBUSY_SIGFRAME (0x1UL << 4) /**< SIGFRAME Register Busy */
\r
616 #define _LEUART_SYNCBUSY_SIGFRAME_SHIFT 4 /**< Shift value for LEUART_SIGFRAME */
\r
617 #define _LEUART_SYNCBUSY_SIGFRAME_MASK 0x10UL /**< Bit mask for LEUART_SIGFRAME */
\r
618 #define _LEUART_SYNCBUSY_SIGFRAME_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
\r
619 #define LEUART_SYNCBUSY_SIGFRAME_DEFAULT (_LEUART_SYNCBUSY_SIGFRAME_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
\r
620 #define LEUART_SYNCBUSY_TXDATAX (0x1UL << 5) /**< TXDATAX Register Busy */
\r
621 #define _LEUART_SYNCBUSY_TXDATAX_SHIFT 5 /**< Shift value for LEUART_TXDATAX */
\r
622 #define _LEUART_SYNCBUSY_TXDATAX_MASK 0x20UL /**< Bit mask for LEUART_TXDATAX */
\r
623 #define _LEUART_SYNCBUSY_TXDATAX_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
\r
624 #define LEUART_SYNCBUSY_TXDATAX_DEFAULT (_LEUART_SYNCBUSY_TXDATAX_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
\r
625 #define LEUART_SYNCBUSY_TXDATA (0x1UL << 6) /**< TXDATA Register Busy */
\r
626 #define _LEUART_SYNCBUSY_TXDATA_SHIFT 6 /**< Shift value for LEUART_TXDATA */
\r
627 #define _LEUART_SYNCBUSY_TXDATA_MASK 0x40UL /**< Bit mask for LEUART_TXDATA */
\r
628 #define _LEUART_SYNCBUSY_TXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
\r
629 #define LEUART_SYNCBUSY_TXDATA_DEFAULT (_LEUART_SYNCBUSY_TXDATA_DEFAULT << 6) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
\r
630 #define LEUART_SYNCBUSY_PULSECTRL (0x1UL << 7) /**< PULSECTRL Register Busy */
\r
631 #define _LEUART_SYNCBUSY_PULSECTRL_SHIFT 7 /**< Shift value for LEUART_PULSECTRL */
\r
632 #define _LEUART_SYNCBUSY_PULSECTRL_MASK 0x80UL /**< Bit mask for LEUART_PULSECTRL */
\r
633 #define _LEUART_SYNCBUSY_PULSECTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
\r
634 #define LEUART_SYNCBUSY_PULSECTRL_DEFAULT (_LEUART_SYNCBUSY_PULSECTRL_DEFAULT << 7) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
\r
636 /* Bit fields for LEUART ROUTE */
\r
637 #define _LEUART_ROUTE_RESETVALUE 0x00000000UL /**< Default value for LEUART_ROUTE */
\r
638 #define _LEUART_ROUTE_MASK 0x00000703UL /**< Mask for LEUART_ROUTE */
\r
639 #define LEUART_ROUTE_RXPEN (0x1UL << 0) /**< RX Pin Enable */
\r
640 #define _LEUART_ROUTE_RXPEN_SHIFT 0 /**< Shift value for LEUART_RXPEN */
\r
641 #define _LEUART_ROUTE_RXPEN_MASK 0x1UL /**< Bit mask for LEUART_RXPEN */
\r
642 #define _LEUART_ROUTE_RXPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_ROUTE */
\r
643 #define LEUART_ROUTE_RXPEN_DEFAULT (_LEUART_ROUTE_RXPEN_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_ROUTE */
\r
644 #define LEUART_ROUTE_TXPEN (0x1UL << 1) /**< TX Pin Enable */
\r
645 #define _LEUART_ROUTE_TXPEN_SHIFT 1 /**< Shift value for LEUART_TXPEN */
\r
646 #define _LEUART_ROUTE_TXPEN_MASK 0x2UL /**< Bit mask for LEUART_TXPEN */
\r
647 #define _LEUART_ROUTE_TXPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_ROUTE */
\r
648 #define LEUART_ROUTE_TXPEN_DEFAULT (_LEUART_ROUTE_TXPEN_DEFAULT << 1) /**< Shifted mode DEFAULT for LEUART_ROUTE */
\r
649 #define _LEUART_ROUTE_LOCATION_SHIFT 8 /**< Shift value for LEUART_LOCATION */
\r
650 #define _LEUART_ROUTE_LOCATION_MASK 0x700UL /**< Bit mask for LEUART_LOCATION */
\r
651 #define _LEUART_ROUTE_LOCATION_LOC0 0x00000000UL /**< Mode LOC0 for LEUART_ROUTE */
\r
652 #define _LEUART_ROUTE_LOCATION_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_ROUTE */
\r
653 #define _LEUART_ROUTE_LOCATION_LOC1 0x00000001UL /**< Mode LOC1 for LEUART_ROUTE */
\r
654 #define _LEUART_ROUTE_LOCATION_LOC2 0x00000002UL /**< Mode LOC2 for LEUART_ROUTE */
\r
655 #define _LEUART_ROUTE_LOCATION_LOC3 0x00000003UL /**< Mode LOC3 for LEUART_ROUTE */
\r
656 #define _LEUART_ROUTE_LOCATION_LOC4 0x00000004UL /**< Mode LOC4 for LEUART_ROUTE */
\r
657 #define LEUART_ROUTE_LOCATION_LOC0 (_LEUART_ROUTE_LOCATION_LOC0 << 8) /**< Shifted mode LOC0 for LEUART_ROUTE */
\r
658 #define LEUART_ROUTE_LOCATION_DEFAULT (_LEUART_ROUTE_LOCATION_DEFAULT << 8) /**< Shifted mode DEFAULT for LEUART_ROUTE */
\r
659 #define LEUART_ROUTE_LOCATION_LOC1 (_LEUART_ROUTE_LOCATION_LOC1 << 8) /**< Shifted mode LOC1 for LEUART_ROUTE */
\r
660 #define LEUART_ROUTE_LOCATION_LOC2 (_LEUART_ROUTE_LOCATION_LOC2 << 8) /**< Shifted mode LOC2 for LEUART_ROUTE */
\r
661 #define LEUART_ROUTE_LOCATION_LOC3 (_LEUART_ROUTE_LOCATION_LOC3 << 8) /**< Shifted mode LOC3 for LEUART_ROUTE */
\r
662 #define LEUART_ROUTE_LOCATION_LOC4 (_LEUART_ROUTE_LOCATION_LOC4 << 8) /**< Shifted mode LOC4 for LEUART_ROUTE */
\r
664 /* Bit fields for LEUART INPUT */
\r
665 #define _LEUART_INPUT_RESETVALUE 0x00000000UL /**< Default value for LEUART_INPUT */
\r
666 #define _LEUART_INPUT_MASK 0x0000001FUL /**< Mask for LEUART_INPUT */
\r
667 #define _LEUART_INPUT_RXPRSSEL_SHIFT 0 /**< Shift value for LEUART_RXPRSSEL */
\r
668 #define _LEUART_INPUT_RXPRSSEL_MASK 0xFUL /**< Bit mask for LEUART_RXPRSSEL */
\r
669 #define _LEUART_INPUT_RXPRSSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_INPUT */
\r
670 #define _LEUART_INPUT_RXPRSSEL_PRSCH0 0x00000000UL /**< Mode PRSCH0 for LEUART_INPUT */
\r
671 #define _LEUART_INPUT_RXPRSSEL_PRSCH1 0x00000001UL /**< Mode PRSCH1 for LEUART_INPUT */
\r
672 #define _LEUART_INPUT_RXPRSSEL_PRSCH2 0x00000002UL /**< Mode PRSCH2 for LEUART_INPUT */
\r
673 #define _LEUART_INPUT_RXPRSSEL_PRSCH3 0x00000003UL /**< Mode PRSCH3 for LEUART_INPUT */
\r
674 #define _LEUART_INPUT_RXPRSSEL_PRSCH4 0x00000004UL /**< Mode PRSCH4 for LEUART_INPUT */
\r
675 #define _LEUART_INPUT_RXPRSSEL_PRSCH5 0x00000005UL /**< Mode PRSCH5 for LEUART_INPUT */
\r
676 #define _LEUART_INPUT_RXPRSSEL_PRSCH6 0x00000006UL /**< Mode PRSCH6 for LEUART_INPUT */
\r
677 #define _LEUART_INPUT_RXPRSSEL_PRSCH7 0x00000007UL /**< Mode PRSCH7 for LEUART_INPUT */
\r
678 #define _LEUART_INPUT_RXPRSSEL_PRSCH8 0x00000008UL /**< Mode PRSCH8 for LEUART_INPUT */
\r
679 #define _LEUART_INPUT_RXPRSSEL_PRSCH9 0x00000009UL /**< Mode PRSCH9 for LEUART_INPUT */
\r
680 #define _LEUART_INPUT_RXPRSSEL_PRSCH10 0x0000000AUL /**< Mode PRSCH10 for LEUART_INPUT */
\r
681 #define _LEUART_INPUT_RXPRSSEL_PRSCH11 0x0000000BUL /**< Mode PRSCH11 for LEUART_INPUT */
\r
682 #define LEUART_INPUT_RXPRSSEL_DEFAULT (_LEUART_INPUT_RXPRSSEL_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_INPUT */
\r
683 #define LEUART_INPUT_RXPRSSEL_PRSCH0 (_LEUART_INPUT_RXPRSSEL_PRSCH0 << 0) /**< Shifted mode PRSCH0 for LEUART_INPUT */
\r
684 #define LEUART_INPUT_RXPRSSEL_PRSCH1 (_LEUART_INPUT_RXPRSSEL_PRSCH1 << 0) /**< Shifted mode PRSCH1 for LEUART_INPUT */
\r
685 #define LEUART_INPUT_RXPRSSEL_PRSCH2 (_LEUART_INPUT_RXPRSSEL_PRSCH2 << 0) /**< Shifted mode PRSCH2 for LEUART_INPUT */
\r
686 #define LEUART_INPUT_RXPRSSEL_PRSCH3 (_LEUART_INPUT_RXPRSSEL_PRSCH3 << 0) /**< Shifted mode PRSCH3 for LEUART_INPUT */
\r
687 #define LEUART_INPUT_RXPRSSEL_PRSCH4 (_LEUART_INPUT_RXPRSSEL_PRSCH4 << 0) /**< Shifted mode PRSCH4 for LEUART_INPUT */
\r
688 #define LEUART_INPUT_RXPRSSEL_PRSCH5 (_LEUART_INPUT_RXPRSSEL_PRSCH5 << 0) /**< Shifted mode PRSCH5 for LEUART_INPUT */
\r
689 #define LEUART_INPUT_RXPRSSEL_PRSCH6 (_LEUART_INPUT_RXPRSSEL_PRSCH6 << 0) /**< Shifted mode PRSCH6 for LEUART_INPUT */
\r
690 #define LEUART_INPUT_RXPRSSEL_PRSCH7 (_LEUART_INPUT_RXPRSSEL_PRSCH7 << 0) /**< Shifted mode PRSCH7 for LEUART_INPUT */
\r
691 #define LEUART_INPUT_RXPRSSEL_PRSCH8 (_LEUART_INPUT_RXPRSSEL_PRSCH8 << 0) /**< Shifted mode PRSCH8 for LEUART_INPUT */
\r
692 #define LEUART_INPUT_RXPRSSEL_PRSCH9 (_LEUART_INPUT_RXPRSSEL_PRSCH9 << 0) /**< Shifted mode PRSCH9 for LEUART_INPUT */
\r
693 #define LEUART_INPUT_RXPRSSEL_PRSCH10 (_LEUART_INPUT_RXPRSSEL_PRSCH10 << 0) /**< Shifted mode PRSCH10 for LEUART_INPUT */
\r
694 #define LEUART_INPUT_RXPRSSEL_PRSCH11 (_LEUART_INPUT_RXPRSSEL_PRSCH11 << 0) /**< Shifted mode PRSCH11 for LEUART_INPUT */
\r
695 #define LEUART_INPUT_RXPRS (0x1UL << 4) /**< PRS RX Enable */
\r
696 #define _LEUART_INPUT_RXPRS_SHIFT 4 /**< Shift value for LEUART_RXPRS */
\r
697 #define _LEUART_INPUT_RXPRS_MASK 0x10UL /**< Bit mask for LEUART_RXPRS */
\r
698 #define _LEUART_INPUT_RXPRS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_INPUT */
\r
699 #define LEUART_INPUT_RXPRS_DEFAULT (_LEUART_INPUT_RXPRS_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_INPUT */
\r
701 /** @} End of group EFM32GG_LEUART */
\r
702 /** @} End of group Parts */
\r
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