1 /******************************************************************************
3 * Copyright (C) 2014 Xilinx, Inc. All rights reserved.
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31 ******************************************************************************/
32 /*****************************************************************************/
35 * @file xplatform_info.c
37 * This file contains information about hardware for which the code is built
40 * MODIFICATION HISTORY:
42 * Ver Who Date Changes
43 * ----- ---- -------- -------------------------------------------------------
44 * 5.00 pkp 12/15/14 Initial release
47 ******************************************************************************/
49 /***************************** Include Files *********************************/
51 #include "xil_types.h"
52 #include "xplatform_info.h"
54 /************************** Constant Definitions *****************************/
56 /**************************** Type Definitions *******************************/
58 /***************** Macros (Inline Functions) Definitions *********************/
60 /************************** Variable Definitions *****************************/
63 /************************** Function Prototypes ******************************/
65 /*****************************************************************************/
68 * This API is used to provide information about platform
72 * @return The information about platform defined in xplatform_info.h
76 ******************************************************************************/
77 u32 XGetPlatform_Info()
80 #if defined (ARMR5) || (__aarch64__)
81 return XPLAT_ZYNQ_ULTRA_MP;
82 #elif (__microblaze__)
83 return XPLAT_MICROBLAZE;
89 /*****************************************************************************/
92 * This API is used to provide information about zynq ultrascale MP platform
96 * @return The information about zynq ultrascale MP platform defined in
101 ******************************************************************************/
102 #if defined (ARMR5) || (__aarch64__)
103 u32 XGet_Zynq_UltraMp_Platform_info()
106 reg = ((Xil_In32(XPAR_CSU_BASEADDR + XPAR_CSU_VER_OFFSET) >> 12U )& XPLAT_INFO_MASK);