1 /******************************************************************************
3 * Copyright (C) 2014 Xilinx, Inc. All rights reserved.
5 * Permission is hereby granted, free of charge, to any person obtaining a copy
6 * of this software and associated documentation files (the "Software"), to deal
7 * in the Software without restriction, including without limitation the rights
8 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9 * copies of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
15 * Use of the Software is limited solely to applications:
16 * (a) running on a Xilinx device, or
17 * (b) that interact with a Xilinx device through a bus or interconnect.
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
23 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
24 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
27 * Except as contained in this notice, the name of the Xilinx shall not be used
28 * in advertising or otherwise to promote the sale, use or other dealings in
29 * this Software without prior written authorization from Xilinx.
31 ******************************************************************************/
32 /*****************************************************************************/
37 * This file contains the interface for the general IO component, which
38 * encapsulates the Input/Output functions for processors that do not
39 * require any special I/O handling.
43 * MODIFICATION HISTORY:
45 * Ver Who Date Changes
46 * ----- -------- -------- -----------------------------------------------
47 * 5.00 pkp 05/29/14 First release
49 ******************************************************************************/
51 #ifndef XIL_IO_H /* prevent circular inclusions */
52 #define XIL_IO_H /* by using protection macros */
58 /***************************** Include Files *********************************/
60 #include "xil_types.h"
61 #include "xpseudo_asm.h"
62 #include "xil_printf.h"
64 /************************** Constant Definitions *****************************/
66 /**************************** Type Definitions *******************************/
68 /***************** Macros (Inline Functions) Definitions *********************/
70 # define SYNCHRONIZE_IO dmb()
71 # define INST_SYNC isb()
72 # define DATA_SYNC dsb()
75 /*****************************************************************************/
78 * Perform an big-endian input operation for a 16-bit memory location
79 * by reading from the specified address and returning the Value read from
82 * @param Addr contains the address to perform the input operation at.
84 * @return The Value read from the specified input address with the
85 * proper endianness. The return Value has the same endianness
86 * as that of the processor, i.e. if the processor is
87 * little-engian, the return Value is the byte-swapped Value read
92 ******************************************************************************/
93 #define Xil_In16LE(Addr) Xil_In16((Addr))
95 /*****************************************************************************/
98 * Perform a big-endian input operation for a 32-bit memory location
99 * by reading from the specified address and returning the Value read from
102 * @param Addr contains the address to perform the input operation at.
104 * @return The Value read from the specified input address with the
105 * proper endianness. The return Value has the same endianness
106 * as that of the processor, i.e. if the processor is
107 * little-engian, the return Value is the byte-swapped Value read
113 ******************************************************************************/
114 #define Xil_In32LE(Addr) Xil_In32((Addr))
116 /*****************************************************************************/
119 * Perform a big-endian output operation for a 16-bit memory location
120 * by writing the specified Value to the specified address.
122 * @param Addr contains the address to perform the output operation at.
123 * @param Value contains the Value to be output at the specified address.
124 * The Value has the same endianness as that of the processor.
125 * If the processor is little-endian, the byte-swapped Value is
126 * written to the address.
133 ******************************************************************************/
134 #define Xil_Out16LE(Addr, Value) Xil_Out16((Addr), (Value))
136 /*****************************************************************************/
139 * Perform a big-endian output operation for a 32-bit memory location
140 * by writing the specified Value to the specified address.
142 * @param Addr contains the address to perform the output operation at.
143 * @param Value contains the Value to be output at the specified address.
144 * The Value has the same endianness as that of the processor.
145 * If the processor is little-endian, the byte-swapped Value is
146 * written to the address.
152 ******************************************************************************/
153 #define Xil_Out32LE(Addr, Value) Xil_Out32((Addr), (Value))
155 /*****************************************************************************/
158 * Convert a 32-bit number from host byte order to network byte order.
160 * @param Data the 32-bit number to be converted.
162 * @return The converted 32-bit number in network byte order.
166 ******************************************************************************/
167 #define Xil_Htonl(Data) Xil_EndianSwap32((Data))
169 /*****************************************************************************/
172 * Convert a 16-bit number from host byte order to network byte order.
174 * @param Data the 16-bit number to be converted.
176 * @return The converted 16-bit number in network byte order.
180 ******************************************************************************/
181 #define Xil_Htons(Data) Xil_EndianSwap16((Data))
183 /*****************************************************************************/
186 * Convert a 32-bit number from network byte order to host byte order.
188 * @param Data the 32-bit number to be converted.
190 * @return The converted 32-bit number in host byte order.
194 ******************************************************************************/
195 #define Xil_Ntohl(Data) Xil_EndianSwap32((Data))
197 /*****************************************************************************/
200 * Convert a 16-bit number from network byte order to host byte order.
202 * @param Data the 16-bit number to be converted.
204 * @return The converted 16-bit number in host byte order.
208 ******************************************************************************/
209 #define Xil_Ntohs(Data) Xil_EndianSwap16((Data))
211 /************************** Function Prototypes ******************************/
213 /* The following functions allow the software to be transportable across
214 * processors which may use memory mapped I/O or I/O which is mapped into a
215 * seperate address space.
217 u8 Xil_In8(INTPTR Addr);
218 u16 Xil_In16(INTPTR Addr);
219 u32 Xil_In32(INTPTR Addr);
220 u64 Xil_In64(INTPTR Addr);
222 void Xil_Out8(INTPTR Addr, u8 Value);
223 void Xil_Out16(INTPTR Addr, u16 Value);
224 void Xil_Out32(INTPTR Addr, u32 Value);
225 void Xil_Out64(INTPTR Addr, u64 Value);
228 u16 Xil_In16BE(INTPTR Addr);
229 u32 Xil_In32BE(INTPTR Addr);
230 void Xil_Out16BE(INTPTR Addr, u16 Value);
231 void Xil_Out32BE(INTPTR Addr, u32 Value);
233 u16 Xil_EndianSwap16(u16 Data);
234 u32 Xil_EndianSwap32(u32 Data);
240 #endif /* end of protection macro */