1 /**********************************************************************
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2 * $Id$ lpc18xx_uart.c 2011-06-02
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4 * @file lpc18xx_uart.c
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5 * @brief Contains all functions support for UART firmware library on LPC18xx
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7 * @date 02. June. 2011
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8 * @author NXP MCU SW Application Team
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10 * Copyright(C) 2011, NXP Semiconductor
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11 * All rights reserved.
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13 ***********************************************************************
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14 * Software that is described herein is for illustrative purposes only
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15 * which provides customers with programming information regarding the
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16 * products. This software is supplied "AS IS" without any warranties.
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17 * NXP Semiconductors assumes no responsibility or liability for the
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18 * use of the software, conveys no license or title under any patent,
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19 * copyright, or mask work right to the product. NXP Semiconductors
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20 * reserves the right to make changes in the software without
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21 * notification. NXP Semiconductors also make no representation or
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22 * warranty that such application will be suitable for the specified
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23 * use without further testing or modification.
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24 **********************************************************************/
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26 /* Peripheral group ----------------------------------------------------------- */
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27 /** @addtogroup UART
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31 /* Includes ------------------------------------------------------------------- */
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32 #include "lpc18xx_uart.h"
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33 #include "lpc18xx_cgu.h"
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35 /* If this source file built with example, the LPC18xx FW library configuration
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36 * file in each example directory ("lpc18xx_libcfg.h") must be included,
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37 * otherwise the default FW library configuration file must be included instead
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39 #ifdef __BUILD_WITH_EXAMPLE__
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40 #include "lpc18xx_libcfg.h"
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42 #include "lpc18xx_libcfg_default.h"
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43 #endif /* __BUILD_WITH_EXAMPLE__ */
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48 /* Private Functions ---------------------------------------------------------- */
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50 static Status uart_set_divisors(LPC_USARTn_Type *UARTx, uint32_t baudrate);
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53 /*********************************************************************//**
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54 * @brief Determines best dividers to get a target clock rate
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55 * @param[in] UARTx Pointer to selected UART peripheral, should be:
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56 * - LPC_UART0 :UART0 peripheral
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57 * - LPC_UART1 :UART1 peripheral
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58 * - LPC_UART2 :UART2 peripheral
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59 * - LPC_UART3 :UART3 peripheral
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60 * @param[in] baudrate Desired UART baud rate.
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61 * @return Error status, could be:
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64 **********************************************************************/
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65 static Status uart_set_divisors(LPC_USARTn_Type *UARTx, uint32_t baudrate)
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67 Status errorStatus = ERROR;
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70 uint32_t d, m, bestd, bestm, tmp;
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71 uint64_t best_divisor, divisor;
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72 uint32_t current_error, best_error;
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73 uint32_t recalcbaud;
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75 /* get UART block clock */
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76 //to be defined uClk = CGU_GetCLK(CGU_CLKTYPE_PER);
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78 if(UARTx == LPC_USART0)
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80 uClk = CGU_GetPCLKFrequency(CGU_PERIPHERAL_UART0);
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85 if(((LPC_UART1_Type *)UARTx) == LPC_UART1)
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87 uClk = CGU_GetPCLKFrequency(CGU_PERIPHERAL_UART1);
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92 if(UARTx == LPC_USART2)
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94 uClk = CGU_GetPCLKFrequency(CGU_PERIPHERAL_UART2);
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99 if(UARTx == LPC_USART3)
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101 uClk = CGU_GetPCLKFrequency(CGU_PERIPHERAL_UART3);
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105 /* In the Uart IP block, baud rate is calculated using FDR and DLL-DLM registers
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107 * BaudRate= uClk * (mulFracDiv/(mulFracDiv+dividerAddFracDiv) / (16 * (DLL)
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108 * It involves floating point calculations. That's the reason the formulae are adjusted with
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109 * Multiply and divide method.*/
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110 /* The value of mulFracDiv and dividerAddFracDiv should comply to the following expressions:
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111 * 0 < mulFracDiv <= 15, 0 <= dividerAddFracDiv <= 15 */
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112 best_error = 0xFFFFFFFF; /* Worst case */
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116 for (m = 1 ; m <= 15 ;m++)
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118 for (d = 0 ; d < m ; d++)
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120 divisor = ((uint64_t)uClk<<28)*m/(baudrate*(m+d));
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121 current_error = divisor & 0xFFFFFFFF;
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126 if(current_error > ((uint32_t)1<<31)){
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127 current_error = -current_error;
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131 if(tmp<1 || tmp>65536) /* Out of range */
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134 if( current_error < best_error){
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135 best_error = current_error;
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136 best_divisor = tmp;
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139 if(best_error == 0) break;
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141 } /* end of inner for loop */
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143 if (best_error == 0)
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145 } /* end of outer for loop */
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147 if(best_divisor == 0) return ERROR; /* can not find best match */
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149 recalcbaud = (uClk>>4) * bestm/(best_divisor * (bestm + bestd));
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151 /* reuse best_error to evaluate baud error*/
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152 if(baudrate>recalcbaud) best_error = baudrate - recalcbaud;
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153 else best_error = recalcbaud -baudrate;
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155 best_error = best_error * 100 / baudrate;
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157 if (best_error < UART_ACCEPTED_BAUDRATE_ERROR)
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159 if (((LPC_UART1_Type *)UARTx) == LPC_UART1)
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161 ((LPC_UART1_Type *)UARTx)->LCR |= UART_LCR_DLAB_EN;
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162 ((LPC_UART1_Type *)UARTx)->/*DLIER.*/DLM = UART_LOAD_DLM(best_divisor);
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163 ((LPC_UART1_Type *)UARTx)->/*RBTHDLR.*/DLL = UART_LOAD_DLL(best_divisor);
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164 /* Then reset DLAB bit */
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165 ((LPC_UART1_Type *)UARTx)->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK;
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166 ((LPC_UART1_Type *)UARTx)->FDR = (UART_FDR_MULVAL(bestm) \
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167 | UART_FDR_DIVADDVAL(bestd)) & UART_FDR_BITMASK;
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171 UARTx->LCR |= UART_LCR_DLAB_EN;
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172 UARTx->/*DLIER.*/DLM = UART_LOAD_DLM(best_divisor);
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173 UARTx->/*RBTHDLR.*/DLL = UART_LOAD_DLL(best_divisor);
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174 /* Then reset DLAB bit */
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175 UARTx->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK;
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176 UARTx->FDR = (UART_FDR_MULVAL(bestm) \
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177 | UART_FDR_DIVADDVAL(bestd)) & UART_FDR_BITMASK;
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179 errorStatus = SUCCESS;
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182 return errorStatus;
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185 /* End of Private Functions ---------------------------------------------------- */
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188 /* Public Functions ----------------------------------------------------------- */
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189 /** @addtogroup UART_Public_Functions
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192 /* UART Init/DeInit functions -------------------------------------------------*/
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193 /********************************************************************//**
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194 * @brief Initializes the UARTx peripheral according to the specified
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195 * parameters in the UART_ConfigStruct.
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196 * @param[in] UARTx UART peripheral selected, should be:
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197 * - LPC_UART0 :UART0 peripheral
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198 * - LPC_UART1 :UART1 peripheral
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199 * - LPC_UART2 :UART2 peripheral
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200 * - LPC_UART3 :UART3 peripheral
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201 * @param[in] UART_ConfigStruct Pointer to a UART_CFG_Type structure
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202 * that contains the configuration information for the
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203 * specified UART peripheral.
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205 *********************************************************************/
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206 void UART_Init(LPC_USARTn_Type *UARTx, UART_CFG_Type *UART_ConfigStruct)
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211 CHECK_PARAM(PARAM_UARTx(UARTx));
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212 CHECK_PARAM(PARAM_UART_DATABIT(UART_ConfigStruct->Databits));
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213 CHECK_PARAM(PARAM_UART_STOPBIT(UART_ConfigStruct->Stopbits));
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214 CHECK_PARAM(PARAM_UART_PARITY(UART_ConfigStruct->Parity));
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217 if(UARTx == LPC_USART0)
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219 /* Set up peripheral clock for UART0 module */
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220 //LPC_CGU->BASE_UART0_CLK = (SRC_PL160M_0<<24) | (1<<11); // Use PLL1 and auto block
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221 CGU_EntityConnect(CGU_CLKSRC_XTAL_OSC, CGU_BASE_UART0);
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226 if(((LPC_UART1_Type *)UARTx) == LPC_UART1)
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228 /* Set up peripheral clock for UART1 module */
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229 //LPC_CGU->BASE_UART1_CLK = (SRC_PL160M_0<<24) | (1<<11); // Use PLL1 and auto block
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230 CGU_EntityConnect(CGU_CLKSRC_PLL1, CGU_BASE_UART1);
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235 if(UARTx == LPC_USART2)
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237 /* Set up peripheral clock for UART2 module */
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238 //LPC_CGU->BASE_UART2_CLK = (SRC_PL160M_0<<24) | (1<<11); // Use PLL1 and auto block
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239 CGU_EntityConnect(CGU_CLKSRC_XTAL_OSC, CGU_BASE_UART2);
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244 if(UARTx == LPC_USART3)
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246 /* Set up peripheral clock for UART3 module */
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247 //LPC_CGU->BASE_UART3_CLK = (SRC_PL160M_0<<24) | (1<<11); // Use PLL1 and auto block
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248 CGU_EntityConnect(CGU_CLKSRC_XTAL_OSC, CGU_BASE_UART3);
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252 if (((LPC_UART1_Type *)UARTx) == LPC_UART1)
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254 /* FIFOs are empty */
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255 ((LPC_UART1_Type *)UARTx)->/*IIFCR.*/FCR = ( UART_FCR_FIFO_EN \
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256 | UART_FCR_RX_RS | UART_FCR_TX_RS);
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258 ((LPC_UART1_Type *)UARTx)->/*IIFCR.*/FCR = 0;
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261 while (((LPC_UART1_Type *)UARTx)->LSR & UART_LSR_RDR)
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263 tmp = ((LPC_UART1_Type *)UARTx)->/*RBTHDLR.*/RBR;
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266 ((LPC_UART1_Type *)UARTx)->TER = UART1_TER_TXEN;
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267 // Wait for current transmit complete
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268 while (!(((LPC_UART1_Type *)UARTx)->LSR & UART_LSR_THRE));
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270 ((LPC_UART1_Type *)UARTx)->TER = 0;
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272 // Disable interrupt
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273 ((LPC_UART1_Type *)UARTx)->/*DLIER.*/IER = 0;
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274 // Set LCR to default state
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275 ((LPC_UART1_Type *)UARTx)->LCR = 0;
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276 // Set ACR to default state
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277 ((LPC_UART1_Type *)UARTx)->ACR = 0;
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278 // Set Modem Control to default state
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279 ((LPC_UART1_Type *)UARTx)->MCR = 0;
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280 // Set RS485 control to default state
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281 ((LPC_UART1_Type *)UARTx)->RS485CTRL = 0;
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282 // Set RS485 delay timer to default state
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283 ((LPC_UART1_Type *)UARTx)->RS485DLY = 0;
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284 // Set RS485 addr match to default state
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285 ((LPC_UART1_Type *)UARTx)->RS485ADRMATCH = 0;
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286 //Dummy Reading to Clear Status
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287 tmp = ((LPC_UART1_Type *)UARTx)->MSR;
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288 tmp = ((LPC_UART1_Type *)UARTx)->LSR;
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292 /* FIFOs are empty */
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293 UARTx->/*IIFCR.*/FCR = ( UART_FCR_FIFO_EN | UART_FCR_RX_RS | UART_FCR_TX_RS);
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295 UARTx->/*IIFCR.*/FCR = 0;
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298 while (UARTx->LSR & UART_LSR_RDR)
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300 tmp = UARTx->/*RBTHDLR.*/RBR;
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303 UARTx->TER = UART0_2_3_TER_TXEN;
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304 // Wait for current transmit complete
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305 while (!(UARTx->LSR & UART_LSR_THRE));
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309 // Disable interrupt
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310 UARTx->/*DLIER.*/IER = 0;
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311 // Set LCR to default state
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313 // Set ACR to default state
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315 // set HDEN to default state
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317 // set SCICTRL to default state
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318 UARTx->SCICTRL = 0;
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319 // set SYNCCTRL to default state
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320 UARTx->SYNCCTRL =0;
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321 // Set RS485 control to default state
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322 UARTx->RS485CTRL = 0;
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323 // Set RS485 delay timer to default state
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324 UARTx->RS485DLY = 0;
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325 // Set RS485 addr match to default state
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326 UARTx->RS485ADRMATCH = 0;
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331 if (UARTx == LPC_USART3)
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333 // Set IrDA to default state
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337 // Set Line Control register ----------------------------
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339 uart_set_divisors(UARTx, (UART_ConfigStruct->Baud_rate));
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341 if (((LPC_UART1_Type *)UARTx) == LPC_UART1)
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343 tmp = (((LPC_UART1_Type *)UARTx)->LCR & (UART_LCR_DLAB_EN | UART_LCR_BREAK_EN)) \
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344 & UART_LCR_BITMASK;
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348 tmp = (UARTx->LCR & (UART_LCR_DLAB_EN | UART_LCR_BREAK_EN)) & UART_LCR_BITMASK;
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351 switch (UART_ConfigStruct->Databits){
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352 case UART_DATABIT_5:
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353 tmp |= UART_LCR_WLEN5;
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355 case UART_DATABIT_6:
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356 tmp |= UART_LCR_WLEN6;
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358 case UART_DATABIT_7:
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359 tmp |= UART_LCR_WLEN7;
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361 case UART_DATABIT_8:
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363 tmp |= UART_LCR_WLEN8;
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367 if (UART_ConfigStruct->Parity == UART_PARITY_NONE)
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373 tmp |= UART_LCR_PARITY_EN;
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374 switch (UART_ConfigStruct->Parity)
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376 case UART_PARITY_ODD:
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377 tmp |= UART_LCR_PARITY_ODD;
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380 case UART_PARITY_EVEN:
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381 tmp |= UART_LCR_PARITY_EVEN;
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384 case UART_PARITY_SP_1:
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385 tmp |= UART_LCR_PARITY_F_1;
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388 case UART_PARITY_SP_0:
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389 tmp |= UART_LCR_PARITY_F_0;
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396 switch (UART_ConfigStruct->Stopbits){
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397 case UART_STOPBIT_2:
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398 tmp |= UART_LCR_STOPBIT_SEL;
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400 case UART_STOPBIT_1:
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407 // Write back to LCR, configure FIFO and Disable Tx
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408 if (((LPC_UART1_Type *)UARTx) == LPC_UART1)
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410 ((LPC_UART1_Type *)UARTx)->LCR = (uint8_t)(tmp & UART_LCR_BITMASK);
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414 UARTx->LCR = (uint8_t)(tmp & UART_LCR_BITMASK);
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418 /*********************************************************************//**
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419 * @brief De-initializes the UARTx peripheral registers to their
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420 * default reset values.
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421 * @param[in] UARTx UART peripheral selected, should be:
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422 * - LPC_UART0 :UART0 peripheral
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423 * - LPC_UART1 :UART1 peripheral
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424 * - LPC_UART2 :UART2 peripheral
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425 * - LPC_UART3 :UART3 peripheral
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427 **********************************************************************/
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428 void UART_DeInit(LPC_USARTn_Type* UARTx)
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431 CHECK_PARAM(PARAM_UARTx(UARTx));
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433 UART_TxCmd(UARTx, DISABLE);
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436 if (UARTx == LPC_USART0)
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438 /* Set up peripheral clock for UART0 module */
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439 //LPC_CGU->BASE_UART0_CLK = (SRC_PL160M_1<<24) | (1<<11); // base SRC_PL160M_1 is not configured, so no clk out
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444 if (((LPC_UART1_Type *)UARTx) == LPC_UART1)
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446 /* Set up peripheral clock for UART1 module */
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447 //LPC_CGU->BASE_UART1_CLK = (SRC_PL160M_1<<24) | (1<<11); // base SRC_PL160M_1 is not configured, so no clk out
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452 if (UARTx == LPC_USART2)
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454 /* Set up peripheral clock for UART2 module */
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455 //LPC_CGU->BASE_UART2_CLK = (SRC_PL160M_1<<24) | (1<<11); // base SRC_PL160M_1 is not configured, so no clk out
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460 if (UARTx == LPC_USART3)
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462 /* Set up peripheral clock for UART3 module */
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463 //LPC_CGU->BASE_UART3_CLK = (SRC_PL160M_1<<24) | (1<<11); // base SRC_PL160M_1 is not configured, so no clk out
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468 /*****************************************************************************//**
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469 * @brief Fills each UART_InitStruct member with its default value:
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474 * @param[in] UART_InitStruct Pointer to a UART_CFG_Type structure which will
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477 *******************************************************************************/
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478 void UART_ConfigStructInit(UART_CFG_Type *UART_InitStruct)
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480 UART_InitStruct->Baud_rate = 9600;
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481 UART_InitStruct->Databits = UART_DATABIT_8;
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482 UART_InitStruct->Parity = UART_PARITY_NONE;
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483 UART_InitStruct->Stopbits = UART_STOPBIT_1;
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486 /* UART Send/Recieve functions -------------------------------------------------*/
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487 /*********************************************************************//**
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488 * @brief Transmit a single data through UART peripheral
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489 * @param[in] UARTx UART peripheral selected, should be:
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490 * - LPC_UART0 :UART0 peripheral
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491 * - LPC_UART1 :UART1 peripheral
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492 * - LPC_UART2 :UART2 peripheral
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493 * - LPC_UART3 :UART3 peripheral
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494 * @param[in] Data Data to transmit (must be 8-bit long)
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496 **********************************************************************/
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497 void UART_SendByte(LPC_USARTn_Type* UARTx, uint8_t Data)
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499 CHECK_PARAM(PARAM_UARTx(UARTx));
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501 if (((LPC_UART1_Type *)UARTx) == LPC_UART1)
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503 ((LPC_UART1_Type *)UARTx)->/*RBTHDLR.*/THR = Data & UART_THR_MASKBIT;
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507 UARTx->/*RBTHDLR.*/THR = Data & UART_THR_MASKBIT;
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513 /*********************************************************************//**
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514 * @brief Receive a single data from UART peripheral
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515 * @param[in] UARTx UART peripheral selected, should be:
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516 * - LPC_UART0 :UART0 peripheral
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517 * - LPC_UART1 :UART1 peripheral
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518 * - LPC_UART2 :UART2 peripheral
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519 * - LPC_UART3 :UART3 peripheral
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520 * @return Data received
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521 **********************************************************************/
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522 uint8_t UART_ReceiveByte(LPC_USARTn_Type* UARTx)
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524 CHECK_PARAM(PARAM_UARTx(UARTx));
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526 if (((LPC_UART1_Type *)UARTx) == LPC_UART1)
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528 return (((LPC_UART1_Type *)UARTx)->/*RBTHDLR.*/RBR & UART_RBR_MASKBIT);
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532 return (UARTx->/*RBTHDLR.*/RBR & UART_RBR_MASKBIT);
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536 /*********************************************************************//**
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537 * @brief Send a block of data via UART peripheral
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538 * @param[in] UARTx Selected UART peripheral used to send data, should be:
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539 * - LPC_UART0 :UART0 peripheral
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540 * - LPC_UART1 :UART1 peripheral
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541 * - LPC_UART2 :UART2 peripheral
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542 * - LPC_UART3 :UART3 peripheral
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543 * @param[in] txbuf Pointer to Transmit buffer
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544 * @param[in] buflen Length of Transmit buffer
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545 * @param[in] flag Flag used in UART transfer, should be
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548 * @return Number of bytes sent.
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550 * Note: when using UART in BLOCKING mode, a time-out condition is used
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551 * via defined symbol UART_BLOCKING_TIMEOUT.
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552 **********************************************************************/
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553 uint32_t UART_Send(LPC_USARTn_Type *UARTx, uint8_t *txbuf,
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554 uint32_t buflen, TRANSFER_BLOCK_Type flag)
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556 uint32_t bToSend, bSent, timeOut, fifo_cnt;
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557 uint8_t *pChar = txbuf;
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562 if (flag == BLOCKING) {
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565 timeOut = UART_BLOCKING_TIMEOUT;
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566 // Wait for THR empty with timeout
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567 while (!(UARTx->LSR & UART_LSR_THRE)) {
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568 if (timeOut == 0) break;
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572 if(timeOut == 0) break;
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573 fifo_cnt = UART_TX_FIFO_SIZE;
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574 while (fifo_cnt && bToSend){
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575 UART_SendByte(UARTx, (*pChar++));
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582 // None blocking mode
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586 if (!(UARTx->LSR & UART_LSR_THRE)){
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589 fifo_cnt = UART_TX_FIFO_SIZE;
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590 while (fifo_cnt && bToSend) {
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591 UART_SendByte(UARTx, (*pChar++));
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601 /*********************************************************************//**
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602 * @brief Receive a block of data via UART peripheral
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603 * @param[in] UARTx Selected UART peripheral used to send data,
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605 * - LPC_UART0 :UART0 peripheral
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606 * - LPC_UART1 :UART1 peripheral
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607 * - LPC_UART2 :UART2 peripheral
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608 * - LPC_UART3 :UART3 peripheral
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609 * @param[out] rxbuf Pointer to Received buffer
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610 * @param[in] buflen Length of Received buffer
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611 * @param[in] flag Flag mode, should be:
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614 * @return Number of bytes received
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616 * Note: when using UART in BLOCKING mode, a time-out condition is used
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617 * via defined symbol UART_BLOCKING_TIMEOUT.
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618 **********************************************************************/
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619 uint32_t UART_Receive(LPC_USARTn_Type *UARTx, uint8_t *rxbuf, \
\r
620 uint32_t buflen, TRANSFER_BLOCK_Type flag)
\r
622 uint32_t bToRecv, bRecv, timeOut;
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623 uint8_t *pChar = rxbuf;
\r
628 if (flag == BLOCKING) {
\r
631 timeOut = UART_BLOCKING_TIMEOUT;
\r
632 while (!(UARTx->LSR & UART_LSR_RDR)){
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633 if (timeOut == 0) break;
\r
637 if(timeOut == 0) break;
\r
638 // Get data from the buffer
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639 (*pChar++) = UART_ReceiveByte(UARTx);
\r
644 // None blocking mode
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648 if (!(UARTx->LSR & UART_LSR_RDR)) {
\r
651 (*pChar++) = UART_ReceiveByte(UARTx);
\r
660 /*********************************************************************//**
\r
661 * @brief Force BREAK character on UART line, output pin UARTx TXD is
\r
663 * @param[in] UARTx UART peripheral selected, should be:
\r
664 * - LPC_UART0 :UART0 peripheral
\r
665 * - LPC_UART1 :UART1 peripheral
\r
666 * - LPC_UART2 :UART2 peripheral
\r
667 * - LPC_UART3 :UART3 peripheral
\r
669 **********************************************************************/
\r
670 void UART_ForceBreak(LPC_USARTn_Type* UARTx)
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672 CHECK_PARAM(PARAM_UARTx(UARTx));
\r
674 if (((LPC_UART1_Type *)UARTx) == LPC_UART1)
\r
676 ((LPC_UART1_Type *)UARTx)->LCR |= UART_LCR_BREAK_EN;
\r
680 UARTx->LCR |= UART_LCR_BREAK_EN;
\r
685 /********************************************************************//**
\r
686 * @brief Enable or disable specified UART interrupt.
\r
687 * @param[in] UARTx UART peripheral selected, should be
\r
688 * - LPC_UART0 :UART0 peripheral
\r
689 * - LPC_UART1 :UART1 peripheral
\r
690 * - LPC_UART2 :UART2 peripheral
\r
691 * - LPC_UART3 :UART3 peripheral
\r
692 * @param[in] UARTIntCfg Specifies the interrupt flag,
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693 * should be one of the following:
\r
694 * - UART_INTCFG_RBR :RBR Interrupt enable
\r
695 * - UART_INTCFG_THRE :THR Interrupt enable
\r
696 * - UART_INTCFG_RLS :RX line status interrupt enable
\r
697 * - UART1_INTCFG_MS :Modem status interrupt enable (UART1 only)
\r
698 * - UART1_INTCFG_CTS :CTS1 signal transition interrupt enable (UART1 only)
\r
699 * - UART_INTCFG_ABEO :Enables the end of auto-baud interrupt
\r
700 * - UART_INTCFG_ABTO :Enables the auto-baud time-out interrupt
\r
701 * @param[in] NewState New state of specified UART interrupt type,
\r
703 * - ENALBE :Enable this UART interrupt type.
\r
704 * - DISALBE :Disable this UART interrupt type.
\r
706 *********************************************************************/
\r
707 void UART_IntConfig(LPC_USARTn_Type *UARTx, UART_INT_Type UARTIntCfg, FunctionalState NewState)
\r
711 CHECK_PARAM(PARAM_UARTx(UARTx));
\r
712 CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
\r
714 switch(UARTIntCfg){
\r
715 case UART_INTCFG_RBR:
\r
716 tmp = UART_IER_RBRINT_EN;
\r
718 case UART_INTCFG_THRE:
\r
719 tmp = UART_IER_THREINT_EN;
\r
721 case UART_INTCFG_RLS:
\r
722 tmp = UART_IER_RLSINT_EN;
\r
724 case UART1_INTCFG_MS:
\r
725 tmp = UART1_IER_MSINT_EN;
\r
727 case UART1_INTCFG_CTS:
\r
728 tmp = UART1_IER_CTSINT_EN;
\r
730 case UART_INTCFG_ABEO:
\r
731 tmp = UART_IER_ABEOINT_EN;
\r
733 case UART_INTCFG_ABTO:
\r
734 tmp = UART_IER_ABTOINT_EN;
\r
738 if ((LPC_UART1_Type *) UARTx == LPC_UART1)
\r
740 CHECK_PARAM((PARAM_UART_INTCFG(UARTIntCfg)) || (PARAM_UART1_INTCFG(UARTIntCfg)));
\r
744 CHECK_PARAM(PARAM_UART_INTCFG(UARTIntCfg));
\r
747 if (NewState == ENABLE)
\r
749 if ((LPC_UART1_Type *) UARTx == LPC_UART1)
\r
751 ((LPC_UART1_Type *)UARTx)->/*DLIER.*/IER |= tmp;
\r
755 UARTx->/*DLIER.*/IER |= tmp;
\r
760 if ((LPC_UART1_Type *) UARTx == LPC_UART1)
\r
762 ((LPC_UART1_Type *)UARTx)->/*DLIER.*/IER &= (~tmp) & UART1_IER_BITMASK;
\r
766 UARTx->/*DLIER.*/IER &= (~tmp) & UART_IER_BITMASK;
\r
772 /********************************************************************//**
\r
773 * @brief Get current value of Line Status register in UART peripheral.
\r
774 * @param[in] UARTx UART peripheral selected, should be:
\r
775 * - LPC_UART0 :UART0 peripheral
\r
776 * - LPC_UART1 :UART1 peripheral
\r
777 * - LPC_UART2 :UART2 peripheral
\r
778 * - LPC_UART3 :UART3 peripheral
\r
779 * @return Current value of Line Status register in UART peripheral.
\r
780 * Note: The return value of this function must be ANDed with each member in
\r
781 * UART_LS_Type enumeration to determine current flag status
\r
782 * corresponding to each Line status type. Because some flags in
\r
783 * Line Status register will be cleared after reading, the next reading
\r
784 * Line Status register could not be correct. So this function used to
\r
785 * read Line status register in one time only, then the return value
\r
786 * used to check all flags.
\r
787 *********************************************************************/
\r
788 uint8_t UART_GetLineStatus(LPC_USARTn_Type* UARTx)
\r
790 CHECK_PARAM(PARAM_UARTx(UARTx));
\r
792 if (((LPC_UART1_Type *)UARTx) == LPC_UART1)
\r
794 return ((((LPC_UART1_Type *)LPC_UART1)->LSR) & UART_LSR_BITMASK);
\r
798 return ((UARTx->LSR) & UART_LSR_BITMASK);
\r
802 /*********************************************************************//**
\r
803 * @brief Check whether if UART is busy or not
\r
804 * @param[in] UARTx UART peripheral selected, should be:
\r
805 * - LPC_UART0 :UART0 peripheral
\r
806 * - LPC_UART1 :UART1 peripheral
\r
807 * - LPC_UART2 :UART2 peripheral
\r
808 * - LPC_UART3 :UART3 peripheral
\r
809 * @return RESET if UART is not busy, otherwise return SET.
\r
810 **********************************************************************/
\r
811 FlagStatus UART_CheckBusy(LPC_USARTn_Type *UARTx)
\r
813 if (UARTx->LSR & UART_LSR_TEMT){
\r
821 /*********************************************************************//**
\r
822 * @brief Configure FIFO function on selected UART peripheral
\r
823 * @param[in] UARTx UART peripheral selected, should be:
\r
824 * - LPC_UART0 :UART0 peripheral
\r
825 * - LPC_UART1 :UART1 peripheral
\r
826 * - LPC_UART2 :UART2 peripheral
\r
827 * - LPC_UART3 :UART3 peripheral
\r
828 * @param[in] FIFOCfg Pointer to a UART_FIFO_CFG_Type Structure that
\r
829 * contains specified information about FIFO configuration
\r
831 **********************************************************************/
\r
832 void UART_FIFOConfig(LPC_USARTn_Type *UARTx, UART_FIFO_CFG_Type *FIFOCfg)
\r
836 CHECK_PARAM(PARAM_UARTx(UARTx));
\r
837 CHECK_PARAM(PARAM_UART_FIFO_LEVEL(FIFOCfg->FIFO_Level));
\r
838 CHECK_PARAM(PARAM_FUNCTIONALSTATE(FIFOCfg->FIFO_DMAMode));
\r
839 CHECK_PARAM(PARAM_FUNCTIONALSTATE(FIFOCfg->FIFO_ResetRxBuf));
\r
840 CHECK_PARAM(PARAM_FUNCTIONALSTATE(FIFOCfg->FIFO_ResetTxBuf));
\r
842 tmp |= UART_FCR_FIFO_EN;
\r
843 switch (FIFOCfg->FIFO_Level){
\r
844 case UART_FIFO_TRGLEV0:
\r
845 tmp |= UART_FCR_TRG_LEV0;
\r
847 case UART_FIFO_TRGLEV1:
\r
848 tmp |= UART_FCR_TRG_LEV1;
\r
850 case UART_FIFO_TRGLEV2:
\r
851 tmp |= UART_FCR_TRG_LEV2;
\r
853 case UART_FIFO_TRGLEV3:
\r
855 tmp |= UART_FCR_TRG_LEV3;
\r
859 if (FIFOCfg->FIFO_ResetTxBuf == ENABLE)
\r
861 tmp |= UART_FCR_TX_RS;
\r
863 if (FIFOCfg->FIFO_ResetRxBuf == ENABLE)
\r
865 tmp |= UART_FCR_RX_RS;
\r
867 if (FIFOCfg->FIFO_DMAMode == ENABLE)
\r
869 tmp |= UART_FCR_DMAMODE_SEL;
\r
873 //write to FIFO control register
\r
874 if (((LPC_UART1_Type *)UARTx) == LPC_UART1)
\r
876 ((LPC_UART1_Type *)UARTx)->/*IIFCR.*/FCR = tmp & UART_FCR_BITMASK;
\r
880 UARTx->/*IIFCR.*/FCR = tmp & UART_FCR_BITMASK;
\r
884 /*****************************************************************************//**
\r
885 * @brief Fills each UART_FIFOInitStruct member with its default value:
\r
886 * - FIFO_DMAMode = DISABLE
\r
887 * - FIFO_Level = UART_FIFO_TRGLEV0
\r
888 * - FIFO_ResetRxBuf = ENABLE
\r
889 * - FIFO_ResetTxBuf = ENABLE
\r
890 * - FIFO_State = ENABLE
\r
892 * @param[in] UART_FIFOInitStruct Pointer to a UART_FIFO_CFG_Type structure
\r
893 * which will be initialized.
\r
895 *******************************************************************************/
\r
896 void UART_FIFOConfigStructInit(UART_FIFO_CFG_Type *UART_FIFOInitStruct)
\r
898 UART_FIFOInitStruct->FIFO_DMAMode = DISABLE;
\r
899 UART_FIFOInitStruct->FIFO_Level = UART_FIFO_TRGLEV0;
\r
900 UART_FIFOInitStruct->FIFO_ResetRxBuf = ENABLE;
\r
901 UART_FIFOInitStruct->FIFO_ResetTxBuf = ENABLE;
\r
905 /*********************************************************************//**
\r
906 * @brief Start/Stop Auto Baudrate activity
\r
907 * @param[in] UARTx UART peripheral selected, should be
\r
908 * - LPC_UART0 :UART0 peripheral
\r
909 * - LPC_UART1 :UART1 peripheral
\r
910 * - LPC_UART2 :UART2 peripheral
\r
911 * - LPC_UART3 :UART3 peripheral
\r
912 * @param[in] ABConfigStruct A pointer to UART_AB_CFG_Type structure that
\r
913 * contains specified information about UART auto baudrate configuration
\r
914 * @param[in] NewState New State of Auto baudrate activity, should be:
\r
915 * - ENABLE :Start this activity
\r
916 * - DISABLE :Stop this activity
\r
917 * Note: Auto-baudrate mode enable bit will be cleared once this mode
\r
920 **********************************************************************/
\r
921 void UART_ABCmd(LPC_USARTn_Type *UARTx, UART_AB_CFG_Type *ABConfigStruct, \
\r
922 FunctionalState NewState)
\r
926 CHECK_PARAM(PARAM_UARTx(UARTx));
\r
927 CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
\r
930 if (NewState == ENABLE) {
\r
931 if (ABConfigStruct->ABMode == UART_AUTOBAUD_MODE1){
\r
932 tmp |= UART_ACR_MODE;
\r
934 if (ABConfigStruct->AutoRestart == ENABLE){
\r
935 tmp |= UART_ACR_AUTO_RESTART;
\r
939 if (((LPC_UART1_Type *)UARTx) == LPC_UART1)
\r
941 if (NewState == ENABLE)
\r
943 // Clear DLL and DLM value
\r
944 ((LPC_UART1_Type *)UARTx)->LCR |= UART_LCR_DLAB_EN;
\r
945 ((LPC_UART1_Type *)UARTx)->DLL = 0;
\r
946 ((LPC_UART1_Type *)UARTx)->DLM = 0;
\r
947 ((LPC_UART1_Type *)UARTx)->LCR &= ~UART_LCR_DLAB_EN;
\r
948 // FDR value must be reset to default value
\r
949 ((LPC_UART1_Type *)UARTx)->FDR = 0x10;
\r
950 ((LPC_UART1_Type *)UARTx)->ACR = UART_ACR_START | tmp;
\r
954 ((LPC_UART1_Type *)UARTx)->ACR = 0;
\r
959 if (NewState == ENABLE)
\r
961 // Clear DLL and DLM value
\r
962 UARTx->LCR |= UART_LCR_DLAB_EN;
\r
965 UARTx->LCR &= ~UART_LCR_DLAB_EN;
\r
966 // FDR value must be reset to default value
\r
968 UARTx->ACR = UART_ACR_START | tmp;
\r
978 /*********************************************************************//**
\r
979 * @brief Enable/Disable transmission on UART TxD pin
\r
980 * @param[in] UARTx UART peripheral selected, should be:
\r
981 * - LPC_UART0 :UART0 peripheral
\r
982 * - LPC_UART1 :UART1 peripheral
\r
983 * - LPC_UART2 :UART2 peripheral
\r
984 * - LPC_UART3 :UART3 peripheral
\r
985 * @param[in] NewState New State of Tx transmission function, should be:
\r
986 * - ENABLE :Enable this function
\r
987 - DISABLE :Disable this function
\r
989 **********************************************************************/
\r
990 void UART_TxCmd(LPC_USARTn_Type *UARTx, FunctionalState NewState)
\r
992 CHECK_PARAM(PARAM_UARTx(UARTx));
\r
993 CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
\r
995 if (NewState == ENABLE)
\r
997 if (((LPC_UART1_Type *)UARTx) == LPC_UART1)
\r
999 ((LPC_UART1_Type *)UARTx)->TER |= UART1_TER_TXEN;
\r
1003 UARTx->TER |= UART0_2_3_TER_TXEN;
\r
1008 if (((LPC_UART1_Type *)UARTx) == LPC_UART1)
\r
1010 ((LPC_UART1_Type *)UARTx)->TER &= (~UART1_TER_TXEN) & UART1_TER_BITMASK;
\r
1014 UARTx->TER &= (~UART0_2_3_TER_TXEN) & UART0_2_3_TER_BITMASK;
\r
1019 /* UART IrDA functions ---------------------------------------------------*/
\r
1023 /*********************************************************************//**
\r
1024 * @brief Enable or disable inverting serial input function of IrDA
\r
1025 * on UART peripheral.
\r
1026 * @param[in] UARTx UART peripheral selected, should be LPC_UART3 (only)
\r
1027 * @param[in] NewState New state of inverting serial input, should be:
\r
1028 * - ENABLE :Enable this function.
\r
1029 * - DISABLE :Disable this function.
\r
1031 **********************************************************************/
\r
1032 void UART_IrDAInvtInputCmd(LPC_USARTn_Type* UARTx, FunctionalState NewState)
\r
1034 CHECK_PARAM(PARAM_UART_IrDA(UARTx));
\r
1035 CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
\r
1037 if (NewState == ENABLE)
\r
1039 UARTx->ICR |= UART_ICR_IRDAINV;
\r
1041 else if (NewState == DISABLE)
\r
1043 UARTx->ICR &= (~UART_ICR_IRDAINV) & UART_ICR_BITMASK;
\r
1048 /*********************************************************************//**
\r
1049 * @brief Enable or disable IrDA function on UART peripheral.
\r
1050 * @param[in] UARTx UART peripheral selected, should be LPC_UART3 (only)
\r
1051 * @param[in] NewState New state of IrDA function, should be:
\r
1052 * - ENABLE :Enable this function.
\r
1053 * - DISABLE :Disable this function.
\r
1055 **********************************************************************/
\r
1056 void UART_IrDACmd(LPC_USARTn_Type* UARTx, FunctionalState NewState)
\r
1058 CHECK_PARAM(PARAM_UART_IrDA(UARTx));
\r
1059 CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
\r
1061 if (NewState == ENABLE)
\r
1063 UARTx->ICR |= UART_ICR_IRDAEN;
\r
1067 UARTx->ICR &= (~UART_ICR_IRDAEN) & UART_ICR_BITMASK;
\r
1072 /*********************************************************************//**
\r
1073 * @brief Configure Pulse divider for IrDA function on UART peripheral.
\r
1074 * @param[in] UARTx UART peripheral selected, should be LPC_UART3 (only)
\r
1075 * @param[in] PulseDiv Pulse Divider value from Peripheral clock,
\r
1076 * should be one of the following:
\r
1077 * - UART_IrDA_PULSEDIV2 :Pulse width = 2 * Tpclk
\r
1078 * - UART_IrDA_PULSEDIV4 :Pulse width = 4 * Tpclk
\r
1079 * - UART_IrDA_PULSEDIV8 :Pulse width = 8 * Tpclk
\r
1080 * - UART_IrDA_PULSEDIV16 :Pulse width = 16 * Tpclk
\r
1081 * - UART_IrDA_PULSEDIV32 :Pulse width = 32 * Tpclk
\r
1082 * - UART_IrDA_PULSEDIV64 :Pulse width = 64 * Tpclk
\r
1083 * - UART_IrDA_PULSEDIV128 :Pulse width = 128 * Tpclk
\r
1084 * - UART_IrDA_PULSEDIV256 :Pulse width = 256 * Tpclk
\r
1086 **********************************************************************/
\r
1087 void UART_IrDAPulseDivConfig(LPC_USARTn_Type *UARTx, UART_IrDA_PULSE_Type PulseDiv)
\r
1089 uint32_t tmp, tmp1;
\r
1090 CHECK_PARAM(PARAM_UART_IrDA(UARTx));
\r
1091 CHECK_PARAM(PARAM_UART_IrDA_PULSEDIV(PulseDiv));
\r
1093 tmp1 = UART_ICR_PULSEDIV(PulseDiv);
\r
1094 tmp = UARTx->ICR & (~UART_ICR_PULSEDIV(7));
\r
1095 tmp |= tmp1 | UART_ICR_FIXPULSE_EN;
\r
1096 UARTx->ICR = tmp & UART_ICR_BITMASK;
\r
1102 /* UART1 FullModem function ---------------------------------------------*/
\r
1106 /*********************************************************************//**
\r
1107 * @brief Force pin DTR/RTS corresponding to given state (Full modem mode)
\r
1108 * @param[in] UARTx LPC_UART1 (only)
\r
1109 * @param[in] Pin Pin that NewState will be applied to, should be:
\r
1110 * - UART1_MODEM_PIN_DTR :DTR pin.
\r
1111 * - UART1_MODEM_PIN_RTS :RTS pin.
\r
1112 * @param[in] NewState New State of DTR/RTS pin, should be:
\r
1113 * - INACTIVE :Force the pin to inactive signal.
\r
1114 - ACTIVE :Force the pin to active signal.
\r
1116 **********************************************************************/
\r
1117 void UART_FullModemForcePinState(LPC_UART1_Type *UARTx, UART_MODEM_PIN_Type Pin, \
\r
1118 UART1_SignalState NewState)
\r
1122 CHECK_PARAM(PARAM_UART1_MODEM(UARTx));
\r
1123 CHECK_PARAM(PARAM_UART1_MODEM_PIN(Pin));
\r
1124 CHECK_PARAM(PARAM_UART1_SIGNALSTATE(NewState));
\r
1127 case UART1_MODEM_PIN_DTR:
\r
1128 tmp = UART1_MCR_DTR_CTRL;
\r
1130 case UART1_MODEM_PIN_RTS:
\r
1131 tmp = UART1_MCR_RTS_CTRL;
\r
1137 if (NewState == ACTIVE){
\r
1138 UARTx->MCR |= tmp;
\r
1140 UARTx->MCR &= (~tmp) & UART1_MCR_BITMASK;
\r
1145 /*********************************************************************//**
\r
1146 * @brief Configure Full Modem mode for UART peripheral
\r
1147 * @param[in] UARTx LPC_UART1 (only)
\r
1148 * @param[in] Mode Full Modem mode, should be:
\r
1149 * - UART1_MODEM_MODE_LOOPBACK :Loop back mode.
\r
1150 * - UART1_MODEM_MODE_AUTO_RTS :Auto-RTS mode.
\r
1151 * - UART1_MODEM_MODE_AUTO_CTS :Auto-CTS mode.
\r
1152 * @param[in] NewState New State of this mode, should be:
\r
1153 * - ENABLE :Enable this mode.
\r
1154 - DISABLE :Disable this mode.
\r
1156 **********************************************************************/
\r
1157 void UART_FullModemConfigMode(LPC_UART1_Type *UARTx, UART_MODEM_MODE_Type Mode, \
\r
1158 FunctionalState NewState)
\r
1162 CHECK_PARAM(PARAM_UART1_MODEM(UARTx));
\r
1163 CHECK_PARAM(PARAM_UART1_MODEM_MODE(Mode));
\r
1164 CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
\r
1167 case UART1_MODEM_MODE_LOOPBACK:
\r
1168 tmp = UART1_MCR_LOOPB_EN;
\r
1170 case UART1_MODEM_MODE_AUTO_RTS:
\r
1171 tmp = UART1_MCR_AUTO_RTS_EN;
\r
1173 case UART1_MODEM_MODE_AUTO_CTS:
\r
1174 tmp = UART1_MCR_AUTO_CTS_EN;
\r
1180 if (NewState == ENABLE)
\r
1182 UARTx->MCR |= tmp;
\r
1186 UARTx->MCR &= (~tmp) & UART1_MCR_BITMASK;
\r
1191 /*********************************************************************//**
\r
1192 * @brief Get current status of modem status register
\r
1193 * @param[in] UARTx LPC_UART1 (only)
\r
1194 * @return Current value of modem status register
\r
1195 * Note: The return value of this function must be ANDed with each member
\r
1196 * UART_MODEM_STAT_type enumeration to determine current flag status
\r
1197 * corresponding to each modem flag status. Because some flags in
\r
1198 * modem status register will be cleared after reading, the next reading
\r
1199 * modem register could not be correct. So this function used to
\r
1200 * read modem status register in one time only, then the return value
\r
1201 * used to check all flags.
\r
1202 **********************************************************************/
\r
1203 uint8_t UART_FullModemGetStatus(LPC_UART1_Type *UARTx)
\r
1205 CHECK_PARAM(PARAM_UART1_MODEM(UARTx));
\r
1206 return ((UARTx->MSR) & UART1_MSR_BITMASK);
\r
1209 #endif /* _UART1 */
\r
1210 /* UART RS485 functions --------------------------------------------------------------*/
\r
1212 /*********************************************************************//**
\r
1213 * @brief Configure UART peripheral in RS485 mode according to the specified
\r
1214 * parameters in the RS485ConfigStruct.
\r
1215 * @param[in] UARTx UART peripheral selected, should be:
\r
1216 * - LPC_UART0 :UART0 peripheral
\r
1217 * - LPC_UART1 :UART1 peripheral
\r
1218 * - LPC_UART2 :UART2 peripheral
\r
1219 * - LPC_UART3 :UART3 peripheral
\r
1220 * @param[in] RS485ConfigStruct Pointer to a UART_RS485_CTRLCFG_Type structure
\r
1221 * that contains the configuration information for specified UART
\r
1224 **********************************************************************/
\r
1225 void UART_RS485Config(LPC_USARTn_Type *UARTx, UART_RS485_CTRLCFG_Type *RS485ConfigStruct)
\r
1229 CHECK_PARAM(PARAM_FUNCTIONALSTATE(RS485ConfigStruct->AutoAddrDetect_State));
\r
1230 CHECK_PARAM(PARAM_FUNCTIONALSTATE(RS485ConfigStruct->AutoDirCtrl_State));
\r
1231 CHECK_PARAM(PARAM_UART_RS485_CFG_DELAYVALUE(RS485ConfigStruct->DelayValue));
\r
1232 CHECK_PARAM(PARAM_SETSTATE(RS485ConfigStruct->DirCtrlPol_Level));
\r
1233 CHECK_PARAM(PARAM_UART_RS485_DIRCTRL_PIN(RS485ConfigStruct->DirCtrlPin));
\r
1234 CHECK_PARAM(PARAM_UART_RS485_CFG_MATCHADDRVALUE(RS485ConfigStruct->MatchAddrValue));
\r
1235 CHECK_PARAM(PARAM_FUNCTIONALSTATE(RS485ConfigStruct->NormalMultiDropMode_State));
\r
1236 CHECK_PARAM(PARAM_FUNCTIONALSTATE(RS485ConfigStruct->Rx_State));
\r
1239 // If Auto Direction Control is enabled - This function is used in Master mode
\r
1240 if (RS485ConfigStruct->AutoDirCtrl_State == ENABLE)
\r
1242 tmp |= UART_RS485CTRL_DCTRL_EN;
\r
1245 if (RS485ConfigStruct->DirCtrlPol_Level == SET)
\r
1247 tmp |= UART_RS485CTRL_OINV_1;
\r
1250 // Set pin according to
\r
1251 if (RS485ConfigStruct->DirCtrlPin == UART_RS485_DIRCTRL_DTR)
\r
1253 tmp |= UART_RS485CTRL_SEL_DTR;
\r
1256 // Fill delay time
\r
1257 if (((LPC_UART1_Type *)UARTx) == LPC_UART1)
\r
1259 ((LPC_UART1_Type *)UARTx)->RS485DLY = RS485ConfigStruct->DelayValue & UART_RS485DLY_BITMASK;
\r
1263 UARTx->RS485DLY = RS485ConfigStruct->DelayValue & UART_RS485DLY_BITMASK;
\r
1267 // MultiDrop mode is enable
\r
1268 if (RS485ConfigStruct->NormalMultiDropMode_State == ENABLE)
\r
1270 tmp |= UART_RS485CTRL_NMM_EN;
\r
1273 // Auto Address Detect function
\r
1274 if (RS485ConfigStruct->AutoAddrDetect_State == ENABLE)
\r
1276 tmp |= UART_RS485CTRL_AADEN;
\r
1277 // Fill Match Address
\r
1278 if (((LPC_UART1_Type *)UARTx) == LPC_UART1)
\r
1280 ((LPC_UART1_Type *)UARTx)->RS485ADRMATCH = RS485ConfigStruct->MatchAddrValue & UART_RS485ADRMATCH_BITMASK;
\r
1284 UARTx->RS485ADRMATCH = RS485ConfigStruct->MatchAddrValue & UART_RS485ADRMATCH_BITMASK;
\r
1289 // Receiver is disable
\r
1290 if (RS485ConfigStruct->Rx_State == DISABLE)
\r
1292 tmp |= UART_RS485CTRL_RX_DIS;
\r
1295 // write back to RS485 control register
\r
1296 if (((LPC_UART1_Type *)UARTx) == LPC_UART1)
\r
1298 ((LPC_UART1_Type *)UARTx)->RS485CTRL = tmp & UART_RS485CTRL_BITMASK;
\r
1302 UARTx->RS485CTRL = tmp & UART_RS485CTRL_BITMASK;
\r
1305 // Enable Parity function and leave parity in stick '0' parity as default
\r
1306 if (((LPC_UART1_Type *)UARTx) == LPC_UART1)
\r
1308 ((LPC_UART1_Type *)UARTx)->LCR |= (UART_LCR_PARITY_F_0 | UART_LCR_PARITY_EN);
\r
1312 UARTx->LCR |= (UART_LCR_PARITY_F_0 | UART_LCR_PARITY_EN);
\r
1316 /*********************************************************************//**
\r
1317 * @brief Enable/Disable receiver in RS485 module in UART
\r
1318 * @param[in] UARTx UART peripheral selected, should be:
\r
1319 * - LPC_UART0 :UART0 peripheral
\r
1320 * - LPC_UART1 :UART1 peripheral
\r
1321 * - LPC_UART2 :UART2 peripheral
\r
1322 * - LPC_UART3 :UART3 peripheral
\r
1323 * @param[in] NewState New State of command, should be:
\r
1324 * - ENABLE :Enable this function.
\r
1325 * - DISABLE :Disable this function.
\r
1327 **********************************************************************/
\r
1328 void UART_RS485ReceiverCmd(LPC_USARTn_Type *UARTx, FunctionalState NewState)
\r
1330 if (((LPC_UART1_Type *)UARTx) == LPC_UART1)
\r
1332 if (NewState == ENABLE){
\r
1333 ((LPC_UART1_Type *)UARTx)->RS485CTRL &= ~UART_RS485CTRL_RX_DIS;
\r
1335 ((LPC_UART1_Type *)UARTx)->RS485CTRL |= UART_RS485CTRL_RX_DIS;
\r
1340 if (NewState == ENABLE){
\r
1341 UARTx->RS485CTRL &= ~UART_RS485CTRL_RX_DIS;
\r
1343 UARTx->RS485CTRL |= UART_RS485CTRL_RX_DIS;
\r
1348 /*********************************************************************//**
\r
1349 * @brief Send data on RS485 bus with specified parity stick value (9-bit mode).
\r
1350 * @param[in] UARTx UART peripheral selected, should be:
\r
1351 * - LPC_UART0 :UART0 peripheral
\r
1352 * - LPC_UART1 :UART1 peripheral
\r
1353 * - LPC_UART2 :UART2 peripheral
\r
1354 * - LPC_UART3 :UART3 peripheral
\r
1355 * @param[in] pDatFrm Pointer to data frame.
\r
1356 * @param[in] size Size of data.
\r
1357 * @param[in] ParityStick Parity Stick value, should be 0 or 1.
\r
1359 **********************************************************************/
\r
1360 uint32_t UART_RS485Send(LPC_USARTn_Type *UARTx, uint8_t *pDatFrm, \
\r
1361 uint32_t size, uint8_t ParityStick)
\r
1363 uint8_t tmp, save;
\r
1365 if (((LPC_UART1_Type *)UARTx) == LPC_UART1)
\r
1368 save = tmp = ((LPC_UART1_Type *)UARTx)->LCR & UART_LCR_BITMASK;
\r
1369 tmp &= ~(UART_LCR_PARITY_EVEN);
\r
1370 ((LPC_UART1_Type *)UARTx)->LCR = tmp;
\r
1371 cnt = UART_Send((LPC_USARTn_Type *)UARTx, pDatFrm, size, BLOCKING);
\r
1372 while (!(((LPC_UART1_Type *)UARTx)->LSR & UART_LSR_TEMT));
\r
1373 ((LPC_UART1_Type *)UARTx)->LCR = save;
\r
1375 cnt = UART_Send((LPC_USARTn_Type *)UARTx, pDatFrm, size, BLOCKING);
\r
1376 while (!(((LPC_UART1_Type *)UARTx)->LSR & UART_LSR_TEMT));
\r
1382 save = tmp = UARTx->LCR & UART_LCR_BITMASK;
\r
1383 tmp &= ~(UART_LCR_PARITY_EVEN);
\r
1385 cnt = UART_Send((LPC_USARTn_Type *)UARTx, pDatFrm, size, BLOCKING);
\r
1386 while (!(UARTx->LSR & UART_LSR_TEMT));
\r
1387 UARTx->LCR = save;
\r
1389 cnt = UART_Send((LPC_USARTn_Type *)UARTx, pDatFrm, size, BLOCKING);
\r
1390 while (!(UARTx->LSR & UART_LSR_TEMT));
\r
1396 /*********************************************************************//**
\r
1397 * @brief Send Slave address frames on RS485 bus.
\r
1398 * @param[in] UARTx UART peripheral selected, should be:
\r
1399 * - LPC_UART0 :UART0 peripheral
\r
1400 * - LPC_UART1 :UART1 peripheral
\r
1401 * - LPC_UART2 :UART2 peripheral
\r
1402 * - LPC_UART3 :UART3 peripheral
\r
1403 * @param[in] SlvAddr Slave Address.
\r
1405 **********************************************************************/
\r
1406 void UART_RS485SendSlvAddr(LPC_USARTn_Type *UARTx, uint8_t SlvAddr)
\r
1408 UART_RS485Send(UARTx, &SlvAddr, 1, 1);
\r
1411 /*********************************************************************//**
\r
1412 * @brief Send Data frames on RS485 bus.
\r
1413 * @param[in] UARTx UART peripheral selected, should be:
\r
1414 * - LPC_UART0 :UART0 peripheral
\r
1415 * - LPC_UART1 :UART1 peripheral
\r
1416 * - LPC_UART2 :UART2 peripheral
\r
1417 * - LPC_UART3 :UART3 peripheral
\r
1418 * @param[in] pData Pointer to data to be sent.
\r
1419 * @param[in] size Size of data frame to be sent.
\r
1421 **********************************************************************/
\r
1422 uint32_t UART_RS485SendData(LPC_USARTn_Type *UARTx, uint8_t *pData, uint32_t size)
\r
1424 return (UART_RS485Send(UARTx, pData, size, 0));
\r
1428 #endif /* _UART */
\r
1437 /* --------------------------------- End Of File ------------------------------ */
\r