1 /******************************************************************************
3 * Copyright (C) 2002 - 2014 Xilinx, Inc. All rights reserved.
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6 * of this software and associated documentation files (the "Software"), to deal
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31 ******************************************************************************/
32 /*****************************************************************************/
35 * @file xenv_standalone.h
37 * Defines common services specified by xenv.h.
40 * This file is not intended to be included directly by driver code.
41 * Instead, the generic xenv.h file is intended to be included by driver
45 * MODIFICATION HISTORY:
47 * Ver Who Date Changes
48 * ----- ---- -------- -----------------------------------------------
49 * 1.00a wgr 02/28/07 Added cache handling macros.
50 * 1.00a wgr 02/27/07 Simplified code. Deprecated old-style macro names.
51 * 1.00a rmm 01/24/06 Implemented XENV_USLEEP. Assume implementation is being
52 * used under Xilinx standalone BSP.
53 * 1.00a xd 11/03/04 Improved support for doxygen.
54 * 1.00a rmm 03/21/02 First release
55 * 1.00a wgr 03/22/07 Converted to new coding style.
56 * 1.00a rpm 06/29/07 Added udelay macro for standalone
57 * 1.00a xd 07/19/07 Included xparameters.h as XPAR_ constants are referred
58 * to in MICROBLAZE section
59 * 1.00a ecm 09/19/08 updated for v7.20 of Microblaze, new functionality
64 ******************************************************************************/
66 #ifndef XENV_STANDALONE_H
67 #define XENV_STANDALONE_H
73 /***************************** Include Files *********************************/
74 /******************************************************************************
76 * Get the processor dependent includes
78 ******************************************************************************/
82 #if defined __MICROBLAZE__
83 # include "mb_interface.h"
84 # include "xparameters.h" /* XPAR constants used below in MB section */
88 # include "xcache_l.h" /* also include xcache_l.h for caching macros */
91 /******************************************************************************
93 * MEMCPY / MEMSET related macros.
95 * The following are straight forward implementations of memset and memcpy.
97 * NOTE: memcpy may not work if source and target memory area are overlapping.
99 ******************************************************************************/
100 /*****************************************************************************/
103 * Copies a non-overlapping block of memory.
106 * Destination address to copy data to.
109 * Source address to copy data from.
112 * Number of bytes to copy.
117 * The use of XENV_MEM_COPY is deprecated. Use memcpy() instead.
120 * This implemention MAY BREAK work if source and target memory
121 * area are overlapping.
123 *****************************************************************************/
125 #define XENV_MEM_COPY(DestPtr, SrcPtr, Bytes) \
126 memcpy((void *) DestPtr, (const void *) SrcPtr, (size_t) Bytes)
130 /*****************************************************************************/
133 * Fills an area of memory with constant data.
136 * Destination address to copy data to.
142 * Number of bytes to copy.
147 * The use of XENV_MEM_FILL is deprecated. Use memset() instead.
149 *****************************************************************************/
151 #define XENV_MEM_FILL(DestPtr, Data, Bytes) \
152 memset((void *) DestPtr, (int) Data, (size_t) Bytes)
156 /******************************************************************************
158 * TIME related macros
160 ******************************************************************************/
163 * A structure that contains a time stamp used by other time stamp macros
164 * defined below. This structure is processor dependent.
166 typedef int XENV_TIME_STAMP;
168 /*****************************************************************************/
171 * Time is derived from the 64 bit PPC timebase register
173 * @param StampPtr is the storage for the retrieved time stamp.
179 * Signature: void XENV_TIME_STAMP_GET(XTIME_STAMP *StampPtr)
181 * This macro must be implemented by the user.
183 *****************************************************************************/
184 #define XENV_TIME_STAMP_GET(StampPtr)
186 /*****************************************************************************/
189 * This macro is not yet implemented and always returns 0.
191 * @param Stamp1Ptr is the first sampled time stamp.
192 * @param Stamp2Ptr is the second sampled time stamp.
198 * This macro must be implemented by the user.
200 *****************************************************************************/
201 #define XENV_TIME_STAMP_DELTA_US(Stamp1Ptr, Stamp2Ptr) (0)
203 /*****************************************************************************/
206 * This macro is not yet implemented and always returns 0.
208 * @param Stamp1Ptr is the first sampled time stamp.
209 * @param Stamp2Ptr is the second sampled time stamp.
215 * This macro must be implemented by the user.
217 *****************************************************************************/
218 #define XENV_TIME_STAMP_DELTA_MS(Stamp1Ptr, Stamp2Ptr) (0)
220 /*****************************************************************************/
222 * XENV_USLEEP(unsigned delay)
224 * Delay the specified number of microseconds. Not implemented without OS
228 * Number of microseconds to delay.
232 *****************************************************************************/
235 #define XENV_USLEEP(delay) usleep(delay)
236 #define udelay(delay) usleep(delay)
238 #define XENV_USLEEP(delay)
239 #define udelay(delay)
243 /******************************************************************************
245 * CACHE handling macros / mappings
247 ******************************************************************************/
248 /******************************************************************************
250 * Processor independent macros
252 ******************************************************************************/
254 #define XCACHE_ENABLE_CACHE() \
255 { XCACHE_ENABLE_DCACHE(); XCACHE_ENABLE_ICACHE(); }
257 #define XCACHE_DISABLE_CACHE() \
258 { XCACHE_DISABLE_DCACHE(); XCACHE_DISABLE_ICACHE(); }
261 /******************************************************************************
265 * NOTE: Currently the following macros will only work on systems that contain
266 * only ONE MicroBlaze processor. Also, the macros will only be enabled if the
267 * system is built using a xparameters.h file.
269 ******************************************************************************/
271 #if defined __MICROBLAZE__
273 /* Check if MicroBlaze data cache was built into the core.
275 #if (XPAR_MICROBLAZE_USE_DCACHE == 1)
276 # define XCACHE_ENABLE_DCACHE() microblaze_enable_dcache()
277 # define XCACHE_DISABLE_DCACHE() microblaze_disable_dcache()
278 # define XCACHE_INVALIDATE_DCACHE() microblaze_invalidate_dcache()
280 # define XCACHE_INVALIDATE_DCACHE_RANGE(Addr, Len) \
281 microblaze_invalidate_dcache_range((int)(Addr), (int)(Len))
283 #if (XPAR_MICROBLAZE_DCACHE_USE_WRITEBACK == 1)
284 # define XCACHE_FLUSH_DCACHE() microblaze_flush_dcache()
285 # define XCACHE_FLUSH_DCACHE_RANGE(Addr, Len) \
286 microblaze_flush_dcache_range((int)(Addr), (int)(Len))
288 # define XCACHE_FLUSH_DCACHE() microblaze_invalidate_dcache()
289 # define XCACHE_FLUSH_DCACHE_RANGE(Addr, Len) \
290 microblaze_invalidate_dcache_range((int)(Addr), (int)(Len))
291 #endif /*XPAR_MICROBLAZE_DCACHE_USE_WRITEBACK*/
294 # define XCACHE_ENABLE_DCACHE()
295 # define XCACHE_DISABLE_DCACHE()
296 # define XCACHE_INVALIDATE_DCACHE_RANGE(Addr, Len)
297 # define XCACHE_FLUSH_DCACHE_RANGE(Addr, Len)
298 #endif /*XPAR_MICROBLAZE_USE_DCACHE*/
301 /* Check if MicroBlaze instruction cache was built into the core.
303 #if (XPAR_MICROBLAZE_USE_ICACHE == 1)
304 # define XCACHE_ENABLE_ICACHE() microblaze_enable_icache()
305 # define XCACHE_DISABLE_ICACHE() microblaze_disable_icache()
307 # define XCACHE_INVALIDATE_ICACHE() microblaze_invalidate_icache()
309 # define XCACHE_INVALIDATE_ICACHE_RANGE(Addr, Len) \
310 microblaze_invalidate_icache_range((int)(Addr), (int)(Len))
313 # define XCACHE_ENABLE_ICACHE()
314 # define XCACHE_DISABLE_ICACHE()
315 #endif /*XPAR_MICROBLAZE_USE_ICACHE*/
318 /******************************************************************************
322 * Note that the XCACHE_ENABLE_xxx functions are hardcoded to enable a
323 * specific memory region (0x80000001). Each bit (0-30) in the regions
324 * bitmask stands for 128MB of memory. Bit 31 stands for the upper 2GB
327 * regions --> cached address range
328 * ------------|--------------------------------------------------
329 * 0x80000000 | [0, 0x7FFFFFF]
330 * 0x00000001 | [0xF8000000, 0xFFFFFFFF]
331 * 0x80000001 | [0, 0x7FFFFFF],[0xF8000000, 0xFFFFFFFF]
333 ******************************************************************************/
335 #elif defined __PPC__
337 #define XCACHE_ENABLE_DCACHE() XCache_EnableDCache(0x80000001)
338 #define XCACHE_DISABLE_DCACHE() XCache_DisableDCache()
339 #define XCACHE_ENABLE_ICACHE() XCache_EnableICache(0x80000001)
340 #define XCACHE_DISABLE_ICACHE() XCache_DisableICache()
342 #define XCACHE_INVALIDATE_DCACHE_RANGE(Addr, Len) \
343 XCache_InvalidateDCacheRange((unsigned int)(Addr), (unsigned)(Len))
345 #define XCACHE_FLUSH_DCACHE_RANGE(Addr, Len) \
346 XCache_FlushDCacheRange((unsigned int)(Addr), (unsigned)(Len))
348 #define XCACHE_INVALIDATE_ICACHE() XCache_InvalidateICache()
351 /******************************************************************************
353 * Unknown processor / architecture
355 ******************************************************************************/
358 /* #error "Unknown processor / architecture. Must be MicroBlaze or PowerPC." */
366 #endif /* #ifndef XENV_STANDALONE_H */