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   1 /**\r
   2   ******************************************************************************\r
   3   * @file    stm32l4xx_hal_dfsdm.c\r
   4   * @author  MCD Application Team\r
   5   * @brief   This file provides firmware functions to manage the following\r
   6   *          functionalities of the Digital Filter for Sigma-Delta Modulators\r
   7   *          (DFSDM) peripherals:\r
   8   *           + Initialization and configuration of channels and filters\r
   9   *           + Regular channels configuration\r
  10   *           + Injected channels configuration\r
  11   *           + Regular/Injected Channels DMA Configuration\r
  12   *           + Interrupts and flags management\r
  13   *           + Analog watchdog feature\r
  14   *           + Short-circuit detector feature\r
  15   *           + Extremes detector feature\r
  16   *           + Clock absence detector feature\r
  17   *           + Break generation on analog watchdog or short-circuit event\r
  18   *\r
  19   @verbatim\r
  20   ==============================================================================\r
  21                      ##### How to use this driver #####\r
  22   ==============================================================================\r
  23   [..]\r
  24     *** Channel initialization ***\r
  25     ==============================\r
  26     [..]\r
  27       (#) User has first to initialize channels (before filters initialization).\r
  28       (#) As prerequisite, fill in the HAL_DFSDM_ChannelMspInit() :\r
  29         (++) Enable DFSDMz clock interface with __HAL_RCC_DFSDMz_CLK_ENABLE().\r
  30         (++) Enable the clocks for the DFSDMz GPIOS with __HAL_RCC_GPIOx_CLK_ENABLE().\r
  31         (++) Configure these DFSDMz pins in alternate mode using HAL_GPIO_Init().\r
  32         (++) If interrupt mode is used, enable and configure DFSDMz_FLT0 global\r
  33             interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().\r
  34       (#) Configure the output clock, input, serial interface, analog watchdog,\r
  35           offset and data right bit shift parameters for this channel using the\r
  36           HAL_DFSDM_ChannelInit() function.\r
  37 \r
  38     *** Channel clock absence detector ***\r
  39     ======================================\r
  40     [..]\r
  41       (#) Start clock absence detector using HAL_DFSDM_ChannelCkabStart() or\r
  42           HAL_DFSDM_ChannelCkabStart_IT().\r
  43       (#) In polling mode, use HAL_DFSDM_ChannelPollForCkab() to detect the clock\r
  44           absence.\r
  45       (#) In interrupt mode, HAL_DFSDM_ChannelCkabCallback() will be called if\r
  46           clock absence is detected.\r
  47       (#) Stop clock absence detector using HAL_DFSDM_ChannelCkabStop() or\r
  48           HAL_DFSDM_ChannelCkabStop_IT().\r
  49       (#) Please note that the same mode (polling or interrupt) has to be used\r
  50           for all channels because the channels are sharing the same interrupt.\r
  51       (#) Please note also that in interrupt mode, if clock absence detector is\r
  52           stopped for one channel, interrupt will be disabled for all channels.\r
  53 \r
  54     *** Channel short circuit detector ***\r
  55     ======================================\r
  56     [..]\r
  57       (#) Start short circuit detector using HAL_DFSDM_ChannelScdStart() or\r
  58           or HAL_DFSDM_ChannelScdStart_IT().\r
  59       (#) In polling mode, use HAL_DFSDM_ChannelPollForScd() to detect short\r
  60           circuit.\r
  61       (#) In interrupt mode, HAL_DFSDM_ChannelScdCallback() will be called if\r
  62           short circuit is detected.\r
  63       (#) Stop short circuit detector using HAL_DFSDM_ChannelScdStop() or\r
  64           or HAL_DFSDM_ChannelScdStop_IT().\r
  65       (#) Please note that the same mode (polling or interrupt) has to be used\r
  66           for all channels because the channels are sharing the same interrupt.\r
  67       (#) Please note also that in interrupt mode, if short circuit detector is\r
  68           stopped for one channel, interrupt will be disabled for all channels.\r
  69 \r
  70     *** Channel analog watchdog value ***\r
  71     =====================================\r
  72     [..]\r
  73       (#) Get analog watchdog filter value of a channel using\r
  74           HAL_DFSDM_ChannelGetAwdValue().\r
  75 \r
  76     *** Channel offset value ***\r
  77     =====================================\r
  78     [..]\r
  79       (#) Modify offset value of a channel using HAL_DFSDM_ChannelModifyOffset().\r
  80 \r
  81     *** Filter initialization ***\r
  82     =============================\r
  83     [..]\r
  84       (#) After channel initialization, user has to init filters.\r
  85       (#) As prerequisite, fill in the HAL_DFSDM_FilterMspInit() :\r
  86         (++) If interrupt mode is used , enable and configure DFSDMz_FLTx global\r
  87             interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().\r
  88             Please note that DFSDMz_FLT0 global interrupt could be already\r
  89             enabled if interrupt is used for channel.\r
  90         (++) If DMA mode is used, configure DMA with HAL_DMA_Init() and link it\r
  91             with DFSDMz filter handle using __HAL_LINKDMA().\r
  92       (#) Configure the regular conversion, injected conversion and filter\r
  93           parameters for this filter using the HAL_DFSDM_FilterInit() function.\r
  94 \r
  95     *** Filter regular channel conversion ***\r
  96     =========================================\r
  97     [..]\r
  98       (#) Select regular channel and enable/disable continuous mode using\r
  99           HAL_DFSDM_FilterConfigRegChannel().\r
 100       (#) Start regular conversion using HAL_DFSDM_FilterRegularStart(),\r
 101           HAL_DFSDM_FilterRegularStart_IT(), HAL_DFSDM_FilterRegularStart_DMA() or\r
 102           HAL_DFSDM_FilterRegularMsbStart_DMA().\r
 103       (#) In polling mode, use HAL_DFSDM_FilterPollForRegConversion() to detect\r
 104           the end of regular conversion.\r
 105       (#) In interrupt mode, HAL_DFSDM_FilterRegConvCpltCallback() will be called\r
 106           at the end of regular conversion.\r
 107       (#) Get value of regular conversion and corresponding channel using\r
 108           HAL_DFSDM_FilterGetRegularValue().\r
 109       (#) In DMA mode, HAL_DFSDM_FilterRegConvHalfCpltCallback() and\r
 110           HAL_DFSDM_FilterRegConvCpltCallback() will be called respectively at the\r
 111           half transfer and at the transfer complete. Please note that\r
 112           HAL_DFSDM_FilterRegConvHalfCpltCallback() will be called only in DMA\r
 113           circular mode.\r
 114       (#) Stop regular conversion using HAL_DFSDM_FilterRegularStop(),\r
 115           HAL_DFSDM_FilterRegularStop_IT() or HAL_DFSDM_FilterRegularStop_DMA().\r
 116 \r
 117     *** Filter injected channels conversion ***\r
 118     ===========================================\r
 119     [..]\r
 120       (#) Select injected channels using HAL_DFSDM_FilterConfigInjChannel().\r
 121       (#) Start injected conversion using HAL_DFSDM_FilterInjectedStart(),\r
 122           HAL_DFSDM_FilterInjectedStart_IT(), HAL_DFSDM_FilterInjectedStart_DMA() or\r
 123           HAL_DFSDM_FilterInjectedMsbStart_DMA().\r
 124       (#) In polling mode, use HAL_DFSDM_FilterPollForInjConversion() to detect\r
 125           the end of injected conversion.\r
 126       (#) In interrupt mode, HAL_DFSDM_FilterInjConvCpltCallback() will be called\r
 127           at the end of injected conversion.\r
 128       (#) Get value of injected conversion and corresponding channel using\r
 129           HAL_DFSDM_FilterGetInjectedValue().\r
 130       (#) In DMA mode, HAL_DFSDM_FilterInjConvHalfCpltCallback() and\r
 131           HAL_DFSDM_FilterInjConvCpltCallback() will be called respectively at the\r
 132           half transfer and at the transfer complete. Please note that\r
 133           HAL_DFSDM_FilterInjConvCpltCallback() will be called only in DMA\r
 134           circular mode.\r
 135       (#) Stop injected conversion using HAL_DFSDM_FilterInjectedStop(),\r
 136           HAL_DFSDM_FilterInjectedStop_IT() or HAL_DFSDM_FilterInjectedStop_DMA().\r
 137 \r
 138     *** Filter analog watchdog ***\r
 139     ==============================\r
 140     [..]\r
 141       (#) Start filter analog watchdog using HAL_DFSDM_FilterAwdStart_IT().\r
 142       (#) HAL_DFSDM_FilterAwdCallback() will be called if analog watchdog occurs.\r
 143       (#) Stop filter analog watchdog using HAL_DFSDM_FilterAwdStop_IT().\r
 144 \r
 145     *** Filter extreme detector ***\r
 146     ===============================\r
 147     [..]\r
 148       (#) Start filter extreme detector using HAL_DFSDM_FilterExdStart().\r
 149       (#) Get extreme detector maximum value using HAL_DFSDM_FilterGetExdMaxValue().\r
 150       (#) Get extreme detector minimum value using HAL_DFSDM_FilterGetExdMinValue().\r
 151       (#) Start filter extreme detector using HAL_DFSDM_FilterExdStop().\r
 152 \r
 153     *** Filter conversion time ***\r
 154     ==============================\r
 155     [..]\r
 156       (#) Get conversion time value using HAL_DFSDM_FilterGetConvTimeValue().\r
 157 \r
 158     *** Callback registration ***\r
 159     =============================\r
 160     [..]\r
 161     The compilation define USE_HAL_DFSDM_REGISTER_CALLBACKS when set to 1\r
 162     allows the user to configure dynamically the driver callbacks.\r
 163     Use functions HAL_DFSDM_Channel_RegisterCallback(),\r
 164     HAL_DFSDM_Filter_RegisterCallback() or\r
 165     HAL_DFSDM_Filter_RegisterAwdCallback() to register a user callback.\r
 166 \r
 167     [..]\r
 168     Function HAL_DFSDM_Channel_RegisterCallback() allows to register\r
 169     following callbacks:\r
 170       (+) CkabCallback      : DFSDM channel clock absence detection callback.\r
 171       (+) ScdCallback       : DFSDM channel short circuit detection callback.\r
 172       (+) MspInitCallback   : DFSDM channel MSP init callback.\r
 173       (+) MspDeInitCallback : DFSDM channel MSP de-init callback.\r
 174     [..]\r
 175     This function takes as parameters the HAL peripheral handle, the Callback ID\r
 176     and a pointer to the user callback function.\r
 177 \r
 178     [..]\r
 179     Function HAL_DFSDM_Filter_RegisterCallback() allows to register\r
 180     following callbacks:\r
 181       (+) RegConvCpltCallback     : DFSDM filter regular conversion complete callback.\r
 182       (+) RegConvHalfCpltCallback : DFSDM filter half regular conversion complete callback.\r
 183       (+) InjConvCpltCallback     : DFSDM filter injected conversion complete callback.\r
 184       (+) InjConvHalfCpltCallback : DFSDM filter half injected conversion complete callback.\r
 185       (+) ErrorCallback           : DFSDM filter error callback.\r
 186       (+) MspInitCallback         : DFSDM filter MSP init callback.\r
 187       (+) MspDeInitCallback       : DFSDM filter MSP de-init callback.\r
 188     [..]\r
 189     This function takes as parameters the HAL peripheral handle, the Callback ID\r
 190     and a pointer to the user callback function.\r
 191 \r
 192     [..]\r
 193     For specific DFSDM filter analog watchdog callback use dedicated register callback:\r
 194     HAL_DFSDM_Filter_RegisterAwdCallback().\r
 195 \r
 196     [..]\r
 197     Use functions HAL_DFSDM_Channel_UnRegisterCallback() or\r
 198     HAL_DFSDM_Filter_UnRegisterCallback() to reset a callback to the default\r
 199     weak function.\r
 200 \r
 201     [..]\r
 202     HAL_DFSDM_Channel_UnRegisterCallback() takes as parameters the HAL peripheral handle,\r
 203     and the Callback ID.\r
 204     [..]\r
 205     This function allows to reset following callbacks:\r
 206       (+) CkabCallback      : DFSDM channel clock absence detection callback.\r
 207       (+) ScdCallback       : DFSDM channel short circuit detection callback.\r
 208       (+) MspInitCallback   : DFSDM channel MSP init callback.\r
 209       (+) MspDeInitCallback : DFSDM channel MSP de-init callback.\r
 210 \r
 211     [..]\r
 212     HAL_DFSDM_Filter_UnRegisterCallback() takes as parameters the HAL peripheral handle,\r
 213     and the Callback ID.\r
 214     [..]\r
 215     This function allows to reset following callbacks:\r
 216       (+) RegConvCpltCallback     : DFSDM filter regular conversion complete callback.\r
 217       (+) RegConvHalfCpltCallback : DFSDM filter half regular conversion complete callback.\r
 218       (+) InjConvCpltCallback     : DFSDM filter injected conversion complete callback.\r
 219       (+) InjConvHalfCpltCallback : DFSDM filter half injected conversion complete callback.\r
 220       (+) ErrorCallback           : DFSDM filter error callback.\r
 221       (+) MspInitCallback         : DFSDM filter MSP init callback.\r
 222       (+) MspDeInitCallback       : DFSDM filter MSP de-init callback.\r
 223 \r
 224     [..]\r
 225     For specific DFSDM filter analog watchdog callback use dedicated unregister callback:\r
 226     HAL_DFSDM_Filter_UnRegisterAwdCallback().\r
 227 \r
 228     [..]\r
 229     By default, after the call of init function and if the state is RESET\r
 230     all callbacks are reset to the corresponding legacy weak functions:\r
 231     examples HAL_DFSDM_ChannelScdCallback(), HAL_DFSDM_FilterErrorCallback().\r
 232     Exception done for MspInit and MspDeInit callbacks that are respectively\r
 233     reset to the legacy weak functions in the init and de-init only when these\r
 234     callbacks are null (not registered beforehand).\r
 235     If not, MspInit or MspDeInit are not null, the init and de-init keep and use\r
 236     the user MspInit/MspDeInit callbacks (registered beforehand)\r
 237 \r
 238     [..]\r
 239     Callbacks can be registered/unregistered in READY state only.\r
 240     Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered\r
 241     in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used\r
 242     during the init/de-init.\r
 243     In that case first register the MspInit/MspDeInit user callbacks using\r
 244     HAL_DFSDM_Channel_RegisterCallback() or\r
 245     HAL_DFSDM_Filter_RegisterCallback() before calling init or de-init function.\r
 246 \r
 247     [..]\r
 248     When The compilation define USE_HAL_DFSDM_REGISTER_CALLBACKS is set to 0 or\r
 249     not defined, the callback registering feature is not available\r
 250     and weak callbacks are used.\r
 251 \r
 252     @endverbatim\r
 253   ******************************************************************************\r
 254   * @attention\r
 255   *\r
 256   * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.\r
 257   * All rights reserved.</center></h2>\r
 258   *\r
 259   * This software component is licensed by ST under BSD 3-Clause license,\r
 260   * the "License"; You may not use this file except in compliance with the\r
 261   * License. You may obtain a copy of the License at:\r
 262   *                        opensource.org/licenses/BSD-3-Clause\r
 263   *\r
 264   ******************************************************************************\r
 265   */\r
 266 \r
 267 /* Includes ------------------------------------------------------------------*/\r
 268 #include "stm32l4xx_hal.h"\r
 269 \r
 270 /** @addtogroup STM32L4xx_HAL_Driver\r
 271   * @{\r
 272   */\r
 273 #ifdef HAL_DFSDM_MODULE_ENABLED\r
 274 \r
 275 #if defined(STM32L451xx) || defined(STM32L452xx) || defined(STM32L462xx) || \\r
 276     defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \\r
 277     defined(STM32L496xx) || defined(STM32L4A6xx) || \\r
 278     defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)\r
 279 \r
 280 /** @defgroup DFSDM DFSDM\r
 281   * @brief DFSDM HAL driver module\r
 282   * @{\r
 283   */\r
 284 \r
 285 /* Private typedef -----------------------------------------------------------*/\r
 286 /* Private define ------------------------------------------------------------*/\r
 287 /** @defgroup DFSDM_Private_Define DFSDM Private Define\r
 288  * @{\r
 289  */\r
 290 #define DFSDM_FLTCR1_MSB_RCH_OFFSET     8\r
 291 #define DFSDM_MSB_MASK                  0xFFFF0000U\r
 292 #define DFSDM_LSB_MASK                  0x0000FFFFU\r
 293 #define DFSDM_CKAB_TIMEOUT              5000U\r
 294 #if defined(STM32L451xx) || defined(STM32L452xx) || defined(STM32L462xx)\r
 295 #define DFSDM1_CHANNEL_NUMBER           4U\r
 296 #else /* STM32L451xx || STM32L452xx || STM32L462xx */\r
 297 #define DFSDM1_CHANNEL_NUMBER           8U\r
 298 #endif /* STM32L451xx || STM32L452xx || STM32L462xx */\r
 299 /**\r
 300   * @}\r
 301   */\r
 302 \r
 303 /* Private macro -------------------------------------------------------------*/\r
 304 /* Private variables ---------------------------------------------------------*/\r
 305 /** @defgroup DFSDM_Private_Variables DFSDM Private Variables\r
 306   * @{\r
 307   */\r
 308 static __IO uint32_t                v_dfsdm1ChannelCounter = 0;\r
 309 static DFSDM_Channel_HandleTypeDef *a_dfsdm1ChannelHandle[DFSDM1_CHANNEL_NUMBER] = {NULL};\r
 310 /**\r
 311   * @}\r
 312   */\r
 313 \r
 314 /* Private function prototypes -----------------------------------------------*/\r
 315 /** @defgroup DFSDM_Private_Functions DFSDM Private Functions\r
 316   * @{\r
 317   */\r
 318 static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels);\r
 319 static uint32_t DFSDM_GetChannelFromInstance(const DFSDM_Channel_TypeDef *Instance);\r
 320 static void     DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);\r
 321 static void     DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);\r
 322 static void     DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);\r
 323 static void     DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);\r
 324 static void     DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma);\r
 325 static void     DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma);\r
 326 static void     DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma);\r
 327 static void     DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma);\r
 328 static void     DFSDM_DMAError(DMA_HandleTypeDef *hdma);\r
 329 /**\r
 330   * @}\r
 331   */\r
 332 \r
 333 /* Exported functions --------------------------------------------------------*/\r
 334 /** @defgroup DFSDM_Exported_Functions DFSDM Exported Functions\r
 335   * @{\r
 336   */\r
 337 \r
 338 /** @defgroup DFSDM_Exported_Functions_Group1_Channel Channel initialization and de-initialization functions\r
 339  *  @brief    Channel initialization and de-initialization functions\r
 340  *\r
 341 @verbatim\r
 342   ==============================================================================\r
 343         ##### Channel initialization and de-initialization functions #####\r
 344   ==============================================================================\r
 345     [..]  This section provides functions allowing to:\r
 346       (+) Initialize the DFSDM channel.\r
 347       (+) De-initialize the DFSDM channel.\r
 348 @endverbatim\r
 349   * @{\r
 350   */\r
 351 \r
 352 /**\r
 353   * @brief  Initialize the DFSDM channel according to the specified parameters\r
 354   *         in the DFSDM_ChannelInitTypeDef structure and initialize the associated handle.\r
 355   * @param  hdfsdm_channel DFSDM channel handle.\r
 356   * @retval HAL status.\r
 357   */\r
 358 HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)\r
 359 {\r
 360   /* Check DFSDM Channel handle */\r
 361   if (hdfsdm_channel == NULL)\r
 362   {\r
 363     return HAL_ERROR;\r
 364   }\r
 365 \r
 366   /* Check parameters */\r
 367   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));\r
 368   assert_param(IS_FUNCTIONAL_STATE(hdfsdm_channel->Init.OutputClock.Activation));\r
 369   assert_param(IS_DFSDM_CHANNEL_INPUT(hdfsdm_channel->Init.Input.Multiplexer));\r
 370   assert_param(IS_DFSDM_CHANNEL_DATA_PACKING(hdfsdm_channel->Init.Input.DataPacking));\r
 371   assert_param(IS_DFSDM_CHANNEL_INPUT_PINS(hdfsdm_channel->Init.Input.Pins));\r
 372   assert_param(IS_DFSDM_CHANNEL_SERIAL_INTERFACE_TYPE(hdfsdm_channel->Init.SerialInterface.Type));\r
 373   assert_param(IS_DFSDM_CHANNEL_SPI_CLOCK(hdfsdm_channel->Init.SerialInterface.SpiClock));\r
 374   assert_param(IS_DFSDM_CHANNEL_FILTER_ORDER(hdfsdm_channel->Init.Awd.FilterOrder));\r
 375   assert_param(IS_DFSDM_CHANNEL_FILTER_OVS_RATIO(hdfsdm_channel->Init.Awd.Oversampling));\r
 376   assert_param(IS_DFSDM_CHANNEL_OFFSET(hdfsdm_channel->Init.Offset));\r
 377   assert_param(IS_DFSDM_CHANNEL_RIGHT_BIT_SHIFT(hdfsdm_channel->Init.RightBitShift));\r
 378 \r
 379   /* Check that channel has not been already initialized */\r
 380   if (a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] != NULL)\r
 381   {\r
 382     return HAL_ERROR;\r
 383   }\r
 384 \r
 385 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)\r
 386   /* Reset callback pointers to the weak predefined callbacks */\r
 387   hdfsdm_channel->CkabCallback = HAL_DFSDM_ChannelCkabCallback;\r
 388   hdfsdm_channel->ScdCallback  = HAL_DFSDM_ChannelScdCallback;\r
 389 \r
 390   /* Call MSP init function */\r
 391   if (hdfsdm_channel->MspInitCallback == NULL)\r
 392   {\r
 393     hdfsdm_channel->MspInitCallback = HAL_DFSDM_ChannelMspInit;\r
 394   }\r
 395   hdfsdm_channel->MspInitCallback(hdfsdm_channel);\r
 396 #else\r
 397   /* Call MSP init function */\r
 398   HAL_DFSDM_ChannelMspInit(hdfsdm_channel);\r
 399 #endif\r
 400 \r
 401   /* Update the channel counter */\r
 402   v_dfsdm1ChannelCounter++;\r
 403 \r
 404   /* Configure output serial clock and enable global DFSDM interface only for first channel */\r
 405   if (v_dfsdm1ChannelCounter == 1U)\r
 406   {\r
 407     assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK(hdfsdm_channel->Init.OutputClock.Selection));\r
 408     /* Set the output serial clock source */\r
 409     DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTSRC);\r
 410     DFSDM1_Channel0->CHCFGR1 |= hdfsdm_channel->Init.OutputClock.Selection;\r
 411 \r
 412     /* Reset clock divider */\r
 413     DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTDIV);\r
 414     if (hdfsdm_channel->Init.OutputClock.Activation == ENABLE)\r
 415     {\r
 416       assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(hdfsdm_channel->Init.OutputClock.Divider));\r
 417       /* Set the output clock divider */\r
 418       DFSDM1_Channel0->CHCFGR1 |= (uint32_t)((hdfsdm_channel->Init.OutputClock.Divider - 1U) <<\r
 419                                              DFSDM_CHCFGR1_CKOUTDIV_Pos);\r
 420     }\r
 421 \r
 422     /* enable the DFSDM global interface */\r
 423     DFSDM1_Channel0->CHCFGR1 |= DFSDM_CHCFGR1_DFSDMEN;\r
 424   }\r
 425 \r
 426   /* Set channel input parameters */\r
 427   hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_DATPACK | DFSDM_CHCFGR1_DATMPX |\r
 428                                          DFSDM_CHCFGR1_CHINSEL);\r
 429   hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.Input.Multiplexer |\r
 430                                         hdfsdm_channel->Init.Input.DataPacking |\r
 431                                         hdfsdm_channel->Init.Input.Pins);\r
 432 \r
 433   /* Set serial interface parameters */\r
 434   hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SITP | DFSDM_CHCFGR1_SPICKSEL);\r
 435   hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.SerialInterface.Type |\r
 436                                         hdfsdm_channel->Init.SerialInterface.SpiClock);\r
 437 \r
 438   /* Set analog watchdog parameters */\r
 439   hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_AWFORD | DFSDM_CHAWSCDR_AWFOSR);\r
 440   hdfsdm_channel->Instance->CHAWSCDR |= (hdfsdm_channel->Init.Awd.FilterOrder |\r
 441                                          ((hdfsdm_channel->Init.Awd.Oversampling - 1U) << DFSDM_CHAWSCDR_AWFOSR_Pos));\r
 442 \r
 443   /* Set channel offset and right bit shift */\r
 444   hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET | DFSDM_CHCFGR2_DTRBS);\r
 445   hdfsdm_channel->Instance->CHCFGR2 |= (((uint32_t) hdfsdm_channel->Init.Offset << DFSDM_CHCFGR2_OFFSET_Pos) |\r
 446                                         (hdfsdm_channel->Init.RightBitShift << DFSDM_CHCFGR2_DTRBS_Pos));\r
 447 \r
 448   /* Enable DFSDM channel */\r
 449   hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CHEN;\r
 450 \r
 451   /* Set DFSDM Channel to ready state */\r
 452   hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_READY;\r
 453 \r
 454   /* Store channel handle in DFSDM channel handle table */\r
 455   a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = hdfsdm_channel;\r
 456 \r
 457   return HAL_OK;\r
 458 }\r
 459 \r
 460 /**\r
 461   * @brief  De-initialize the DFSDM channel.\r
 462   * @param  hdfsdm_channel DFSDM channel handle.\r
 463   * @retval HAL status.\r
 464   */\r
 465 HAL_StatusTypeDef HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)\r
 466 {\r
 467   /* Check DFSDM Channel handle */\r
 468   if (hdfsdm_channel == NULL)\r
 469   {\r
 470     return HAL_ERROR;\r
 471   }\r
 472 \r
 473   /* Check parameters */\r
 474   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));\r
 475 \r
 476   /* Check that channel has not been already deinitialized */\r
 477   if (a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] == NULL)\r
 478   {\r
 479     return HAL_ERROR;\r
 480   }\r
 481 \r
 482   /* Disable the DFSDM channel */\r
 483   hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CHEN);\r
 484 \r
 485   /* Update the channel counter */\r
 486   v_dfsdm1ChannelCounter--;\r
 487 \r
 488   /* Disable global DFSDM at deinit of last channel */\r
 489   if (v_dfsdm1ChannelCounter == 0U)\r
 490   {\r
 491     DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_DFSDMEN);\r
 492   }\r
 493 \r
 494   /* Call MSP deinit function */\r
 495 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)\r
 496   if (hdfsdm_channel->MspDeInitCallback == NULL)\r
 497   {\r
 498     hdfsdm_channel->MspDeInitCallback = HAL_DFSDM_ChannelMspDeInit;\r
 499   }\r
 500   hdfsdm_channel->MspDeInitCallback(hdfsdm_channel);\r
 501 #else\r
 502   HAL_DFSDM_ChannelMspDeInit(hdfsdm_channel);\r
 503 #endif\r
 504 \r
 505   /* Set DFSDM Channel in reset state */\r
 506   hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_RESET;\r
 507 \r
 508   /* Reset channel handle in DFSDM channel handle table */\r
 509   a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = (DFSDM_Channel_HandleTypeDef *) NULL;\r
 510 \r
 511   return HAL_OK;\r
 512 }\r
 513 \r
 514 /**\r
 515   * @brief  Initialize the DFSDM channel MSP.\r
 516   * @param  hdfsdm_channel DFSDM channel handle.\r
 517   * @retval None\r
 518   */\r
 519 __weak void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)\r
 520 {\r
 521   /* Prevent unused argument(s) compilation warning */\r
 522   UNUSED(hdfsdm_channel);\r
 523 \r
 524   /* NOTE : This function should not be modified, when the function is needed,\r
 525             the HAL_DFSDM_ChannelMspInit could be implemented in the user file.\r
 526    */\r
 527 }\r
 528 \r
 529 /**\r
 530   * @brief  De-initialize the DFSDM channel MSP.\r
 531   * @param  hdfsdm_channel DFSDM channel handle.\r
 532   * @retval None\r
 533   */\r
 534 __weak void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)\r
 535 {\r
 536   /* Prevent unused argument(s) compilation warning */\r
 537   UNUSED(hdfsdm_channel);\r
 538 \r
 539   /* NOTE : This function should not be modified, when the function is needed,\r
 540             the HAL_DFSDM_ChannelMspDeInit could be implemented in the user file.\r
 541    */\r
 542 }\r
 543 \r
 544 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)\r
 545 /**\r
 546   * @brief  Register a user DFSDM channel callback\r
 547   *         to be used instead of the weak predefined callback.\r
 548   * @param  hdfsdm_channel DFSDM channel handle.\r
 549   * @param  CallbackID ID of the callback to be registered.\r
 550   *         This parameter can be one of the following values:\r
 551   *           @arg @ref HAL_DFSDM_CHANNEL_CKAB_CB_ID clock absence detection callback ID.\r
 552   *           @arg @ref HAL_DFSDM_CHANNEL_SCD_CB_ID short circuit detection callback ID.\r
 553   *           @arg @ref HAL_DFSDM_CHANNEL_MSPINIT_CB_ID MSP init callback ID.\r
 554   *           @arg @ref HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID MSP de-init callback ID.\r
 555   * @param  pCallback pointer to the callback function.\r
 556   * @retval HAL status.\r
 557   */\r
 558 HAL_StatusTypeDef HAL_DFSDM_Channel_RegisterCallback(DFSDM_Channel_HandleTypeDef        *hdfsdm_channel,\r
 559                                                      HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID,\r
 560                                                      pDFSDM_Channel_CallbackTypeDef      pCallback)\r
 561 {\r
 562   HAL_StatusTypeDef status = HAL_OK;\r
 563 \r
 564   if (pCallback == NULL)\r
 565   {\r
 566     /* update return status */\r
 567     status = HAL_ERROR;\r
 568   }\r
 569   else\r
 570   {\r
 571     if (HAL_DFSDM_CHANNEL_STATE_READY == hdfsdm_channel->State)\r
 572     {\r
 573       switch (CallbackID)\r
 574       {\r
 575         case HAL_DFSDM_CHANNEL_CKAB_CB_ID :\r
 576           hdfsdm_channel->CkabCallback = pCallback;\r
 577           break;\r
 578         case HAL_DFSDM_CHANNEL_SCD_CB_ID :\r
 579           hdfsdm_channel->ScdCallback = pCallback;\r
 580           break;\r
 581         case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID :\r
 582           hdfsdm_channel->MspInitCallback = pCallback;\r
 583           break;\r
 584         case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID :\r
 585           hdfsdm_channel->MspDeInitCallback = pCallback;\r
 586           break;\r
 587         default :\r
 588           /* update return status */\r
 589           status = HAL_ERROR;\r
 590           break;\r
 591       }\r
 592     }\r
 593     else if (HAL_DFSDM_CHANNEL_STATE_RESET == hdfsdm_channel->State)\r
 594     {\r
 595       switch (CallbackID)\r
 596       {\r
 597         case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID :\r
 598           hdfsdm_channel->MspInitCallback = pCallback;\r
 599           break;\r
 600         case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID :\r
 601           hdfsdm_channel->MspDeInitCallback = pCallback;\r
 602           break;\r
 603         default :\r
 604           /* update return status */\r
 605           status = HAL_ERROR;\r
 606           break;\r
 607       }\r
 608     }\r
 609     else\r
 610     {\r
 611       /* update return status */\r
 612       status = HAL_ERROR;\r
 613     }\r
 614   }\r
 615   return status;\r
 616 }\r
 617 \r
 618 /**\r
 619   * @brief  Unregister a user DFSDM channel callback.\r
 620   *         DFSDM channel callback is redirected to the weak predefined callback.\r
 621   * @param  hdfsdm_channel DFSDM channel handle.\r
 622   * @param  CallbackID ID of the callback to be unregistered.\r
 623   *         This parameter can be one of the following values:\r
 624   *           @arg @ref HAL_DFSDM_CHANNEL_CKAB_CB_ID clock absence detection callback ID.\r
 625   *           @arg @ref HAL_DFSDM_CHANNEL_SCD_CB_ID short circuit detection callback ID.\r
 626   *           @arg @ref HAL_DFSDM_CHANNEL_MSPINIT_CB_ID MSP init callback ID.\r
 627   *           @arg @ref HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID MSP de-init callback ID.\r
 628   * @retval HAL status.\r
 629   */\r
 630 HAL_StatusTypeDef HAL_DFSDM_Channel_UnRegisterCallback(DFSDM_Channel_HandleTypeDef        *hdfsdm_channel,\r
 631                                                        HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID)\r
 632 {\r
 633   HAL_StatusTypeDef status = HAL_OK;\r
 634 \r
 635   if (HAL_DFSDM_CHANNEL_STATE_READY == hdfsdm_channel->State)\r
 636   {\r
 637     switch (CallbackID)\r
 638     {\r
 639       case HAL_DFSDM_CHANNEL_CKAB_CB_ID :\r
 640         hdfsdm_channel->CkabCallback = HAL_DFSDM_ChannelCkabCallback;\r
 641         break;\r
 642       case HAL_DFSDM_CHANNEL_SCD_CB_ID :\r
 643         hdfsdm_channel->ScdCallback = HAL_DFSDM_ChannelScdCallback;\r
 644         break;\r
 645       case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID :\r
 646         hdfsdm_channel->MspInitCallback = HAL_DFSDM_ChannelMspInit;\r
 647         break;\r
 648       case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID :\r
 649         hdfsdm_channel->MspDeInitCallback = HAL_DFSDM_ChannelMspDeInit;\r
 650         break;\r
 651       default :\r
 652         /* update return status */\r
 653         status = HAL_ERROR;\r
 654         break;\r
 655     }\r
 656   }\r
 657   else if (HAL_DFSDM_CHANNEL_STATE_RESET == hdfsdm_channel->State)\r
 658   {\r
 659     switch (CallbackID)\r
 660     {\r
 661       case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID :\r
 662         hdfsdm_channel->MspInitCallback = HAL_DFSDM_ChannelMspInit;\r
 663         break;\r
 664       case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID :\r
 665         hdfsdm_channel->MspDeInitCallback = HAL_DFSDM_ChannelMspDeInit;\r
 666         break;\r
 667       default :\r
 668         /* update return status */\r
 669         status = HAL_ERROR;\r
 670         break;\r
 671     }\r
 672   }\r
 673   else\r
 674   {\r
 675     /* update return status */\r
 676     status = HAL_ERROR;\r
 677   }\r
 678   return status;\r
 679 }\r
 680 #endif /* USE_HAL_DFSDM_REGISTER_CALLBACKS */\r
 681 \r
 682 /**\r
 683   * @}\r
 684   */\r
 685 \r
 686 /** @defgroup DFSDM_Exported_Functions_Group2_Channel Channel operation functions\r
 687  *  @brief    Channel operation functions\r
 688  *\r
 689 @verbatim\r
 690   ==============================================================================\r
 691                    ##### Channel operation functions #####\r
 692   ==============================================================================\r
 693     [..]  This section provides functions allowing to:\r
 694       (+) Manage clock absence detector feature.\r
 695       (+) Manage short circuit detector feature.\r
 696       (+) Get analog watchdog value.\r
 697       (+) Modify offset value.\r
 698 @endverbatim\r
 699   * @{\r
 700   */\r
 701 \r
 702 /**\r
 703   * @brief  This function allows to start clock absence detection in polling mode.\r
 704   * @note   Same mode has to be used for all channels.\r
 705   * @note   If clock is not available on this channel during 5 seconds,\r
 706   *         clock absence detection will not be activated and function\r
 707   *         will return HAL_TIMEOUT error.\r
 708   * @param  hdfsdm_channel DFSDM channel handle.\r
 709   * @retval HAL status\r
 710   */\r
 711 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)\r
 712 {\r
 713   HAL_StatusTypeDef status = HAL_OK;\r
 714   uint32_t channel;\r
 715   uint32_t tickstart;\r
 716 \r
 717   /* Check parameters */\r
 718   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));\r
 719 \r
 720   /* Check DFSDM channel state */\r
 721   if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)\r
 722   {\r
 723     /* Return error status */\r
 724     status = HAL_ERROR;\r
 725   }\r
 726   else\r
 727   {\r
 728     /* Get channel number from channel instance */\r
 729     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);\r
 730 \r
 731     /* Get timeout */\r
 732     tickstart = HAL_GetTick();\r
 733 \r
 734     /* Clear clock absence flag */\r
 735     while ((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1U) != 0U)\r
 736     {\r
 737       DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));\r
 738 \r
 739       /* Check the Timeout */\r
 740       if ((HAL_GetTick() - tickstart) > DFSDM_CKAB_TIMEOUT)\r
 741       {\r
 742         /* Set timeout status */\r
 743         status = HAL_TIMEOUT;\r
 744         break;\r
 745       }\r
 746     }\r
 747 \r
 748     if (status == HAL_OK)\r
 749     {\r
 750       /* Start clock absence detection */\r
 751       hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN;\r
 752     }\r
 753   }\r
 754   /* Return function status */\r
 755   return status;\r
 756 }\r
 757 \r
 758 /**\r
 759   * @brief  This function allows to poll for the clock absence detection.\r
 760   * @param  hdfsdm_channel DFSDM channel handle.\r
 761   * @param  Timeout Timeout value in milliseconds.\r
 762   * @retval HAL status\r
 763   */\r
 764 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,\r
 765                                                uint32_t Timeout)\r
 766 {\r
 767   uint32_t tickstart;\r
 768   uint32_t channel;\r
 769 \r
 770   /* Check parameters */\r
 771   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));\r
 772 \r
 773   /* Check DFSDM channel state */\r
 774   if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)\r
 775   {\r
 776     /* Return error status */\r
 777     return HAL_ERROR;\r
 778   }\r
 779   else\r
 780   {\r
 781     /* Get channel number from channel instance */\r
 782     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);\r
 783 \r
 784     /* Get timeout */\r
 785     tickstart = HAL_GetTick();\r
 786 \r
 787     /* Wait clock absence detection */\r
 788     while ((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1U) == 0U)\r
 789     {\r
 790       /* Check the Timeout */\r
 791       if (Timeout != HAL_MAX_DELAY)\r
 792       {\r
 793         if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))\r
 794         {\r
 795           /* Return timeout status */\r
 796           return HAL_TIMEOUT;\r
 797         }\r
 798       }\r
 799     }\r
 800 \r
 801     /* Clear clock absence detection flag */\r
 802     DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));\r
 803 \r
 804     /* Return function status */\r
 805     return HAL_OK;\r
 806   }\r
 807 }\r
 808 \r
 809 /**\r
 810   * @brief  This function allows to stop clock absence detection in polling mode.\r
 811   * @param  hdfsdm_channel DFSDM channel handle.\r
 812   * @retval HAL status\r
 813   */\r
 814 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)\r
 815 {\r
 816   HAL_StatusTypeDef status = HAL_OK;\r
 817   uint32_t channel;\r
 818 \r
 819   /* Check parameters */\r
 820   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));\r
 821 \r
 822   /* Check DFSDM channel state */\r
 823   if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)\r
 824   {\r
 825     /* Return error status */\r
 826     status = HAL_ERROR;\r
 827   }\r
 828   else\r
 829   {\r
 830     /* Stop clock absence detection */\r
 831     hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);\r
 832 \r
 833     /* Clear clock absence flag */\r
 834     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);\r
 835     DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));\r
 836   }\r
 837   /* Return function status */\r
 838   return status;\r
 839 }\r
 840 \r
 841 /**\r
 842   * @brief  This function allows to start clock absence detection in interrupt mode.\r
 843   * @note   Same mode has to be used for all channels.\r
 844   * @note   If clock is not available on this channel during 5 seconds,\r
 845   *         clock absence detection will not be activated and function\r
 846   *         will return HAL_TIMEOUT error.\r
 847   * @param  hdfsdm_channel DFSDM channel handle.\r
 848   * @retval HAL status\r
 849   */\r
 850 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)\r
 851 {\r
 852   HAL_StatusTypeDef status = HAL_OK;\r
 853   uint32_t channel;\r
 854   uint32_t tickstart;\r
 855 \r
 856   /* Check parameters */\r
 857   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));\r
 858 \r
 859   /* Check DFSDM channel state */\r
 860   if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)\r
 861   {\r
 862     /* Return error status */\r
 863     status = HAL_ERROR;\r
 864   }\r
 865   else\r
 866   {\r
 867     /* Get channel number from channel instance */\r
 868     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);\r
 869 \r
 870     /* Get timeout */\r
 871     tickstart = HAL_GetTick();\r
 872 \r
 873     /* Clear clock absence flag */\r
 874     while ((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1U) != 0U)\r
 875     {\r
 876       DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));\r
 877 \r
 878       /* Check the Timeout */\r
 879       if ((HAL_GetTick() - tickstart) > DFSDM_CKAB_TIMEOUT)\r
 880       {\r
 881         /* Set timeout status */\r
 882         status = HAL_TIMEOUT;\r
 883         break;\r
 884       }\r
 885     }\r
 886 \r
 887     if (status == HAL_OK)\r
 888     {\r
 889       /* Activate clock absence detection interrupt */\r
 890       DFSDM1_Filter0->FLTCR2 |= DFSDM_FLTCR2_CKABIE;\r
 891 \r
 892       /* Start clock absence detection */\r
 893       hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN;\r
 894     }\r
 895   }\r
 896   /* Return function status */\r
 897   return status;\r
 898 }\r
 899 \r
 900 /**\r
 901   * @brief  Clock absence detection callback.\r
 902   * @param  hdfsdm_channel DFSDM channel handle.\r
 903   * @retval None\r
 904   */\r
 905 __weak void HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)\r
 906 {\r
 907   /* Prevent unused argument(s) compilation warning */\r
 908   UNUSED(hdfsdm_channel);\r
 909 \r
 910   /* NOTE : This function should not be modified, when the callback is needed,\r
 911             the HAL_DFSDM_ChannelCkabCallback could be implemented in the user file\r
 912    */\r
 913 }\r
 914 \r
 915 /**\r
 916   * @brief  This function allows to stop clock absence detection in interrupt mode.\r
 917   * @note   Interrupt will be disabled for all channels\r
 918   * @param  hdfsdm_channel DFSDM channel handle.\r
 919   * @retval HAL status\r
 920   */\r
 921 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)\r
 922 {\r
 923   HAL_StatusTypeDef status = HAL_OK;\r
 924   uint32_t channel;\r
 925 \r
 926   /* Check parameters */\r
 927   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));\r
 928 \r
 929   /* Check DFSDM channel state */\r
 930   if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)\r
 931   {\r
 932     /* Return error status */\r
 933     status = HAL_ERROR;\r
 934   }\r
 935   else\r
 936   {\r
 937     /* Stop clock absence detection */\r
 938     hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);\r
 939 \r
 940     /* Clear clock absence flag */\r
 941     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);\r
 942     DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));\r
 943 \r
 944     /* Disable clock absence detection interrupt */\r
 945     DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_CKABIE);\r
 946   }\r
 947   /* Return function status */\r
 948   return status;\r
 949 }\r
 950 \r
 951 /**\r
 952   * @brief  This function allows to start short circuit detection in polling mode.\r
 953   * @note   Same mode has to be used for all channels\r
 954   * @param  hdfsdm_channel DFSDM channel handle.\r
 955   * @param  Threshold Short circuit detector threshold.\r
 956   *         This parameter must be a number between Min_Data = 0 and Max_Data = 255.\r
 957   * @param  BreakSignal Break signals assigned to short circuit event.\r
 958   *         This parameter can be a values combination of @ref DFSDM_BreakSignals.\r
 959   * @retval HAL status\r
 960   */\r
 961 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,\r
 962                                             uint32_t Threshold,\r
 963                                             uint32_t BreakSignal)\r
 964 {\r
 965   HAL_StatusTypeDef status = HAL_OK;\r
 966 \r
 967   /* Check parameters */\r
 968   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));\r
 969   assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));\r
 970   assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));\r
 971 \r
 972   /* Check DFSDM channel state */\r
 973   if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)\r
 974   {\r
 975     /* Return error status */\r
 976     status = HAL_ERROR;\r
 977   }\r
 978   else\r
 979   {\r
 980     /* Configure threshold and break signals */\r
 981     hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT);\r
 982     hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_Pos) | \\r
 983                                            Threshold);\r
 984 \r
 985     /* Start short circuit detection */\r
 986     hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN;\r
 987   }\r
 988   /* Return function status */\r
 989   return status;\r
 990 }\r
 991 \r
 992 /**\r
 993   * @brief  This function allows to poll for the short circuit detection.\r
 994   * @param  hdfsdm_channel DFSDM channel handle.\r
 995   * @param  Timeout Timeout value in milliseconds.\r
 996   * @retval HAL status\r
 997   */\r
 998 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,\r
 999                                               uint32_t Timeout)\r
1000 {\r
1001   uint32_t tickstart;\r
1002   uint32_t channel;\r
1003 \r
1004   /* Check parameters */\r
1005   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));\r
1006 \r
1007   /* Check DFSDM channel state */\r
1008   if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)\r
1009   {\r
1010     /* Return error status */\r
1011     return HAL_ERROR;\r
1012   }\r
1013   else\r
1014   {\r
1015     /* Get channel number from channel instance */\r
1016     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);\r
1017 \r
1018     /* Get timeout */\r
1019     tickstart = HAL_GetTick();\r
1020 \r
1021     /* Wait short circuit detection */\r
1022     while (((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_SCDF) >> (DFSDM_FLTISR_SCDF_Pos + channel)) == 0U)\r
1023     {\r
1024       /* Check the Timeout */\r
1025       if (Timeout != HAL_MAX_DELAY)\r
1026       {\r
1027         if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))\r
1028         {\r
1029           /* Return timeout status */\r
1030           return HAL_TIMEOUT;\r
1031         }\r
1032       }\r
1033     }\r
1034 \r
1035     /* Clear short circuit detection flag */\r
1036     DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel));\r
1037 \r
1038     /* Return function status */\r
1039     return HAL_OK;\r
1040   }\r
1041 }\r
1042 \r
1043 /**\r
1044   * @brief  This function allows to stop short circuit detection in polling mode.\r
1045   * @param  hdfsdm_channel DFSDM channel handle.\r
1046   * @retval HAL status\r
1047   */\r
1048 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)\r
1049 {\r
1050   HAL_StatusTypeDef status = HAL_OK;\r
1051   uint32_t channel;\r
1052 \r
1053   /* Check parameters */\r
1054   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));\r
1055 \r
1056   /* Check DFSDM channel state */\r
1057   if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)\r
1058   {\r
1059     /* Return error status */\r
1060     status = HAL_ERROR;\r
1061   }\r
1062   else\r
1063   {\r
1064     /* Stop short circuit detection */\r
1065     hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);\r
1066 \r
1067     /* Clear short circuit detection flag */\r
1068     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);\r
1069     DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel));\r
1070   }\r
1071   /* Return function status */\r
1072   return status;\r
1073 }\r
1074 \r
1075 /**\r
1076   * @brief  This function allows to start short circuit detection in interrupt mode.\r
1077   * @note   Same mode has to be used for all channels\r
1078   * @param  hdfsdm_channel DFSDM channel handle.\r
1079   * @param  Threshold Short circuit detector threshold.\r
1080   *         This parameter must be a number between Min_Data = 0 and Max_Data = 255.\r
1081   * @param  BreakSignal Break signals assigned to short circuit event.\r
1082   *         This parameter can be a values combination of @ref DFSDM_BreakSignals.\r
1083   * @retval HAL status\r
1084   */\r
1085 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,\r
1086                                                uint32_t Threshold,\r
1087                                                uint32_t BreakSignal)\r
1088 {\r
1089   HAL_StatusTypeDef status = HAL_OK;\r
1090 \r
1091   /* Check parameters */\r
1092   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));\r
1093   assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));\r
1094   assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));\r
1095 \r
1096   /* Check DFSDM channel state */\r
1097   if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)\r
1098   {\r
1099     /* Return error status */\r
1100     status = HAL_ERROR;\r
1101   }\r
1102   else\r
1103   {\r
1104     /* Activate short circuit detection interrupt */\r
1105     DFSDM1_Filter0->FLTCR2 |= DFSDM_FLTCR2_SCDIE;\r
1106 \r
1107     /* Configure threshold and break signals */\r
1108     hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT);\r
1109     hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_Pos) | \\r
1110                                            Threshold);\r
1111 \r
1112     /* Start short circuit detection */\r
1113     hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN;\r
1114   }\r
1115   /* Return function status */\r
1116   return status;\r
1117 }\r
1118 \r
1119 /**\r
1120   * @brief  Short circuit detection callback.\r
1121   * @param  hdfsdm_channel DFSDM channel handle.\r
1122   * @retval None\r
1123   */\r
1124 __weak void HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)\r
1125 {\r
1126   /* Prevent unused argument(s) compilation warning */\r
1127   UNUSED(hdfsdm_channel);\r
1128 \r
1129   /* NOTE : This function should not be modified, when the callback is needed,\r
1130             the HAL_DFSDM_ChannelScdCallback could be implemented in the user file\r
1131    */\r
1132 }\r
1133 \r
1134 /**\r
1135   * @brief  This function allows to stop short circuit detection in interrupt mode.\r
1136   * @note   Interrupt will be disabled for all channels\r
1137   * @param  hdfsdm_channel DFSDM channel handle.\r
1138   * @retval HAL status\r
1139   */\r
1140 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)\r
1141 {\r
1142   HAL_StatusTypeDef status = HAL_OK;\r
1143   uint32_t channel;\r
1144 \r
1145   /* Check parameters */\r
1146   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));\r
1147 \r
1148   /* Check DFSDM channel state */\r
1149   if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)\r
1150   {\r
1151     /* Return error status */\r
1152     status = HAL_ERROR;\r
1153   }\r
1154   else\r
1155   {\r
1156     /* Stop short circuit detection */\r
1157     hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);\r
1158 \r
1159     /* Clear short circuit detection flag */\r
1160     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);\r
1161     DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel));\r
1162 \r
1163     /* Disable short circuit detection interrupt */\r
1164     DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_SCDIE);\r
1165   }\r
1166   /* Return function status */\r
1167   return status;\r
1168 }\r
1169 \r
1170 /**\r
1171   * @brief  This function allows to get channel analog watchdog value.\r
1172   * @param  hdfsdm_channel DFSDM channel handle.\r
1173   * @retval Channel analog watchdog value.\r
1174   */\r
1175 int16_t HAL_DFSDM_ChannelGetAwdValue(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)\r
1176 {\r
1177   return (int16_t) hdfsdm_channel->Instance->CHWDATAR;\r
1178 }\r
1179 \r
1180 /**\r
1181   * @brief  This function allows to modify channel offset value.\r
1182   * @param  hdfsdm_channel DFSDM channel handle.\r
1183   * @param  Offset DFSDM channel offset.\r
1184   *         This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607.\r
1185   * @retval HAL status.\r
1186   */\r
1187 HAL_StatusTypeDef HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,\r
1188                                                 int32_t Offset)\r
1189 {\r
1190   HAL_StatusTypeDef status = HAL_OK;\r
1191 \r
1192   /* Check parameters */\r
1193   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));\r
1194   assert_param(IS_DFSDM_CHANNEL_OFFSET(Offset));\r
1195 \r
1196   /* Check DFSDM channel state */\r
1197   if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)\r
1198   {\r
1199     /* Return error status */\r
1200     status = HAL_ERROR;\r
1201   }\r
1202   else\r
1203   {\r
1204     /* Modify channel offset */\r
1205     hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET);\r
1206     hdfsdm_channel->Instance->CHCFGR2 |= ((uint32_t) Offset << DFSDM_CHCFGR2_OFFSET_Pos);\r
1207   }\r
1208   /* Return function status */\r
1209   return status;\r
1210 }\r
1211 \r
1212 /**\r
1213   * @}\r
1214   */\r
1215 \r
1216 /** @defgroup DFSDM_Exported_Functions_Group3_Channel Channel state function\r
1217  *  @brief    Channel state function\r
1218  *\r
1219 @verbatim\r
1220   ==============================================================================\r
1221                    ##### Channel state function #####\r
1222   ==============================================================================\r
1223     [..]  This section provides function allowing to:\r
1224       (+) Get channel handle state.\r
1225 @endverbatim\r
1226   * @{\r
1227   */\r
1228 \r
1229 /**\r
1230   * @brief  This function allows to get the current DFSDM channel handle state.\r
1231   * @param  hdfsdm_channel DFSDM channel handle.\r
1232   * @retval DFSDM channel state.\r
1233   */\r
1234 HAL_DFSDM_Channel_StateTypeDef HAL_DFSDM_ChannelGetState(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)\r
1235 {\r
1236   /* Return DFSDM channel handle state */\r
1237   return hdfsdm_channel->State;\r
1238 }\r
1239 \r
1240 /**\r
1241   * @}\r
1242   */\r
1243 \r
1244 /** @defgroup DFSDM_Exported_Functions_Group1_Filter Filter initialization and de-initialization functions\r
1245  *  @brief    Filter initialization and de-initialization functions\r
1246  *\r
1247 @verbatim\r
1248   ==============================================================================\r
1249         ##### Filter initialization and de-initialization functions #####\r
1250   ==============================================================================\r
1251     [..]  This section provides functions allowing to:\r
1252       (+) Initialize the DFSDM filter.\r
1253       (+) De-initialize the DFSDM filter.\r
1254 @endverbatim\r
1255   * @{\r
1256   */\r
1257 \r
1258 /**\r
1259   * @brief  Initialize the DFSDM filter according to the specified parameters\r
1260   *         in the DFSDM_FilterInitTypeDef structure and initialize the associated handle.\r
1261   * @param  hdfsdm_filter DFSDM filter handle.\r
1262   * @retval HAL status.\r
1263   */\r
1264 HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)\r
1265 {\r
1266   /* Check DFSDM Channel handle */\r
1267   if (hdfsdm_filter == NULL)\r
1268   {\r
1269     return HAL_ERROR;\r
1270   }\r
1271 \r
1272   /* Check parameters */\r
1273   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));\r
1274   assert_param(IS_DFSDM_FILTER_REG_TRIGGER(hdfsdm_filter->Init.RegularParam.Trigger));\r
1275   assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.FastMode));\r
1276   assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.DmaMode));\r
1277   assert_param(IS_DFSDM_FILTER_INJ_TRIGGER(hdfsdm_filter->Init.InjectedParam.Trigger));\r
1278   assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.ScanMode));\r
1279   assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.DmaMode));\r
1280   assert_param(IS_DFSDM_FILTER_SINC_ORDER(hdfsdm_filter->Init.FilterParam.SincOrder));\r
1281   assert_param(IS_DFSDM_FILTER_OVS_RATIO(hdfsdm_filter->Init.FilterParam.Oversampling));\r
1282   assert_param(IS_DFSDM_FILTER_INTEGRATOR_OVS_RATIO(hdfsdm_filter->Init.FilterParam.IntOversampling));\r
1283 \r
1284   /* Check parameters compatibility */\r
1285   if ((hdfsdm_filter->Instance == DFSDM1_Filter0) &&\r
1286       ((hdfsdm_filter->Init.RegularParam.Trigger  == DFSDM_FILTER_SYNC_TRIGGER) ||\r
1287        (hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER)))\r
1288   {\r
1289     return HAL_ERROR;\r
1290   }\r
1291 \r
1292   /* Initialize DFSDM filter variables with default values */\r
1293   hdfsdm_filter->RegularContMode     = DFSDM_CONTINUOUS_CONV_OFF;\r
1294   hdfsdm_filter->InjectedChannelsNbr = 1;\r
1295   hdfsdm_filter->InjConvRemaining    = 1;\r
1296   hdfsdm_filter->ErrorCode           = DFSDM_FILTER_ERROR_NONE;\r
1297 \r
1298 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)\r
1299   /* Reset callback pointers to the weak predefined callbacks */\r
1300   hdfsdm_filter->AwdCallback             = HAL_DFSDM_FilterAwdCallback;\r
1301   hdfsdm_filter->RegConvCpltCallback     = HAL_DFSDM_FilterRegConvCpltCallback;\r
1302   hdfsdm_filter->RegConvHalfCpltCallback = HAL_DFSDM_FilterRegConvHalfCpltCallback;\r
1303   hdfsdm_filter->InjConvCpltCallback     = HAL_DFSDM_FilterInjConvCpltCallback;\r
1304   hdfsdm_filter->InjConvHalfCpltCallback = HAL_DFSDM_FilterInjConvHalfCpltCallback;\r
1305   hdfsdm_filter->ErrorCallback           = HAL_DFSDM_FilterErrorCallback;\r
1306 \r
1307   /* Call MSP init function */\r
1308   if (hdfsdm_filter->MspInitCallback == NULL)\r
1309   {\r
1310     hdfsdm_filter->MspInitCallback = HAL_DFSDM_FilterMspInit;\r
1311   }\r
1312   hdfsdm_filter->MspInitCallback(hdfsdm_filter);\r
1313 #else\r
1314   /* Call MSP init function */\r
1315   HAL_DFSDM_FilterMspInit(hdfsdm_filter);\r
1316 #endif\r
1317 \r
1318   /* Set regular parameters */\r
1319   hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);\r
1320   if (hdfsdm_filter->Init.RegularParam.FastMode == ENABLE)\r
1321   {\r
1322     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_FAST;\r
1323   }\r
1324   else\r
1325   {\r
1326     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_FAST);\r
1327   }\r
1328 \r
1329   if (hdfsdm_filter->Init.RegularParam.DmaMode == ENABLE)\r
1330   {\r
1331     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RDMAEN;\r
1332   }\r
1333   else\r
1334   {\r
1335     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RDMAEN);\r
1336   }\r
1337 \r
1338   /* Set injected parameters */\r
1339   hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC | DFSDM_FLTCR1_JEXTEN | DFSDM_FLTCR1_JEXTSEL);\r
1340   if (hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_EXT_TRIGGER)\r
1341   {\r
1342     assert_param(IS_DFSDM_FILTER_EXT_TRIG(hdfsdm_filter->Init.InjectedParam.ExtTrigger));\r
1343     assert_param(IS_DFSDM_FILTER_EXT_TRIG_EDGE(hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge));\r
1344     hdfsdm_filter->Instance->FLTCR1 |= (hdfsdm_filter->Init.InjectedParam.ExtTrigger);\r
1345   }\r
1346 \r
1347   if (hdfsdm_filter->Init.InjectedParam.ScanMode == ENABLE)\r
1348   {\r
1349     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSCAN;\r
1350   }\r
1351   else\r
1352   {\r
1353     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSCAN);\r
1354   }\r
1355 \r
1356   if (hdfsdm_filter->Init.InjectedParam.DmaMode == ENABLE)\r
1357   {\r
1358     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JDMAEN;\r
1359   }\r
1360   else\r
1361   {\r
1362     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JDMAEN);\r
1363   }\r
1364 \r
1365   /* Set filter parameters */\r
1366   hdfsdm_filter->Instance->FLTFCR &= ~(DFSDM_FLTFCR_FORD | DFSDM_FLTFCR_FOSR | DFSDM_FLTFCR_IOSR);\r
1367   hdfsdm_filter->Instance->FLTFCR |= (hdfsdm_filter->Init.FilterParam.SincOrder |\r
1368                                       ((hdfsdm_filter->Init.FilterParam.Oversampling - 1U) << DFSDM_FLTFCR_FOSR_Pos) |\r
1369                                       (hdfsdm_filter->Init.FilterParam.IntOversampling - 1U));\r
1370 \r
1371   /* Store regular and injected triggers and injected scan mode*/\r
1372   hdfsdm_filter->RegularTrigger   = hdfsdm_filter->Init.RegularParam.Trigger;\r
1373   hdfsdm_filter->InjectedTrigger  = hdfsdm_filter->Init.InjectedParam.Trigger;\r
1374   hdfsdm_filter->ExtTriggerEdge   = hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge;\r
1375   hdfsdm_filter->InjectedScanMode = hdfsdm_filter->Init.InjectedParam.ScanMode;\r
1376 \r
1377   /* Enable DFSDM filter */\r
1378   hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;\r
1379 \r
1380   /* Set DFSDM filter to ready state */\r
1381   hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_READY;\r
1382 \r
1383   return HAL_OK;\r
1384 }\r
1385 \r
1386 /**\r
1387   * @brief  De-initializes the DFSDM filter.\r
1388   * @param  hdfsdm_filter DFSDM filter handle.\r
1389   * @retval HAL status.\r
1390   */\r
1391 HAL_StatusTypeDef HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)\r
1392 {\r
1393   /* Check DFSDM filter handle */\r
1394   if (hdfsdm_filter == NULL)\r
1395   {\r
1396     return HAL_ERROR;\r
1397   }\r
1398 \r
1399   /* Check parameters */\r
1400   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));\r
1401 \r
1402   /* Disable the DFSDM filter */\r
1403   hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);\r
1404 \r
1405   /* Call MSP deinit function */\r
1406 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)\r
1407   if (hdfsdm_filter->MspDeInitCallback == NULL)\r
1408   {\r
1409     hdfsdm_filter->MspDeInitCallback = HAL_DFSDM_FilterMspDeInit;\r
1410   }\r
1411   hdfsdm_filter->MspDeInitCallback(hdfsdm_filter);\r
1412 #else\r
1413   HAL_DFSDM_FilterMspDeInit(hdfsdm_filter);\r
1414 #endif\r
1415 \r
1416   /* Set DFSDM filter in reset state */\r
1417   hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_RESET;\r
1418 \r
1419   return HAL_OK;\r
1420 }\r
1421 \r
1422 /**\r
1423   * @brief  Initializes the DFSDM filter MSP.\r
1424   * @param  hdfsdm_filter DFSDM filter handle.\r
1425   * @retval None\r
1426   */\r
1427 __weak void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)\r
1428 {\r
1429   /* Prevent unused argument(s) compilation warning */\r
1430   UNUSED(hdfsdm_filter);\r
1431 \r
1432   /* NOTE : This function should not be modified, when the function is needed,\r
1433             the HAL_DFSDM_FilterMspInit could be implemented in the user file.\r
1434    */\r
1435 }\r
1436 \r
1437 /**\r
1438   * @brief  De-initializes the DFSDM filter MSP.\r
1439   * @param  hdfsdm_filter DFSDM filter handle.\r
1440   * @retval None\r
1441   */\r
1442 __weak void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)\r
1443 {\r
1444   /* Prevent unused argument(s) compilation warning */\r
1445   UNUSED(hdfsdm_filter);\r
1446 \r
1447   /* NOTE : This function should not be modified, when the function is needed,\r
1448             the HAL_DFSDM_FilterMspDeInit could be implemented in the user file.\r
1449    */\r
1450 }\r
1451 \r
1452 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)\r
1453 /**\r
1454   * @brief  Register a user DFSDM filter callback\r
1455   *         to be used instead of the weak predefined callback.\r
1456   * @param  hdfsdm_filter DFSDM filter handle.\r
1457   * @param  CallbackID ID of the callback to be registered.\r
1458   *         This parameter can be one of the following values:\r
1459   *           @arg @ref HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID regular conversion complete callback ID.\r
1460   *           @arg @ref HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID half regular conversion complete callback ID.\r
1461   *           @arg @ref HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID injected conversion complete callback ID.\r
1462   *           @arg @ref HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID half injected conversion complete callback ID.\r
1463   *           @arg @ref HAL_DFSDM_FILTER_ERROR_CB_ID error callback ID.\r
1464   *           @arg @ref HAL_DFSDM_FILTER_MSPINIT_CB_ID MSP init callback ID.\r
1465   *           @arg @ref HAL_DFSDM_FILTER_MSPDEINIT_CB_ID MSP de-init callback ID.\r
1466   * @param  pCallback pointer to the callback function.\r
1467   * @retval HAL status.\r
1468   */\r
1469 HAL_StatusTypeDef HAL_DFSDM_Filter_RegisterCallback(DFSDM_Filter_HandleTypeDef        *hdfsdm_filter,\r
1470                                                     HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID,\r
1471                                                     pDFSDM_Filter_CallbackTypeDef      pCallback)\r
1472 {\r
1473   HAL_StatusTypeDef status = HAL_OK;\r
1474 \r
1475   if (pCallback == NULL)\r
1476   {\r
1477     /* update the error code */\r
1478     hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;\r
1479     /* update return status */\r
1480     status = HAL_ERROR;\r
1481   }\r
1482   else\r
1483   {\r
1484     if (HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State)\r
1485     {\r
1486       switch (CallbackID)\r
1487       {\r
1488         case HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID :\r
1489           hdfsdm_filter->RegConvCpltCallback = pCallback;\r
1490           break;\r
1491         case HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID :\r
1492           hdfsdm_filter->RegConvHalfCpltCallback = pCallback;\r
1493           break;\r
1494         case HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID :\r
1495           hdfsdm_filter->InjConvCpltCallback = pCallback;\r
1496           break;\r
1497         case HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID :\r
1498           hdfsdm_filter->InjConvHalfCpltCallback = pCallback;\r
1499           break;\r
1500         case HAL_DFSDM_FILTER_ERROR_CB_ID :\r
1501           hdfsdm_filter->ErrorCallback = pCallback;\r
1502           break;\r
1503         case HAL_DFSDM_FILTER_MSPINIT_CB_ID :\r
1504           hdfsdm_filter->MspInitCallback = pCallback;\r
1505           break;\r
1506         case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID :\r
1507           hdfsdm_filter->MspDeInitCallback = pCallback;\r
1508           break;\r
1509         default :\r
1510           /* update the error code */\r
1511           hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;\r
1512           /* update return status */\r
1513           status = HAL_ERROR;\r
1514           break;\r
1515       }\r
1516     }\r
1517     else if (HAL_DFSDM_FILTER_STATE_RESET == hdfsdm_filter->State)\r
1518     {\r
1519       switch (CallbackID)\r
1520       {\r
1521         case HAL_DFSDM_FILTER_MSPINIT_CB_ID :\r
1522           hdfsdm_filter->MspInitCallback = pCallback;\r
1523           break;\r
1524         case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID :\r
1525           hdfsdm_filter->MspDeInitCallback = pCallback;\r
1526           break;\r
1527         default :\r
1528           /* update the error code */\r
1529           hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;\r
1530           /* update return status */\r
1531           status = HAL_ERROR;\r
1532           break;\r
1533       }\r
1534     }\r
1535     else\r
1536     {\r
1537       /* update the error code */\r
1538       hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;\r
1539       /* update return status */\r
1540       status = HAL_ERROR;\r
1541     }\r
1542   }\r
1543   return status;\r
1544 }\r
1545 \r
1546 /**\r
1547   * @brief  Unregister a user DFSDM filter callback.\r
1548   *         DFSDM filter callback is redirected to the weak predefined callback.\r
1549   * @param  hdfsdm_filter DFSDM filter handle.\r
1550   * @param  CallbackID ID of the callback to be unregistered.\r
1551   *         This parameter can be one of the following values:\r
1552   *           @arg @ref HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID regular conversion complete callback ID.\r
1553   *           @arg @ref HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID half regular conversion complete callback ID.\r
1554   *           @arg @ref HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID injected conversion complete callback ID.\r
1555   *           @arg @ref HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID half injected conversion complete callback ID.\r
1556   *           @arg @ref HAL_DFSDM_FILTER_ERROR_CB_ID error callback ID.\r
1557   *           @arg @ref HAL_DFSDM_FILTER_MSPINIT_CB_ID MSP init callback ID.\r
1558   *           @arg @ref HAL_DFSDM_FILTER_MSPDEINIT_CB_ID MSP de-init callback ID.\r
1559   * @retval HAL status.\r
1560   */\r
1561 HAL_StatusTypeDef HAL_DFSDM_Filter_UnRegisterCallback(DFSDM_Filter_HandleTypeDef        *hdfsdm_filter,\r
1562                                                       HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID)\r
1563 {\r
1564   HAL_StatusTypeDef status = HAL_OK;\r
1565 \r
1566   if (HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State)\r
1567   {\r
1568     switch (CallbackID)\r
1569     {\r
1570       case HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID :\r
1571         hdfsdm_filter->RegConvCpltCallback = HAL_DFSDM_FilterRegConvCpltCallback;\r
1572         break;\r
1573       case HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID :\r
1574         hdfsdm_filter->RegConvHalfCpltCallback = HAL_DFSDM_FilterRegConvHalfCpltCallback;\r
1575         break;\r
1576       case HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID :\r
1577         hdfsdm_filter->InjConvCpltCallback = HAL_DFSDM_FilterInjConvCpltCallback;\r
1578         break;\r
1579       case HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID :\r
1580         hdfsdm_filter->InjConvHalfCpltCallback = HAL_DFSDM_FilterInjConvHalfCpltCallback;\r
1581         break;\r
1582       case HAL_DFSDM_FILTER_ERROR_CB_ID :\r
1583         hdfsdm_filter->ErrorCallback = HAL_DFSDM_FilterErrorCallback;\r
1584         break;\r
1585       case HAL_DFSDM_FILTER_MSPINIT_CB_ID :\r
1586         hdfsdm_filter->MspInitCallback = HAL_DFSDM_FilterMspInit;\r
1587         break;\r
1588       case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID :\r
1589         hdfsdm_filter->MspDeInitCallback = HAL_DFSDM_FilterMspDeInit;\r
1590         break;\r
1591       default :\r
1592         /* update the error code */\r
1593         hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;\r
1594         /* update return status */\r
1595         status = HAL_ERROR;\r
1596         break;\r
1597     }\r
1598   }\r
1599   else if (HAL_DFSDM_FILTER_STATE_RESET == hdfsdm_filter->State)\r
1600   {\r
1601     switch (CallbackID)\r
1602     {\r
1603       case HAL_DFSDM_FILTER_MSPINIT_CB_ID :\r
1604         hdfsdm_filter->MspInitCallback = HAL_DFSDM_FilterMspInit;\r
1605         break;\r
1606       case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID :\r
1607         hdfsdm_filter->MspDeInitCallback = HAL_DFSDM_FilterMspDeInit;\r
1608         break;\r
1609       default :\r
1610         /* update the error code */\r
1611         hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;\r
1612         /* update return status */\r
1613         status = HAL_ERROR;\r
1614         break;\r
1615     }\r
1616   }\r
1617   else\r
1618   {\r
1619     /* update the error code */\r
1620     hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;\r
1621     /* update return status */\r
1622     status = HAL_ERROR;\r
1623   }\r
1624   return status;\r
1625 }\r
1626 \r
1627 /**\r
1628   * @brief  Register a user DFSDM filter analog watchdog callback\r
1629   *         to be used instead of the weak predefined callback.\r
1630   * @param  hdfsdm_filter DFSDM filter handle.\r
1631   * @param  pCallback pointer to the DFSDM filter analog watchdog callback function.\r
1632   * @retval HAL status.\r
1633   */\r
1634 HAL_StatusTypeDef HAL_DFSDM_Filter_RegisterAwdCallback(DFSDM_Filter_HandleTypeDef      *hdfsdm_filter,\r
1635                                                        pDFSDM_Filter_AwdCallbackTypeDef pCallback)\r
1636 {\r
1637   HAL_StatusTypeDef status = HAL_OK;\r
1638 \r
1639   if (pCallback == NULL)\r
1640   {\r
1641     /* update the error code */\r
1642     hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;\r
1643     /* update return status */\r
1644     status = HAL_ERROR;\r
1645   }\r
1646   else\r
1647   {\r
1648     if (HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State)\r
1649     {\r
1650       hdfsdm_filter->AwdCallback = pCallback;\r
1651     }\r
1652     else\r
1653     {\r
1654       /* update the error code */\r
1655       hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;\r
1656       /* update return status */\r
1657       status = HAL_ERROR;\r
1658     }\r
1659   }\r
1660   return status;\r
1661 }\r
1662 \r
1663 /**\r
1664   * @brief  Unregister a user DFSDM filter analog watchdog callback.\r
1665   *         DFSDM filter AWD callback is redirected to the weak predefined callback.\r
1666   * @param  hdfsdm_filter DFSDM filter handle.\r
1667   * @retval HAL status.\r
1668   */\r
1669 HAL_StatusTypeDef HAL_DFSDM_Filter_UnRegisterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)\r
1670 {\r
1671   HAL_StatusTypeDef status = HAL_OK;\r
1672 \r
1673   if (HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State)\r
1674   {\r
1675     hdfsdm_filter->AwdCallback = HAL_DFSDM_FilterAwdCallback;\r
1676   }\r
1677   else\r
1678   {\r
1679     /* update the error code */\r
1680     hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;\r
1681     /* update return status */\r
1682     status = HAL_ERROR;\r
1683   }\r
1684   return status;\r
1685 }\r
1686 #endif /* USE_HAL_DFSDM_REGISTER_CALLBACKS */\r
1687 \r
1688 /**\r
1689   * @}\r
1690   */\r
1691 \r
1692 /** @defgroup DFSDM_Exported_Functions_Group2_Filter Filter control functions\r
1693  *  @brief    Filter control functions\r
1694  *\r
1695 @verbatim\r
1696   ==============================================================================\r
1697                     ##### Filter control functions #####\r
1698   ==============================================================================\r
1699     [..]  This section provides functions allowing to:\r
1700       (+) Select channel and enable/disable continuous mode for regular conversion.\r
1701       (+) Select channels for injected conversion.\r
1702 @endverbatim\r
1703   * @{\r
1704   */\r
1705 \r
1706 /**\r
1707   * @brief  This function allows to select channel and to enable/disable\r
1708   *         continuous mode for regular conversion.\r
1709   * @param  hdfsdm_filter DFSDM filter handle.\r
1710   * @param  Channel Channel for regular conversion.\r
1711   *         This parameter can be a value of @ref DFSDM_Channel_Selection.\r
1712   * @param  ContinuousMode Enable/disable continuous mode for regular conversion.\r
1713   *         This parameter can be a value of @ref DFSDM_ContinuousMode.\r
1714   * @retval HAL status\r
1715   */\r
1716 HAL_StatusTypeDef HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,\r
1717                                                    uint32_t                    Channel,\r
1718                                                    uint32_t                    ContinuousMode)\r
1719 {\r
1720   HAL_StatusTypeDef status = HAL_OK;\r
1721 \r
1722   /* Check parameters */\r
1723   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));\r
1724   assert_param(IS_DFSDM_REGULAR_CHANNEL(Channel));\r
1725   assert_param(IS_DFSDM_CONTINUOUS_MODE(ContinuousMode));\r
1726 \r
1727   /* Check DFSDM filter state */\r
1728   if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&\r
1729       (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))\r
1730   {\r
1731     /* Configure channel and continuous mode for regular conversion */\r
1732     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RCH | DFSDM_FLTCR1_RCONT);\r
1733     if (ContinuousMode == DFSDM_CONTINUOUS_CONV_ON)\r
1734     {\r
1735       hdfsdm_filter->Instance->FLTCR1 |= (uint32_t)(((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET) |\r
1736                                                     DFSDM_FLTCR1_RCONT);\r
1737     }\r
1738     else\r
1739     {\r
1740       hdfsdm_filter->Instance->FLTCR1 |= (uint32_t)((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET);\r
1741     }\r
1742     /* Store continuous mode information */\r
1743     hdfsdm_filter->RegularContMode = ContinuousMode;\r
1744   }\r
1745   else\r
1746   {\r
1747     status = HAL_ERROR;\r
1748   }\r
1749 \r
1750   /* Return function status */\r
1751   return status;\r
1752 }\r
1753 \r
1754 /**\r
1755   * @brief  This function allows to select channels for injected conversion.\r
1756   * @param  hdfsdm_filter DFSDM filter handle.\r
1757   * @param  Channel Channels for injected conversion.\r
1758   *         This parameter can be a values combination of @ref DFSDM_Channel_Selection.\r
1759   * @retval HAL status\r
1760   */\r
1761 HAL_StatusTypeDef HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,\r
1762                                                    uint32_t                    Channel)\r
1763 {\r
1764   HAL_StatusTypeDef status = HAL_OK;\r
1765 \r
1766   /* Check parameters */\r
1767   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));\r
1768   assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));\r
1769 \r
1770   /* Check DFSDM filter state */\r
1771   if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&\r
1772       (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))\r
1773   {\r
1774     /* Configure channel for injected conversion */\r
1775     hdfsdm_filter->Instance->FLTJCHGR = (uint32_t)(Channel & DFSDM_LSB_MASK);\r
1776     /* Store number of injected channels */\r
1777     hdfsdm_filter->InjectedChannelsNbr = DFSDM_GetInjChannelsNbr(Channel);\r
1778     /* Update number of injected channels remaining */\r
1779     hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \\r
1780                                       hdfsdm_filter->InjectedChannelsNbr : 1U;\r
1781   }\r
1782   else\r
1783   {\r
1784     status = HAL_ERROR;\r
1785   }\r
1786   /* Return function status */\r
1787   return status;\r
1788 }\r
1789 \r
1790 /**\r
1791   * @}\r
1792   */\r
1793 \r
1794 /** @defgroup DFSDM_Exported_Functions_Group3_Filter Filter operation functions\r
1795  *  @brief    Filter operation functions\r
1796  *\r
1797 @verbatim\r
1798   ==============================================================================\r
1799                     ##### Filter operation functions #####\r
1800   ==============================================================================\r
1801     [..]  This section provides functions allowing to:\r
1802       (+) Start conversion of regular/injected channel.\r
1803       (+) Poll for the end of regular/injected conversion.\r
1804       (+) Stop conversion of regular/injected channel.\r
1805       (+) Start conversion of regular/injected channel and enable interrupt.\r
1806       (+) Call the callback functions at the end of regular/injected conversions.\r
1807       (+) Stop conversion of regular/injected channel and disable interrupt.\r
1808       (+) Start conversion of regular/injected channel and enable DMA transfer.\r
1809       (+) Stop conversion of regular/injected channel and disable DMA transfer.\r
1810       (+) Start analog watchdog and enable interrupt.\r
1811       (+) Call the callback function when analog watchdog occurs.\r
1812       (+) Stop analog watchdog and disable interrupt.\r
1813       (+) Start extreme detector.\r
1814       (+) Stop extreme detector.\r
1815       (+) Get result of regular channel conversion.\r
1816       (+) Get result of injected channel conversion.\r
1817       (+) Get extreme detector maximum and minimum values.\r
1818       (+) Get conversion time.\r
1819       (+) Handle DFSDM interrupt request.\r
1820 @endverbatim\r
1821   * @{\r
1822   */\r
1823 \r
1824 /**\r
1825   * @brief  This function allows to start regular conversion in polling mode.\r
1826   * @note   This function should be called only when DFSDM filter instance is\r
1827   *         in idle state or if injected conversion is ongoing.\r
1828   * @param  hdfsdm_filter DFSDM filter handle.\r
1829   * @retval HAL status\r
1830   */\r
1831 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)\r
1832 {\r
1833   HAL_StatusTypeDef status = HAL_OK;\r
1834 \r
1835   /* Check parameters */\r
1836   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));\r
1837 \r
1838   /* Check DFSDM filter state */\r
1839   if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \\r
1840       (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))\r
1841   {\r
1842     /* Start regular conversion */\r
1843     DFSDM_RegConvStart(hdfsdm_filter);\r
1844   }\r
1845   else\r
1846   {\r
1847     status = HAL_ERROR;\r
1848   }\r
1849   /* Return function status */\r
1850   return status;\r
1851 }\r
1852 \r
1853 /**\r
1854   * @brief  This function allows to poll for the end of regular conversion.\r
1855   * @note   This function should be called only if regular conversion is ongoing.\r
1856   * @param  hdfsdm_filter DFSDM filter handle.\r
1857   * @param  Timeout Timeout value in milliseconds.\r
1858   * @retval HAL status\r
1859   */\r
1860 HAL_StatusTypeDef HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,\r
1861                                                        uint32_t                    Timeout)\r
1862 {\r
1863   uint32_t tickstart;\r
1864 \r
1865   /* Check parameters */\r
1866   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));\r
1867 \r
1868   /* Check DFSDM filter state */\r
1869   if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \\r
1870       (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))\r
1871   {\r
1872     /* Return error status */\r
1873     return HAL_ERROR;\r
1874   }\r
1875   else\r
1876   {\r
1877     /* Get timeout */\r
1878     tickstart = HAL_GetTick();\r
1879 \r
1880     /* Wait end of regular conversion */\r
1881     while ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_REOCF) != DFSDM_FLTISR_REOCF)\r
1882     {\r
1883       /* Check the Timeout */\r
1884       if (Timeout != HAL_MAX_DELAY)\r
1885       {\r
1886         if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))\r
1887         {\r
1888           /* Return timeout status */\r
1889           return HAL_TIMEOUT;\r
1890         }\r
1891       }\r
1892     }\r
1893     /* Check if overrun occurs */\r
1894     if ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_ROVRF) == DFSDM_FLTISR_ROVRF)\r
1895     {\r
1896       /* Update error code and call error callback */\r
1897       hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;\r
1898 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)\r
1899       hdfsdm_filter->ErrorCallback(hdfsdm_filter);\r
1900 #else\r
1901       HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);\r
1902 #endif\r
1903 \r
1904       /* Clear regular overrun flag */\r
1905       hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;\r
1906     }\r
1907     /* Update DFSDM filter state only if not continuous conversion and SW trigger */\r
1908     if ((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \\r
1909         (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))\r
1910     {\r
1911       hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \\r
1912                              HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;\r
1913     }\r
1914     /* Return function status */\r
1915     return HAL_OK;\r
1916   }\r
1917 }\r
1918 \r
1919 /**\r
1920   * @brief  This function allows to stop regular conversion in polling mode.\r
1921   * @note   This function should be called only if regular conversion is ongoing.\r
1922   * @param  hdfsdm_filter DFSDM filter handle.\r
1923   * @retval HAL status\r
1924   */\r
1925 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)\r
1926 {\r
1927   HAL_StatusTypeDef status = HAL_OK;\r
1928 \r
1929   /* Check parameters */\r
1930   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));\r
1931 \r
1932   /* Check DFSDM filter state */\r
1933   if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \\r
1934       (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))\r
1935   {\r
1936     /* Return error status */\r
1937     status = HAL_ERROR;\r
1938   }\r
1939   else\r
1940   {\r
1941     /* Stop regular conversion */\r
1942     DFSDM_RegConvStop(hdfsdm_filter);\r
1943   }\r
1944   /* Return function status */\r
1945   return status;\r
1946 }\r
1947 \r
1948 /**\r
1949   * @brief  This function allows to start regular conversion in interrupt mode.\r
1950   * @note   This function should be called only when DFSDM filter instance is\r
1951   *         in idle state or if injected conversion is ongoing.\r
1952   * @param  hdfsdm_filter DFSDM filter handle.\r
1953   * @retval HAL status\r
1954   */\r
1955 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)\r
1956 {\r
1957   HAL_StatusTypeDef status = HAL_OK;\r
1958 \r
1959   /* Check parameters */\r
1960   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));\r
1961 \r
1962   /* Check DFSDM filter state */\r
1963   if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \\r
1964       (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))\r
1965   {\r
1966     /* Enable interrupts for regular conversions */\r
1967     hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE);\r
1968 \r
1969     /* Start regular conversion */\r
1970     DFSDM_RegConvStart(hdfsdm_filter);\r
1971   }\r
1972   else\r
1973   {\r
1974     status = HAL_ERROR;\r
1975   }\r
1976   /* Return function status */\r
1977   return status;\r
1978 }\r
1979 \r
1980 /**\r
1981   * @brief  This function allows to stop regular conversion in interrupt mode.\r
1982   * @note   This function should be called only if regular conversion is ongoing.\r
1983   * @param  hdfsdm_filter DFSDM filter handle.\r
1984   * @retval HAL status\r
1985   */\r
1986 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)\r
1987 {\r
1988   HAL_StatusTypeDef status = HAL_OK;\r
1989 \r
1990   /* Check parameters */\r
1991   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));\r
1992 \r
1993   /* Check DFSDM filter state */\r
1994   if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \\r
1995       (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))\r
1996   {\r
1997     /* Return error status */\r
1998     status = HAL_ERROR;\r
1999   }\r
2000   else\r
2001   {\r
2002     /* Disable interrupts for regular conversions */\r
2003     hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE);\r
2004 \r
2005     /* Stop regular conversion */\r
2006     DFSDM_RegConvStop(hdfsdm_filter);\r
2007   }\r
2008   /* Return function status */\r
2009   return status;\r
2010 }\r
2011 \r
2012 /**\r
2013   * @brief  This function allows to start regular conversion in DMA mode.\r
2014   * @note   This function should be called only when DFSDM filter instance is\r
2015   *         in idle state or if injected conversion is ongoing.\r
2016   *         Please note that data on buffer will contain signed regular conversion\r
2017   *         value on 24 most significant bits and corresponding channel on 3 least\r
2018   *         significant bits.\r
2019   * @param  hdfsdm_filter DFSDM filter handle.\r
2020   * @param  pData The destination buffer address.\r
2021   * @param  Length The length of data to be transferred from DFSDM filter to memory.\r
2022   * @retval HAL status\r
2023   */\r
2024 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,\r
2025                                                    int32_t                    *pData,\r
2026                                                    uint32_t                    Length)\r
2027 {\r
2028   HAL_StatusTypeDef status = HAL_OK;\r
2029 \r
2030   /* Check parameters */\r
2031   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));\r
2032 \r
2033   /* Check destination address and length */\r
2034   if ((pData == NULL) || (Length == 0U))\r
2035   {\r
2036     status = HAL_ERROR;\r
2037   }\r
2038   /* Check that DMA is enabled for regular conversion */\r
2039   else if ((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)\r
2040   {\r
2041     status = HAL_ERROR;\r
2042   }\r
2043   /* Check parameters compatibility */\r
2044   else if ((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \\r
2045            (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \\r
2046            (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \\r
2047            (Length != 1U))\r
2048   {\r
2049     status = HAL_ERROR;\r
2050   }\r
2051   else if ((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \\r
2052            (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \\r
2053            (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))\r
2054   {\r
2055     status = HAL_ERROR;\r
2056   }\r
2057   /* Check DFSDM filter state */\r
2058   else if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \\r
2059            (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))\r
2060   {\r
2061     /* Set callbacks on DMA handler */\r
2062     hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;\r
2063     hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;\r
2064     hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ? \\r
2065                                                    DFSDM_DMARegularHalfConvCplt : NULL;\r
2066 \r
2067     /* Start DMA in interrupt mode */\r
2068     if (HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)&hdfsdm_filter->Instance->FLTRDATAR, \\r
2069                          (uint32_t) pData, Length) != HAL_OK)\r
2070     {\r
2071       /* Set DFSDM filter in error state */\r
2072       hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;\r
2073       status = HAL_ERROR;\r
2074     }\r
2075     else\r
2076     {\r
2077       /* Start regular conversion */\r
2078       DFSDM_RegConvStart(hdfsdm_filter);\r
2079     }\r
2080   }\r
2081   else\r
2082   {\r
2083     status = HAL_ERROR;\r
2084   }\r
2085   /* Return function status */\r
2086   return status;\r
2087 }\r
2088 \r
2089 /**\r
2090   * @brief  This function allows to start regular conversion in DMA mode and to get\r
2091   *         only the 16 most significant bits of conversion.\r
2092   * @note   This function should be called only when DFSDM filter instance is\r
2093   *         in idle state or if injected conversion is ongoing.\r
2094   *         Please note that data on buffer will contain signed 16 most significant\r
2095   *         bits of regular conversion.\r
2096   * @param  hdfsdm_filter DFSDM filter handle.\r
2097   * @param  pData The destination buffer address.\r
2098   * @param  Length The length of data to be transferred from DFSDM filter to memory.\r
2099   * @retval HAL status\r
2100   */\r
2101 HAL_StatusTypeDef HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,\r
2102                                                       int16_t                    *pData,\r
2103                                                       uint32_t                    Length)\r
2104 {\r
2105   HAL_StatusTypeDef status = HAL_OK;\r
2106 \r
2107   /* Check parameters */\r
2108   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));\r
2109 \r
2110   /* Check destination address and length */\r
2111   if ((pData == NULL) || (Length == 0U))\r
2112   {\r
2113     status = HAL_ERROR;\r
2114   }\r
2115   /* Check that DMA is enabled for regular conversion */\r
2116   else if ((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)\r
2117   {\r
2118     status = HAL_ERROR;\r
2119   }\r
2120   /* Check parameters compatibility */\r
2121   else if ((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \\r
2122            (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \\r
2123            (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \\r
2124            (Length != 1U))\r
2125   {\r
2126     status = HAL_ERROR;\r
2127   }\r
2128   else if ((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \\r
2129            (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \\r
2130            (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))\r
2131   {\r
2132     status = HAL_ERROR;\r
2133   }\r
2134   /* Check DFSDM filter state */\r
2135   else if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \\r
2136            (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))\r
2137   {\r
2138     /* Set callbacks on DMA handler */\r
2139     hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;\r
2140     hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;\r
2141     hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ? \\r
2142                                                    DFSDM_DMARegularHalfConvCplt : NULL;\r
2143 \r
2144     /* Start DMA in interrupt mode */\r
2145     if (HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)(&hdfsdm_filter->Instance->FLTRDATAR) + 2U, \\r
2146                          (uint32_t) pData, Length) != HAL_OK)\r
2147     {\r
2148       /* Set DFSDM filter in error state */\r
2149       hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;\r
2150       status = HAL_ERROR;\r
2151     }\r
2152     else\r
2153     {\r
2154       /* Start regular conversion */\r
2155       DFSDM_RegConvStart(hdfsdm_filter);\r
2156     }\r
2157   }\r
2158   else\r
2159   {\r
2160     status = HAL_ERROR;\r
2161   }\r
2162   /* Return function status */\r
2163   return status;\r
2164 }\r
2165 \r
2166 /**\r
2167   * @brief  This function allows to stop regular conversion in DMA mode.\r
2168   * @note   This function should be called only if regular conversion is ongoing.\r
2169   * @param  hdfsdm_filter DFSDM filter handle.\r
2170   * @retval HAL status\r
2171   */\r
2172 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)\r
2173 {\r
2174   HAL_StatusTypeDef status = HAL_OK;\r
2175 \r
2176   /* Check parameters */\r
2177   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));\r
2178 \r
2179   /* Check DFSDM filter state */\r
2180   if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \\r
2181       (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))\r
2182   {\r
2183     /* Return error status */\r
2184     status = HAL_ERROR;\r
2185   }\r
2186   else\r
2187   {\r
2188     /* Stop current DMA transfer */\r
2189     if (HAL_DMA_Abort(hdfsdm_filter->hdmaReg) != HAL_OK)\r
2190     {\r
2191       /* Set DFSDM filter in error state */\r
2192       hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;\r
2193       status = HAL_ERROR;\r
2194     }\r
2195     else\r
2196     {\r
2197       /* Stop regular conversion */\r
2198       DFSDM_RegConvStop(hdfsdm_filter);\r
2199     }\r
2200   }\r
2201   /* Return function status */\r
2202   return status;\r
2203 }\r
2204 \r
2205 /**\r
2206   * @brief  This function allows to get regular conversion value.\r
2207   * @param  hdfsdm_filter DFSDM filter handle.\r
2208   * @param  Channel Corresponding channel of regular conversion.\r
2209   * @retval Regular conversion value\r
2210   */\r
2211 int32_t HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,\r
2212                                         uint32_t                   *Channel)\r
2213 {\r
2214   uint32_t reg;\r
2215   int32_t  value;\r
2216 \r
2217   /* Check parameters */\r
2218   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));\r
2219   assert_param(Channel != (void *)0);\r
2220 \r
2221   /* Get value of data register for regular channel */\r
2222   reg = hdfsdm_filter->Instance->FLTRDATAR;\r
2223 \r
2224   /* Extract channel and regular conversion value */\r
2225   *Channel = (reg & DFSDM_FLTRDATAR_RDATACH);\r
2226   /* Regular conversion value is a signed value located on 24 MSB of register */\r
2227   /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */\r
2228   reg &= DFSDM_FLTRDATAR_RDATA;\r
2229   value = ((int32_t)reg) / 256;\r
2230 \r
2231   /* return regular conversion value */\r
2232   return value;\r
2233 }\r
2234 \r
2235 /**\r
2236   * @brief  This function allows to start injected conversion in polling mode.\r
2237   * @note   This function should be called only when DFSDM filter instance is\r
2238   *         in idle state or if regular conversion is ongoing.\r
2239   * @param  hdfsdm_filter DFSDM filter handle.\r
2240   * @retval HAL status\r
2241   */\r
2242 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)\r
2243 {\r
2244   HAL_StatusTypeDef status = HAL_OK;\r
2245 \r
2246   /* Check parameters */\r
2247   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));\r
2248 \r
2249   /* Check DFSDM filter state */\r
2250   if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \\r
2251       (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))\r
2252   {\r
2253     /* Start injected conversion */\r
2254     DFSDM_InjConvStart(hdfsdm_filter);\r
2255   }\r
2256   else\r
2257   {\r
2258     status = HAL_ERROR;\r
2259   }\r
2260   /* Return function status */\r
2261   return status;\r
2262 }\r
2263 \r
2264 /**\r
2265   * @brief  This function allows to poll for the end of injected conversion.\r
2266   * @note   This function should be called only if injected conversion is ongoing.\r
2267   * @param  hdfsdm_filter DFSDM filter handle.\r
2268   * @param  Timeout Timeout value in milliseconds.\r
2269   * @retval HAL status\r
2270   */\r
2271 HAL_StatusTypeDef HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,\r
2272                                                        uint32_t                    Timeout)\r
2273 {\r
2274   uint32_t tickstart;\r
2275 \r
2276   /* Check parameters */\r
2277   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));\r
2278 \r
2279   /* Check DFSDM filter state */\r
2280   if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \\r
2281       (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))\r
2282   {\r
2283     /* Return error status */\r
2284     return HAL_ERROR;\r
2285   }\r
2286   else\r
2287   {\r
2288     /* Get timeout */\r
2289     tickstart = HAL_GetTick();\r
2290 \r
2291     /* Wait end of injected conversions */\r
2292     while ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JEOCF) != DFSDM_FLTISR_JEOCF)\r
2293     {\r
2294       /* Check the Timeout */\r
2295       if (Timeout != HAL_MAX_DELAY)\r
2296       {\r
2297         if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))\r
2298         {\r
2299           /* Return timeout status */\r
2300           return HAL_TIMEOUT;\r
2301         }\r
2302       }\r
2303     }\r
2304     /* Check if overrun occurs */\r
2305     if ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JOVRF) == DFSDM_FLTISR_JOVRF)\r
2306     {\r
2307       /* Update error code and call error callback */\r
2308       hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;\r
2309 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)\r
2310       hdfsdm_filter->ErrorCallback(hdfsdm_filter);\r
2311 #else\r
2312       HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);\r
2313 #endif\r
2314 \r
2315       /* Clear injected overrun flag */\r
2316       hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;\r
2317     }\r
2318 \r
2319     /* Update remaining injected conversions */\r
2320     hdfsdm_filter->InjConvRemaining--;\r
2321     if (hdfsdm_filter->InjConvRemaining == 0U)\r
2322     {\r
2323       /* Update DFSDM filter state only if trigger is software */\r
2324       if (hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)\r
2325       {\r
2326         hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \\r
2327                                HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;\r
2328       }\r
2329 \r
2330       /* end of injected sequence, reset the value */\r
2331       hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \\r
2332                                         hdfsdm_filter->InjectedChannelsNbr : 1U;\r
2333     }\r
2334 \r
2335     /* Return function status */\r
2336     return HAL_OK;\r
2337   }\r
2338 }\r
2339 \r
2340 /**\r
2341   * @brief  This function allows to stop injected conversion in polling mode.\r
2342   * @note   This function should be called only if injected conversion is ongoing.\r
2343   * @param  hdfsdm_filter DFSDM filter handle.\r
2344   * @retval HAL status\r
2345   */\r
2346 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)\r
2347 {\r
2348   HAL_StatusTypeDef status = HAL_OK;\r
2349 \r
2350   /* Check parameters */\r
2351   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));\r
2352 \r
2353   /* Check DFSDM filter state */\r
2354   if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \\r
2355       (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))\r
2356   {\r
2357     /* Return error status */\r
2358     status = HAL_ERROR;\r
2359   }\r
2360   else\r
2361   {\r
2362     /* Stop injected conversion */\r
2363     DFSDM_InjConvStop(hdfsdm_filter);\r
2364   }\r
2365   /* Return function status */\r
2366   return status;\r
2367 }\r
2368 \r
2369 /**\r
2370   * @brief  This function allows to start injected conversion in interrupt mode.\r
2371   * @note   This function should be called only when DFSDM filter instance is\r
2372   *         in idle state or if regular conversion is ongoing.\r
2373   * @param  hdfsdm_filter DFSDM filter handle.\r
2374   * @retval HAL status\r
2375   */\r
2376 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)\r
2377 {\r
2378   HAL_StatusTypeDef status = HAL_OK;\r
2379 \r
2380   /* Check parameters */\r
2381   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));\r
2382 \r
2383   /* Check DFSDM filter state */\r
2384   if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \\r
2385       (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))\r
2386   {\r
2387     /* Enable interrupts for injected conversions */\r
2388     hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE);\r
2389 \r
2390     /* Start injected conversion */\r
2391     DFSDM_InjConvStart(hdfsdm_filter);\r
2392   }\r
2393   else\r
2394   {\r
2395     status = HAL_ERROR;\r
2396   }\r
2397   /* Return function status */\r
2398   return status;\r
2399 }\r
2400 \r
2401 /**\r
2402   * @brief  This function allows to stop injected conversion in interrupt mode.\r
2403   * @note   This function should be called only if injected conversion is ongoing.\r
2404   * @param  hdfsdm_filter DFSDM filter handle.\r
2405   * @retval HAL status\r
2406   */\r
2407 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)\r
2408 {\r
2409   HAL_StatusTypeDef status = HAL_OK;\r
2410 \r
2411   /* Check parameters */\r
2412   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));\r
2413 \r
2414   /* Check DFSDM filter state */\r
2415   if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \\r
2416       (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))\r
2417   {\r
2418     /* Return error status */\r
2419     status = HAL_ERROR;\r
2420   }\r
2421   else\r
2422   {\r
2423     /* Disable interrupts for injected conversions */\r
2424     hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE);\r
2425 \r
2426     /* Stop injected conversion */\r
2427     DFSDM_InjConvStop(hdfsdm_filter);\r
2428   }\r
2429   /* Return function status */\r
2430   return status;\r
2431 }\r
2432 \r
2433 /**\r
2434   * @brief  This function allows to start injected conversion in DMA mode.\r
2435   * @note   This function should be called only when DFSDM filter instance is\r
2436   *         in idle state or if regular conversion is ongoing.\r
2437   *         Please note that data on buffer will contain signed injected conversion\r
2438   *         value on 24 most significant bits and corresponding channel on 3 least\r
2439   *         significant bits.\r
2440   * @param  hdfsdm_filter DFSDM filter handle.\r
2441   * @param  pData The destination buffer address.\r
2442   * @param  Length The length of data to be transferred from DFSDM filter to memory.\r
2443   * @retval HAL status\r
2444   */\r
2445 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,\r
2446                                                     int32_t                    *pData,\r
2447                                                     uint32_t                    Length)\r
2448 {\r
2449   HAL_StatusTypeDef status = HAL_OK;\r
2450 \r
2451   /* Check parameters */\r
2452   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));\r
2453 \r
2454   /* Check destination address and length */\r
2455   if ((pData == NULL) || (Length == 0U))\r
2456   {\r
2457     status = HAL_ERROR;\r
2458   }\r
2459   /* Check that DMA is enabled for injected conversion */\r
2460   else if ((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)\r
2461   {\r
2462     status = HAL_ERROR;\r
2463   }\r
2464   /* Check parameters compatibility */\r
2465   else if ((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \\r
2466            (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \\r
2467            (Length > hdfsdm_filter->InjConvRemaining))\r
2468   {\r
2469     status = HAL_ERROR;\r
2470   }\r
2471   else if ((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \\r
2472            (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))\r
2473   {\r
2474     status = HAL_ERROR;\r
2475   }\r
2476   /* Check DFSDM filter state */\r
2477   else if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \\r
2478            (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))\r
2479   {\r
2480     /* Set callbacks on DMA handler */\r
2481     hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;\r
2482     hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;\r
2483     hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ? \\r
2484                                                    DFSDM_DMAInjectedHalfConvCplt : NULL;\r
2485 \r
2486     /* Start DMA in interrupt mode */\r
2487     if (HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)&hdfsdm_filter->Instance->FLTJDATAR, \\r
2488                          (uint32_t) pData, Length) != HAL_OK)\r
2489     {\r
2490       /* Set DFSDM filter in error state */\r
2491       hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;\r
2492       status = HAL_ERROR;\r
2493     }\r
2494     else\r
2495     {\r
2496       /* Start injected conversion */\r
2497       DFSDM_InjConvStart(hdfsdm_filter);\r
2498     }\r
2499   }\r
2500   else\r
2501   {\r
2502     status = HAL_ERROR;\r
2503   }\r
2504   /* Return function status */\r
2505   return status;\r
2506 }\r
2507 \r
2508 /**\r
2509   * @brief  This function allows to start injected conversion in DMA mode and to get\r
2510   *         only the 16 most significant bits of conversion.\r
2511   * @note   This function should be called only when DFSDM filter instance is\r
2512   *         in idle state or if regular conversion is ongoing.\r
2513   *         Please note that data on buffer will contain signed 16 most significant\r
2514   *         bits of injected conversion.\r
2515   * @param  hdfsdm_filter DFSDM filter handle.\r
2516   * @param  pData The destination buffer address.\r
2517   * @param  Length The length of data to be transferred from DFSDM filter to memory.\r
2518   * @retval HAL status\r
2519   */\r
2520 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,\r
2521                                                        int16_t                    *pData,\r
2522                                                        uint32_t                    Length)\r
2523 {\r
2524   HAL_StatusTypeDef status = HAL_OK;\r
2525 \r
2526   /* Check parameters */\r
2527   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));\r
2528 \r
2529   /* Check destination address and length */\r
2530   if ((pData == NULL) || (Length == 0U))\r
2531   {\r
2532     status = HAL_ERROR;\r
2533   }\r
2534   /* Check that DMA is enabled for injected conversion */\r
2535   else if ((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)\r
2536   {\r
2537     status = HAL_ERROR;\r
2538   }\r
2539   /* Check parameters compatibility */\r
2540   else if ((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \\r
2541            (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \\r
2542            (Length > hdfsdm_filter->InjConvRemaining))\r
2543   {\r
2544     status = HAL_ERROR;\r
2545   }\r
2546   else if ((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \\r
2547            (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))\r
2548   {\r
2549     status = HAL_ERROR;\r
2550   }\r
2551   /* Check DFSDM filter state */\r
2552   else if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \\r
2553            (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))\r
2554   {\r
2555     /* Set callbacks on DMA handler */\r
2556     hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;\r
2557     hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;\r
2558     hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ? \\r
2559                                                    DFSDM_DMAInjectedHalfConvCplt : NULL;\r
2560 \r
2561     /* Start DMA in interrupt mode */\r
2562     if (HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)(&hdfsdm_filter->Instance->FLTJDATAR) + 2U, \\r
2563                          (uint32_t) pData, Length) != HAL_OK)\r
2564     {\r
2565       /* Set DFSDM filter in error state */\r
2566       hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;\r
2567       status = HAL_ERROR;\r
2568     }\r
2569     else\r
2570     {\r
2571       /* Start injected conversion */\r
2572       DFSDM_InjConvStart(hdfsdm_filter);\r
2573     }\r
2574   }\r
2575   else\r
2576   {\r
2577     status = HAL_ERROR;\r
2578   }\r
2579   /* Return function status */\r
2580   return status;\r
2581 }\r
2582 \r
2583 /**\r
2584   * @brief  This function allows to stop injected conversion in DMA mode.\r
2585   * @note   This function should be called only if injected conversion is ongoing.\r
2586   * @param  hdfsdm_filter DFSDM filter handle.\r
2587   * @retval HAL status\r
2588   */\r
2589 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)\r
2590 {\r
2591   HAL_StatusTypeDef status = HAL_OK;\r
2592 \r
2593   /* Check parameters */\r
2594   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));\r
2595 \r
2596   /* Check DFSDM filter state */\r
2597   if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \\r
2598       (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))\r
2599   {\r
2600     /* Return error status */\r
2601     status = HAL_ERROR;\r
2602   }\r
2603   else\r
2604   {\r
2605     /* Stop current DMA transfer */\r
2606     if (HAL_DMA_Abort(hdfsdm_filter->hdmaInj) != HAL_OK)\r
2607     {\r
2608       /* Set DFSDM filter in error state */\r
2609       hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;\r
2610       status = HAL_ERROR;\r
2611     }\r
2612     else\r
2613     {\r
2614       /* Stop regular conversion */\r
2615       DFSDM_InjConvStop(hdfsdm_filter);\r
2616     }\r
2617   }\r
2618   /* Return function status */\r
2619   return status;\r
2620 }\r
2621 \r
2622 /**\r
2623   * @brief  This function allows to get injected conversion value.\r
2624   * @param  hdfsdm_filter DFSDM filter handle.\r
2625   * @param  Channel Corresponding channel of injected conversion.\r
2626   * @retval Injected conversion value\r
2627   */\r
2628 int32_t HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,\r
2629                                          uint32_t                   *Channel)\r
2630 {\r
2631   uint32_t reg;\r
2632   int32_t  value;\r
2633 \r
2634   /* Check parameters */\r
2635   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));\r
2636   assert_param(Channel != (void *)0);\r
2637 \r
2638   /* Get value of data register for injected channel */\r
2639   reg = hdfsdm_filter->Instance->FLTJDATAR;\r
2640 \r
2641   /* Extract channel and injected conversion value */\r
2642   *Channel = (reg & DFSDM_FLTJDATAR_JDATACH);\r
2643   /* Injected conversion value is a signed value located on 24 MSB of register */\r
2644   /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */\r
2645   reg &= DFSDM_FLTJDATAR_JDATA;\r
2646   value = ((int32_t)reg) / 256;\r
2647 \r
2648   /* return regular conversion value */\r
2649   return value;\r
2650 }\r
2651 \r
2652 /**\r
2653   * @brief  This function allows to start filter analog watchdog in interrupt mode.\r
2654   * @param  hdfsdm_filter DFSDM filter handle.\r
2655   * @param  awdParam DFSDM filter analog watchdog parameters.\r
2656   * @retval HAL status\r
2657   */\r
2658 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef   *hdfsdm_filter,\r
2659                                               DFSDM_Filter_AwdParamTypeDef *awdParam)\r
2660 {\r
2661   HAL_StatusTypeDef status = HAL_OK;\r
2662 \r
2663   /* Check parameters */\r
2664   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));\r
2665   assert_param(IS_DFSDM_FILTER_AWD_DATA_SOURCE(awdParam->DataSource));\r
2666   assert_param(IS_DFSDM_INJECTED_CHANNEL(awdParam->Channel));\r
2667   assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->HighThreshold));\r
2668   assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->LowThreshold));\r
2669   assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->HighBreakSignal));\r
2670   assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->LowBreakSignal));\r
2671 \r
2672   /* Check DFSDM filter state */\r
2673   if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \\r
2674       (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))\r
2675   {\r
2676     /* Return error status */\r
2677     status = HAL_ERROR;\r
2678   }\r
2679   else\r
2680   {\r
2681     /* Set analog watchdog data source */\r
2682     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);\r
2683     hdfsdm_filter->Instance->FLTCR1 |= awdParam->DataSource;\r
2684 \r
2685     /* Set thresholds and break signals */\r
2686     hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH);\r
2687     hdfsdm_filter->Instance->FLTAWHTR |= (((uint32_t) awdParam->HighThreshold << DFSDM_FLTAWHTR_AWHT_Pos) | \\r
2688                                           awdParam->HighBreakSignal);\r
2689     hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL);\r
2690     hdfsdm_filter->Instance->FLTAWLTR |= (((uint32_t) awdParam->LowThreshold << DFSDM_FLTAWLTR_AWLT_Pos) | \\r
2691                                           awdParam->LowBreakSignal);\r
2692 \r
2693     /* Set channels and interrupt for analog watchdog */\r
2694     hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH);\r
2695     hdfsdm_filter->Instance->FLTCR2 |= (((awdParam->Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_AWDCH_Pos) | \\r
2696                                         DFSDM_FLTCR2_AWDIE);\r
2697   }\r
2698   /* Return function status */\r
2699   return status;\r
2700 }\r
2701 \r
2702 /**\r
2703   * @brief  This function allows to stop filter analog watchdog in interrupt mode.\r
2704   * @param  hdfsdm_filter DFSDM filter handle.\r
2705   * @retval HAL status\r
2706   */\r
2707 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)\r
2708 {\r
2709   HAL_StatusTypeDef status = HAL_OK;\r
2710 \r
2711   /* Check parameters */\r
2712   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));\r
2713 \r
2714   /* Check DFSDM filter state */\r
2715   if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \\r
2716       (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))\r
2717   {\r
2718     /* Return error status */\r
2719     status = HAL_ERROR;\r
2720   }\r
2721   else\r
2722   {\r
2723     /* Reset channels for analog watchdog and deactivate interrupt */\r
2724     hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH | DFSDM_FLTCR2_AWDIE);\r
2725 \r
2726     /* Clear all analog watchdog flags */\r
2727     hdfsdm_filter->Instance->FLTAWCFR = (DFSDM_FLTAWCFR_CLRAWHTF | DFSDM_FLTAWCFR_CLRAWLTF);\r
2728 \r
2729     /* Reset thresholds and break signals */\r
2730     hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH);\r
2731     hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL);\r
2732 \r
2733     /* Reset analog watchdog data source */\r
2734     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);\r
2735   }\r
2736   /* Return function status */\r
2737   return status;\r
2738 }\r
2739 \r
2740 /**\r
2741   * @brief  This function allows to start extreme detector feature.\r
2742   * @param  hdfsdm_filter DFSDM filter handle.\r
2743   * @param  Channel Channels where extreme detector is enabled.\r
2744   *         This parameter can be a values combination of @ref DFSDM_Channel_Selection.\r
2745   * @retval HAL status\r
2746   */\r
2747 HAL_StatusTypeDef HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,\r
2748                                            uint32_t                    Channel)\r
2749 {\r
2750   HAL_StatusTypeDef status = HAL_OK;\r
2751 \r
2752   /* Check parameters */\r
2753   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));\r
2754   assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));\r
2755 \r
2756   /* Check DFSDM filter state */\r
2757   if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \\r
2758       (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))\r
2759   {\r
2760     /* Return error status */\r
2761     status = HAL_ERROR;\r
2762   }\r
2763   else\r
2764   {\r
2765     /* Set channels for extreme detector */\r
2766     hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);\r
2767     hdfsdm_filter->Instance->FLTCR2 |= ((Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_EXCH_Pos);\r
2768   }\r
2769   /* Return function status */\r
2770   return status;\r
2771 }\r
2772 \r
2773 /**\r
2774   * @brief  This function allows to stop extreme detector feature.\r
2775   * @param  hdfsdm_filter DFSDM filter handle.\r
2776   * @retval HAL status\r
2777   */\r
2778 HAL_StatusTypeDef HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)\r
2779 {\r
2780   HAL_StatusTypeDef status = HAL_OK;\r
2781   __IO uint32_t     reg1;\r
2782   __IO uint32_t     reg2;\r
2783 \r
2784   /* Check parameters */\r
2785   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));\r
2786 \r
2787   /* Check DFSDM filter state */\r
2788   if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \\r
2789       (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))\r
2790   {\r
2791     /* Return error status */\r
2792     status = HAL_ERROR;\r
2793   }\r
2794   else\r
2795   {\r
2796     /* Reset channels for extreme detector */\r
2797     hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);\r
2798 \r
2799     /* Clear extreme detector values */\r
2800     reg1 = hdfsdm_filter->Instance->FLTEXMAX;\r
2801     reg2 = hdfsdm_filter->Instance->FLTEXMIN;\r
2802     UNUSED(reg1); /* To avoid GCC warning */\r
2803     UNUSED(reg2); /* To avoid GCC warning */\r
2804   }\r
2805   /* Return function status */\r
2806   return status;\r
2807 }\r
2808 \r
2809 /**\r
2810   * @brief  This function allows to get extreme detector maximum value.\r
2811   * @param  hdfsdm_filter DFSDM filter handle.\r
2812   * @param  Channel Corresponding channel.\r
2813   * @retval Extreme detector maximum value\r
2814   *         This value is between Min_Data = -8388608 and Max_Data = 8388607.\r
2815   */\r
2816 int32_t HAL_DFSDM_FilterGetExdMaxValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,\r
2817                                        uint32_t                   *Channel)\r
2818 {\r
2819   uint32_t reg;\r
2820   int32_t  value;\r
2821 \r
2822   /* Check parameters */\r
2823   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));\r
2824   assert_param(Channel != (void *)0);\r
2825 \r
2826   /* Get value of extreme detector maximum register */\r
2827   reg = hdfsdm_filter->Instance->FLTEXMAX;\r
2828 \r
2829   /* Extract channel and extreme detector maximum value */\r
2830   *Channel = (reg & DFSDM_FLTEXMAX_EXMAXCH);\r
2831   /* Extreme detector maximum value is a signed value located on 24 MSB of register */\r
2832   /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */\r
2833   reg &= DFSDM_FLTEXMAX_EXMAX;\r
2834   value = ((int32_t)reg) / 256;\r
2835 \r
2836   /* return extreme detector maximum value */\r
2837   return value;\r
2838 }\r
2839 \r
2840 /**\r
2841   * @brief  This function allows to get extreme detector minimum value.\r
2842   * @param  hdfsdm_filter DFSDM filter handle.\r
2843   * @param  Channel Corresponding channel.\r
2844   * @retval Extreme detector minimum value\r
2845   *         This value is between Min_Data = -8388608 and Max_Data = 8388607.\r
2846   */\r
2847 int32_t HAL_DFSDM_FilterGetExdMinValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,\r
2848                                        uint32_t                   *Channel)\r
2849 {\r
2850   uint32_t reg;\r
2851   int32_t  value;\r
2852 \r
2853   /* Check parameters */\r
2854   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));\r
2855   assert_param(Channel != (void *)0);\r
2856 \r
2857   /* Get value of extreme detector minimum register */\r
2858   reg = hdfsdm_filter->Instance->FLTEXMIN;\r
2859 \r
2860   /* Extract channel and extreme detector minimum value */\r
2861   *Channel = (reg & DFSDM_FLTEXMIN_EXMINCH);\r
2862   /* Extreme detector minimum value is a signed value located on 24 MSB of register */\r
2863   /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */\r
2864   reg &= DFSDM_FLTEXMIN_EXMIN;\r
2865   value = ((int32_t)reg) / 256;\r
2866 \r
2867   /* return extreme detector minimum value */\r
2868   return value;\r
2869 }\r
2870 \r
2871 /**\r
2872   * @brief  This function allows to get conversion time value.\r
2873   * @param  hdfsdm_filter DFSDM filter handle.\r
2874   * @retval Conversion time value\r
2875   * @note   To get time in second, this value has to be divided by DFSDM clock frequency.\r
2876   */\r
2877 uint32_t HAL_DFSDM_FilterGetConvTimeValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)\r
2878 {\r
2879   uint32_t reg;\r
2880   uint32_t value;\r
2881 \r
2882   /* Check parameters */\r
2883   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));\r
2884 \r
2885   /* Get value of conversion timer register */\r
2886   reg = hdfsdm_filter->Instance->FLTCNVTIMR;\r
2887 \r
2888   /* Extract conversion time value */\r
2889   value = ((reg & DFSDM_FLTCNVTIMR_CNVCNT) >> DFSDM_FLTCNVTIMR_CNVCNT_Pos);\r
2890 \r
2891   /* return extreme detector minimum value */\r
2892   return value;\r
2893 }\r
2894 \r
2895 /**\r
2896   * @brief  This function handles the DFSDM interrupts.\r
2897   * @param  hdfsdm_filter DFSDM filter handle.\r
2898   * @retval None\r
2899   */\r
2900 void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)\r
2901 {\r
2902   /* Get FTLISR and FLTCR2 register values */\r
2903   const uint32_t temp_fltisr = hdfsdm_filter->Instance->FLTISR;\r
2904   const uint32_t temp_fltcr2 = hdfsdm_filter->Instance->FLTCR2;\r
2905 \r
2906   /* Check if overrun occurs during regular conversion */\r
2907   if (((temp_fltisr & DFSDM_FLTISR_ROVRF) != 0U) && \\r
2908       ((temp_fltcr2 & DFSDM_FLTCR2_ROVRIE) != 0U))\r
2909   {\r
2910     /* Clear regular overrun flag */\r
2911     hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;\r
2912 \r
2913     /* Update error code */\r
2914     hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;\r
2915 \r
2916     /* Call error callback */\r
2917 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)\r
2918     hdfsdm_filter->ErrorCallback(hdfsdm_filter);\r
2919 #else\r
2920     HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);\r
2921 #endif\r
2922   }\r
2923   /* Check if overrun occurs during injected conversion */\r
2924   else if (((temp_fltisr & DFSDM_FLTISR_JOVRF) != 0U) && \\r
2925            ((temp_fltcr2 & DFSDM_FLTCR2_JOVRIE) != 0U))\r
2926   {\r
2927     /* Clear injected overrun flag */\r
2928     hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;\r
2929 \r
2930     /* Update error code */\r
2931     hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;\r
2932 \r
2933     /* Call error callback */\r
2934 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)\r
2935     hdfsdm_filter->ErrorCallback(hdfsdm_filter);\r
2936 #else\r
2937     HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);\r
2938 #endif\r
2939   }\r
2940   /* Check if end of regular conversion */\r
2941   else if (((temp_fltisr & DFSDM_FLTISR_REOCF) != 0U) && \\r
2942            ((temp_fltcr2 & DFSDM_FLTCR2_REOCIE) != 0U))\r
2943   {\r
2944     /* Call regular conversion complete callback */\r
2945 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)\r
2946     hdfsdm_filter->RegConvCpltCallback(hdfsdm_filter);\r
2947 #else\r
2948     HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);\r
2949 #endif\r
2950 \r
2951     /* End of conversion if mode is not continuous and software trigger */\r
2952     if ((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \\r
2953         (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))\r
2954     {\r
2955       /* Disable interrupts for regular conversions */\r
2956       hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE);\r
2957 \r
2958       /* Update DFSDM filter state */\r
2959       hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \\r
2960                              HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;\r
2961     }\r
2962   }\r
2963   /* Check if end of injected conversion */\r
2964   else if (((temp_fltisr & DFSDM_FLTISR_JEOCF) != 0U) && \\r
2965            ((temp_fltcr2 & DFSDM_FLTCR2_JEOCIE) != 0U))\r
2966   {\r
2967     /* Call injected conversion complete callback */\r
2968 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)\r
2969     hdfsdm_filter->InjConvCpltCallback(hdfsdm_filter);\r
2970 #else\r
2971     HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);\r
2972 #endif\r
2973 \r
2974     /* Update remaining injected conversions */\r
2975     hdfsdm_filter->InjConvRemaining--;\r
2976     if (hdfsdm_filter->InjConvRemaining == 0U)\r
2977     {\r
2978       /* End of conversion if trigger is software */\r
2979       if (hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)\r
2980       {\r
2981         /* Disable interrupts for injected conversions */\r
2982         hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE);\r
2983 \r
2984         /* Update DFSDM filter state */\r
2985         hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \\r
2986                                HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;\r
2987       }\r
2988       /* end of injected sequence, reset the value */\r
2989       hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \\r
2990                                         hdfsdm_filter->InjectedChannelsNbr : 1U;\r
2991     }\r
2992   }\r
2993   /* Check if analog watchdog occurs */\r
2994   else if (((temp_fltisr & DFSDM_FLTISR_AWDF) != 0U) && \\r
2995            ((temp_fltcr2 & DFSDM_FLTCR2_AWDIE) != 0U))\r
2996   {\r
2997     uint32_t reg;\r
2998     uint32_t threshold;\r
2999     uint32_t channel = 0;\r
3000 \r
3001     /* Get channel and threshold */\r
3002     reg = hdfsdm_filter->Instance->FLTAWSR;\r
3003     threshold = ((reg & DFSDM_FLTAWSR_AWLTF) != 0U) ? DFSDM_AWD_LOW_THRESHOLD : DFSDM_AWD_HIGH_THRESHOLD;\r
3004     if (threshold == DFSDM_AWD_HIGH_THRESHOLD)\r
3005     {\r
3006       reg = reg >> DFSDM_FLTAWSR_AWHTF_Pos;\r
3007     }\r
3008     while (((reg & 1U) == 0U) && (channel < (DFSDM1_CHANNEL_NUMBER - 1U)))\r
3009     {\r
3010       channel++;\r
3011       reg = reg >> 1;\r
3012     }\r
3013     /* Clear analog watchdog flag */\r
3014     hdfsdm_filter->Instance->FLTAWCFR = (threshold == DFSDM_AWD_HIGH_THRESHOLD) ? \\r
3015                                         (1UL << (DFSDM_FLTAWSR_AWHTF_Pos + channel)) : \\r
3016                                         (1UL << channel);\r
3017 \r
3018     /* Call analog watchdog callback */\r
3019 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)\r
3020     hdfsdm_filter->AwdCallback(hdfsdm_filter, channel, threshold);\r
3021 #else\r
3022     HAL_DFSDM_FilterAwdCallback(hdfsdm_filter, channel, threshold);\r
3023 #endif\r
3024   }\r
3025   /* Check if clock absence occurs */\r
3026   else if ((hdfsdm_filter->Instance == DFSDM1_Filter0) && \\r
3027            ((temp_fltisr & DFSDM_FLTISR_CKABF) != 0U) && \\r
3028            ((temp_fltcr2 & DFSDM_FLTCR2_CKABIE) != 0U))\r
3029   {\r
3030     uint32_t reg;\r
3031     uint32_t channel = 0;\r
3032 \r
3033     reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) >> DFSDM_FLTISR_CKABF_Pos);\r
3034 \r
3035     while (channel < DFSDM1_CHANNEL_NUMBER)\r
3036     {\r
3037       /* Check if flag is set and corresponding channel is enabled */\r
3038       if (((reg & 1U) != 0U) && (a_dfsdm1ChannelHandle[channel] != NULL))\r
3039       {\r
3040         /* Check clock absence has been enabled for this channel */\r
3041         if ((a_dfsdm1ChannelHandle[channel]->Instance->CHCFGR1 & DFSDM_CHCFGR1_CKABEN) != 0U)\r
3042         {\r
3043           /* Clear clock absence flag */\r
3044           hdfsdm_filter->Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));\r
3045 \r
3046           /* Call clock absence callback */\r
3047 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)\r
3048           a_dfsdm1ChannelHandle[channel]->CkabCallback(a_dfsdm1ChannelHandle[channel]);\r
3049 #else\r
3050           HAL_DFSDM_ChannelCkabCallback(a_dfsdm1ChannelHandle[channel]);\r
3051 #endif\r
3052         }\r
3053       }\r
3054       channel++;\r
3055       reg = reg >> 1;\r
3056     }\r
3057   }\r
3058   /* Check if short circuit detection occurs */\r
3059   else if ((hdfsdm_filter->Instance == DFSDM1_Filter0) && \\r
3060            ((temp_fltisr & DFSDM_FLTISR_SCDF) != 0U) && \\r
3061            ((temp_fltcr2 & DFSDM_FLTCR2_SCDIE) != 0U))\r
3062   {\r
3063     uint32_t reg;\r
3064     uint32_t channel = 0;\r
3065 \r
3066     /* Get channel */\r
3067     reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) >> DFSDM_FLTISR_SCDF_Pos);\r
3068     while (((reg & 1U) == 0U) && (channel < (DFSDM1_CHANNEL_NUMBER - 1U)))\r
3069     {\r
3070       channel++;\r
3071       reg = reg >> 1;\r
3072     }\r
3073 \r
3074     /* Clear short circuit detection flag */\r
3075     hdfsdm_filter->Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel));\r
3076 \r
3077     /* Call short circuit detection callback */\r
3078 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)\r
3079     a_dfsdm1ChannelHandle[channel]->ScdCallback(a_dfsdm1ChannelHandle[channel]);\r
3080 #else\r
3081     HAL_DFSDM_ChannelScdCallback(a_dfsdm1ChannelHandle[channel]);\r
3082 #endif\r
3083   }\r
3084 }\r
3085 \r
3086 /**\r
3087   * @brief  Regular conversion complete callback.\r
3088   * @note   In interrupt mode, user has to read conversion value in this function\r
3089   *         using HAL_DFSDM_FilterGetRegularValue.\r
3090   * @param  hdfsdm_filter DFSDM filter handle.\r
3091   * @retval None\r
3092   */\r
3093 __weak void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)\r
3094 {\r
3095   /* Prevent unused argument(s) compilation warning */\r
3096   UNUSED(hdfsdm_filter);\r
3097 \r
3098   /* NOTE : This function should not be modified, when the callback is needed,\r
3099             the HAL_DFSDM_FilterRegConvCpltCallback could be implemented in the user file.\r
3100    */\r
3101 }\r
3102 \r
3103 /**\r
3104   * @brief  Half regular conversion complete callback.\r
3105   * @param  hdfsdm_filter DFSDM filter handle.\r
3106   * @retval None\r
3107   */\r
3108 __weak void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)\r
3109 {\r
3110   /* Prevent unused argument(s) compilation warning */\r
3111   UNUSED(hdfsdm_filter);\r
3112 \r
3113   /* NOTE : This function should not be modified, when the callback is needed,\r
3114             the HAL_DFSDM_FilterRegConvHalfCpltCallback could be implemented in the user file.\r
3115    */\r
3116 }\r
3117 \r
3118 /**\r
3119   * @brief  Injected conversion complete callback.\r
3120   * @note   In interrupt mode, user has to read conversion value in this function\r
3121   *         using HAL_DFSDM_FilterGetInjectedValue.\r
3122   * @param  hdfsdm_filter DFSDM filter handle.\r
3123   * @retval None\r
3124   */\r
3125 __weak void HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)\r
3126 {\r
3127   /* Prevent unused argument(s) compilation warning */\r
3128   UNUSED(hdfsdm_filter);\r
3129 \r
3130   /* NOTE : This function should not be modified, when the callback is needed,\r
3131             the HAL_DFSDM_FilterInjConvCpltCallback could be implemented in the user file.\r
3132    */\r
3133 }\r
3134 \r
3135 /**\r
3136   * @brief  Half injected conversion complete callback.\r
3137   * @param  hdfsdm_filter DFSDM filter handle.\r
3138   * @retval None\r
3139   */\r
3140 __weak void HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)\r
3141 {\r
3142   /* Prevent unused argument(s) compilation warning */\r
3143   UNUSED(hdfsdm_filter);\r
3144 \r
3145   /* NOTE : This function should not be modified, when the callback is needed,\r
3146             the HAL_DFSDM_FilterInjConvHalfCpltCallback could be implemented in the user file.\r
3147    */\r
3148 }\r
3149 \r
3150 /**\r
3151   * @brief  Filter analog watchdog callback.\r
3152   * @param  hdfsdm_filter DFSDM filter handle.\r
3153   * @param  Channel Corresponding channel.\r
3154   * @param  Threshold Low or high threshold has been reached.\r
3155   * @retval None\r
3156   */\r
3157 __weak void HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,\r
3158                                         uint32_t Channel, uint32_t Threshold)\r
3159 {\r
3160   /* Prevent unused argument(s) compilation warning */\r
3161   UNUSED(hdfsdm_filter);\r
3162   UNUSED(Channel);\r
3163   UNUSED(Threshold);\r
3164 \r
3165   /* NOTE : This function should not be modified, when the callback is needed,\r
3166             the HAL_DFSDM_FilterAwdCallback could be implemented in the user file.\r
3167    */\r
3168 }\r
3169 \r
3170 /**\r
3171   * @brief  Error callback.\r
3172   * @param  hdfsdm_filter DFSDM filter handle.\r
3173   * @retval None\r
3174   */\r
3175 __weak void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)\r
3176 {\r
3177   /* Prevent unused argument(s) compilation warning */\r
3178   UNUSED(hdfsdm_filter);\r
3179 \r
3180   /* NOTE : This function should not be modified, when the callback is needed,\r
3181             the HAL_DFSDM_FilterErrorCallback could be implemented in the user file.\r
3182    */\r
3183 }\r
3184 \r
3185 /**\r
3186   * @}\r
3187   */\r
3188 \r
3189 /** @defgroup DFSDM_Exported_Functions_Group4_Filter Filter state functions\r
3190  *  @brief    Filter state functions\r
3191  *\r
3192 @verbatim\r
3193   ==============================================================================\r
3194                      ##### Filter state functions #####\r
3195   ==============================================================================\r
3196     [..]  This section provides functions allowing to:\r
3197       (+) Get the DFSDM filter state.\r
3198       (+) Get the DFSDM filter error.\r
3199 @endverbatim\r
3200   * @{\r
3201   */\r
3202 \r
3203 /**\r
3204   * @brief  This function allows to get the current DFSDM filter handle state.\r
3205   * @param  hdfsdm_filter DFSDM filter handle.\r
3206   * @retval DFSDM filter state.\r
3207   */\r
3208 HAL_DFSDM_Filter_StateTypeDef HAL_DFSDM_FilterGetState(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)\r
3209 {\r
3210   /* Return DFSDM filter handle state */\r
3211   return hdfsdm_filter->State;\r
3212 }\r
3213 \r
3214 /**\r
3215   * @brief  This function allows to get the current DFSDM filter error.\r
3216   * @param  hdfsdm_filter DFSDM filter handle.\r
3217   * @retval DFSDM filter error code.\r
3218   */\r
3219 uint32_t HAL_DFSDM_FilterGetError(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)\r
3220 {\r
3221   return hdfsdm_filter->ErrorCode;\r
3222 }\r
3223 \r
3224 /**\r
3225   * @}\r
3226   */\r
3227 \r
3228 /**\r
3229   * @}\r
3230   */\r
3231 /* End of exported functions -------------------------------------------------*/\r
3232 \r
3233 /* Private functions ---------------------------------------------------------*/\r
3234 /** @addtogroup DFSDM_Private_Functions DFSDM Private Functions\r
3235   * @{\r
3236   */\r
3237 \r
3238 /**\r
3239   * @brief  DMA half transfer complete callback for regular conversion.\r
3240   * @param  hdma DMA handle.\r
3241   * @retval None\r
3242   */\r
3243 static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma)\r
3244 {\r
3245   /* Get DFSDM filter handle */\r
3246   DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;\r
3247 \r
3248   /* Call regular half conversion complete callback */\r
3249 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)\r
3250   hdfsdm_filter->RegConvHalfCpltCallback(hdfsdm_filter);\r
3251 #else\r
3252   HAL_DFSDM_FilterRegConvHalfCpltCallback(hdfsdm_filter);\r
3253 #endif\r
3254 }\r
3255 \r
3256 /**\r
3257   * @brief  DMA transfer complete callback for regular conversion.\r
3258   * @param  hdma DMA handle.\r
3259   * @retval None\r
3260   */\r
3261 static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma)\r
3262 {\r
3263   /* Get DFSDM filter handle */\r
3264   DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;\r
3265 \r
3266   /* Call regular conversion complete callback */\r
3267 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)\r
3268   hdfsdm_filter->RegConvCpltCallback(hdfsdm_filter);\r
3269 #else\r
3270   HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);\r
3271 #endif\r
3272 }\r
3273 \r
3274 /**\r
3275   * @brief  DMA half transfer complete callback for injected conversion.\r
3276   * @param  hdma DMA handle.\r
3277   * @retval None\r
3278   */\r
3279 static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma)\r
3280 {\r
3281   /* Get DFSDM filter handle */\r
3282   DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;\r
3283 \r
3284   /* Call injected half conversion complete callback */\r
3285 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)\r
3286   hdfsdm_filter->InjConvHalfCpltCallback(hdfsdm_filter);\r
3287 #else\r
3288   HAL_DFSDM_FilterInjConvHalfCpltCallback(hdfsdm_filter);\r
3289 #endif\r
3290 }\r
3291 \r
3292 /**\r
3293   * @brief  DMA transfer complete callback for injected conversion.\r
3294   * @param  hdma DMA handle.\r
3295   * @retval None\r
3296   */\r
3297 static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma)\r
3298 {\r
3299   /* Get DFSDM filter handle */\r
3300   DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;\r
3301 \r
3302   /* Call injected conversion complete callback */\r
3303 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)\r
3304   hdfsdm_filter->InjConvCpltCallback(hdfsdm_filter);\r
3305 #else\r
3306   HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);\r
3307 #endif\r
3308 }\r
3309 \r
3310 /**\r
3311   * @brief  DMA error callback.\r
3312   * @param  hdma DMA handle.\r
3313   * @retval None\r
3314   */\r
3315 static void DFSDM_DMAError(DMA_HandleTypeDef *hdma)\r
3316 {\r
3317   /* Get DFSDM filter handle */\r
3318   DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;\r
3319 \r
3320   /* Update error code */\r
3321   hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_DMA;\r
3322 \r
3323   /* Call error callback */\r
3324 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)\r
3325   hdfsdm_filter->ErrorCallback(hdfsdm_filter);\r
3326 #else\r
3327   HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);\r
3328 #endif\r
3329 }\r
3330 \r
3331 /**\r
3332   * @brief  This function allows to get the number of injected channels.\r
3333   * @param  Channels bitfield of injected channels.\r
3334   * @retval Number of injected channels.\r
3335   */\r
3336 static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels)\r
3337 {\r
3338   uint32_t nbChannels = 0;\r
3339   uint32_t tmp;\r
3340 \r
3341   /* Get the number of channels from bitfield */\r
3342   tmp = (uint32_t)(Channels & DFSDM_LSB_MASK);\r
3343   while (tmp != 0U)\r
3344   {\r
3345     if ((tmp & 1U) != 0U)\r
3346     {\r
3347       nbChannels++;\r
3348     }\r
3349     tmp = (uint32_t)(tmp >> 1);\r
3350   }\r
3351   return nbChannels;\r
3352 }\r
3353 \r
3354 /**\r
3355   * @brief  This function allows to get the channel number from channel instance.\r
3356   * @param  Instance DFSDM channel instance.\r
3357   * @retval Channel number.\r
3358   */\r
3359 static uint32_t DFSDM_GetChannelFromInstance(const DFSDM_Channel_TypeDef *Instance)\r
3360 {\r
3361   uint32_t channel;\r
3362 \r
3363   /* Get channel from instance */\r
3364   if (Instance == DFSDM1_Channel0)\r
3365   {\r
3366     channel = 0;\r
3367   }\r
3368   else if (Instance == DFSDM1_Channel1)\r
3369   {\r
3370     channel = 1;\r
3371   }\r
3372   else if (Instance == DFSDM1_Channel2)\r
3373   {\r
3374     channel = 2;\r
3375   }\r
3376   else if (Instance == DFSDM1_Channel3)\r
3377   {\r
3378     channel = 3;\r
3379   }\r
3380 #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \\r
3381     defined(STM32L496xx) || defined(STM32L4A6xx) || \\r
3382     defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)\r
3383   else if (Instance == DFSDM1_Channel4)\r
3384   {\r
3385     channel = 4;\r
3386   }\r
3387   else if (Instance == DFSDM1_Channel5)\r
3388   {\r
3389     channel = 5;\r
3390   }\r
3391   else if (Instance == DFSDM1_Channel6)\r
3392   {\r
3393     channel = 6;\r
3394   }\r
3395   else if (Instance == DFSDM1_Channel7)\r
3396   {\r
3397     channel = 7;\r
3398   }\r
3399 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || STM32L496xx || STM32L4A6xx || STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */\r
3400   else\r
3401   {\r
3402     channel = 0;\r
3403   }\r
3404 \r
3405   return channel;\r
3406 }\r
3407 \r
3408 /**\r
3409   * @brief  This function allows to really start regular conversion.\r
3410   * @param  hdfsdm_filter DFSDM filter handle.\r
3411   * @retval None\r
3412   */\r
3413 static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)\r
3414 {\r
3415   /* Check regular trigger */\r
3416   if (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER)\r
3417   {\r
3418     /* Software start of regular conversion */\r
3419     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;\r
3420   }\r
3421   else /* synchronous trigger */\r
3422   {\r
3423     /* Disable DFSDM filter */\r
3424     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);\r
3425 \r
3426     /* Set RSYNC bit in DFSDM_FLTCR1 register */\r
3427     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSYNC;\r
3428 \r
3429     /* Enable DFSDM  filter */\r
3430     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;\r
3431 \r
3432     /* If injected conversion was in progress, restart it */\r
3433     if (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ)\r
3434     {\r
3435       if (hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)\r
3436       {\r
3437         hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;\r
3438       }\r
3439       /* Update remaining injected conversions */\r
3440       hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \\r
3441                                         hdfsdm_filter->InjectedChannelsNbr : 1U;\r
3442     }\r
3443   }\r
3444   /* Update DFSDM filter state */\r
3445   hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \\r
3446                          HAL_DFSDM_FILTER_STATE_REG : HAL_DFSDM_FILTER_STATE_REG_INJ;\r
3447 }\r
3448 \r
3449 /**\r
3450   * @brief  This function allows to really stop regular conversion.\r
3451   * @param  hdfsdm_filter DFSDM filter handle.\r
3452   * @retval None\r
3453   */\r
3454 static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)\r
3455 {\r
3456   /* Disable DFSDM filter */\r
3457   hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);\r
3458 \r
3459   /* If regular trigger was synchronous, reset RSYNC bit in DFSDM_FLTCR1 register */\r
3460   if (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SYNC_TRIGGER)\r
3461   {\r
3462     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);\r
3463   }\r
3464 \r
3465   /* Enable DFSDM filter */\r
3466   hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;\r
3467 \r
3468   /* If injected conversion was in progress, restart it */\r
3469   if (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ)\r
3470   {\r
3471     if (hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)\r
3472     {\r
3473       hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;\r
3474     }\r
3475     /* Update remaining injected conversions */\r
3476     hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \\r
3477                                       hdfsdm_filter->InjectedChannelsNbr : 1U;\r
3478   }\r
3479 \r
3480   /* Update DFSDM filter state */\r
3481   hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \\r
3482                          HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;\r
3483 }\r
3484 \r
3485 /**\r
3486   * @brief  This function allows to really start injected conversion.\r
3487   * @param  hdfsdm_filter DFSDM filter handle.\r
3488   * @retval None\r
3489   */\r
3490 static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)\r
3491 {\r
3492   /* Check injected trigger */\r
3493   if (hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)\r
3494   {\r
3495     /* Software start of injected conversion */\r
3496     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;\r
3497   }\r
3498   else /* external or synchronous trigger */\r
3499   {\r
3500     /* Disable DFSDM filter */\r
3501     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);\r
3502 \r
3503     if (hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)\r
3504     {\r
3505       /* Set JSYNC bit in DFSDM_FLTCR1 register */\r
3506       hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSYNC;\r
3507     }\r
3508     else /* external trigger */\r
3509     {\r
3510       /* Set JEXTEN[1:0] bits in DFSDM_FLTCR1 register */\r
3511       hdfsdm_filter->Instance->FLTCR1 |= hdfsdm_filter->ExtTriggerEdge;\r
3512     }\r
3513 \r
3514     /* Enable DFSDM filter */\r
3515     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;\r
3516 \r
3517     /* If regular conversion was in progress, restart it */\r
3518     if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) && \\r
3519         (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))\r
3520     {\r
3521       hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;\r
3522     }\r
3523   }\r
3524   /* Update DFSDM filter state */\r
3525   hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \\r
3526                          HAL_DFSDM_FILTER_STATE_INJ : HAL_DFSDM_FILTER_STATE_REG_INJ;\r
3527 }\r
3528 \r
3529 /**\r
3530   * @brief  This function allows to really stop injected conversion.\r
3531   * @param  hdfsdm_filter DFSDM filter handle.\r
3532   * @retval None\r
3533   */\r
3534 static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)\r
3535 {\r
3536   /* Disable DFSDM filter */\r
3537   hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);\r
3538 \r
3539   /* If injected trigger was synchronous, reset JSYNC bit in DFSDM_FLTCR1 register */\r
3540   if (hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)\r
3541   {\r
3542     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC);\r
3543   }\r
3544   else if (hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_EXT_TRIGGER)\r
3545   {\r
3546     /* Reset JEXTEN[1:0] bits in DFSDM_FLTCR1 register */\r
3547     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JEXTEN);\r
3548   }\r
3549   else\r
3550   {\r
3551     /* Nothing to do */\r
3552   }\r
3553 \r
3554   /* Enable DFSDM filter */\r
3555   hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;\r
3556 \r
3557   /* If regular conversion was in progress, restart it */\r
3558   if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ) && \\r
3559       (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))\r
3560   {\r
3561     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;\r
3562   }\r
3563 \r
3564   /* Update remaining injected conversions */\r
3565   hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \\r
3566                                     hdfsdm_filter->InjectedChannelsNbr : 1U;\r
3567 \r
3568   /* Update DFSDM filter state */\r
3569   hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \\r
3570                          HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;\r
3571 }\r
3572 \r
3573 /**\r
3574   * @}\r
3575   */\r
3576 /* End of private functions --------------------------------------------------*/\r
3577 \r
3578 /**\r
3579   * @}\r
3580   */\r
3581 \r
3582 #endif /* STM32L451xx || STM32L452xx || STM32L462xx || STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || STM32L496xx || STM32L4A6xx || STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */\r
3583 \r
3584 #endif /* HAL_DFSDM_MODULE_ENABLED */\r
3585 \r
3586 /**\r
3587   * @}\r
3588   */\r
3589 \r
3590 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/\r