1 /**********************************************************************
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2 * $Id$ lpc18xx_rgu.c 2011-06-02
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4 * @file lpc18xx_rgu.c
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5 * @brief Contains all functions support for RGU firmware library on LPC18xx
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7 * @date 02. June. 2011
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8 * @author NXP MCU SW Application Team
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10 * Copyright(C) 2011, NXP Semiconductor
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11 * All rights reserved.
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13 ***********************************************************************
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14 * Software that is described herein is for illustrative purposes only
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15 * which provides customers with programming information regarding the
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16 * products. This software is supplied "AS IS" without any warranties.
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17 * NXP Semiconductors assumes no responsibility or liability for the
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18 * use of the software, conveys no license or title under any patent,
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19 * copyright, or mask work right to the product. NXP Semiconductors
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20 * reserves the right to make changes in the software without
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21 * notification. NXP Semiconductors also make no representation or
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22 * warranty that such application will be suitable for the specified
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23 * use without further testing or modification.
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24 **********************************************************************/
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26 /* Peripheral group ----------------------------------------------------------- */
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31 /* Includes ------------------------------------------------------------------- */
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32 #include "lpc18xx_rgu.h"
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33 #include "lpc18xx_cgu.h"
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35 /* If this source file built with example, the LPC18xx FW library configuration
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36 * file in each example directory ("lpc18xx_libcfg.h") must be included,
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37 * otherwise the default FW library configuration file must be included instead
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39 #ifdef __BUILD_WITH_EXAMPLE__
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40 #include "lpc18xx_libcfg.h"
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42 #include "lpc18xx_libcfg_default.h"
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43 #endif /* __BUILD_WITH_EXAMPLE__ */
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47 /* Public Functions ----------------------------------------------------------- */
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48 /** @addtogroup RGU_Public_Functions
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52 /*********************************************************************//**
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53 * @brief Soft Reset a Signal
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54 * @param[in] ResetSignal indicates which signal will be reset, should be:
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55 * - RGU_SIG_CORE :Core
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56 * - RGU_SIG_PERIPH :Peripheral
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57 * - RGU_SIG_MASTER :Master
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58 * - RGU_SIG_WWDT :WWDT
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59 * - RGU_SIG_CREG :Configuration register block
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60 * - RGU_SIG_BUS :Buses
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61 * - RGU_SIG_SCU :System control unit
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62 * - RGU_SIG_PINMUX :Pin mux
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63 * - RGU_SIG_M3 :Cortex-M3 system
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64 * - RGU_SIG_LCD :LCD controller
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65 * - RGU_SIG_USB0 :USB0
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66 * - RGU_SIG_USB1 :USB1
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67 * - RGU_SIG_DMA :DMA
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68 * - RGU_SIG_SDIO :SDIO
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69 * - RGU_SIG_EMC :External memory controller
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70 * - RGU_SIG_ETHERNET :Ethernet
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71 * - RGU_SIG_AES :AES
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72 * - RGU_SIG_GPIO :GPIO
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73 * - RGU_SIG_TIMER0 :Timer 0
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74 * - RGU_SIG_TIMER1 :Timer 1
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75 * - RGU_SIG_TIMER2 :Timer 2
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76 * - RGU_SIG_TIMER3 :Timer 3
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77 * - RGU_SIG_RITIMER :Repetitive Interrupt Timer
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78 * - RGU_SIG_SCT :State Configurable Timer
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79 * - RGU_SIG_MOTOCONPWM:Motor Control PWM
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80 * - RGU_SIG_QEI :QEI
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81 * - RGU_SIG_ADC0 :ADC0
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82 * - RGU_SIG_ADC1 :ADC1
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83 * - RGU_SIG_DAC :DAC
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84 * - RGU_SIG_UART0 :UART0
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85 * - RGU_SIG_UART1 :UART1
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86 * - RGU_SIG_UART2 :UART2
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87 * - RGU_SIG_UART3 :UART3
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88 * - RGU_SIG_I2C0 :I2C0
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89 * - RGU_SIG_I2C1 :I2C1
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90 * - RGU_SIG_SSP0 :SSP0
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91 * - RGU_SIG_SSP1 :SSP1
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92 * - RGU_SIG_I2S :I2S
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93 * - RGU_SIG_SPIFI :SPIFI
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94 * - RGU_SIG_CAN :CAN
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96 **********************************************************************/
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97 void RGU_SoftReset(RGU_SIG ResetSignal)
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99 if(ResetSignal < 32){
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100 LPC_RGU->RESET_CTRL0 = 1 << ResetSignal;
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101 LPC_RGU->RESET_CTRL0 = 0;
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103 LPC_RGU->RESET_CTRL1 = 1 << (ResetSignal - 32);
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104 LPC_RGU->RESET_CTRL1 = 0;
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108 /*********************************************************************//**
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109 * @brief Get source cause of a signal
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110 * @param[in] ResetSignal reset signal, should be:
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111 * - RGU_SIG_CORE :Core
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112 * - RGU_SIG_PERIPH :Peripheral
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113 * - RGU_SIG_MASTER :Master
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114 * - RGU_SIG_WWDT :WWDT
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115 * - RGU_SIG_CREG :Configuration register block
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116 * - RGU_SIG_BUS :Buses
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117 * - RGU_SIG_SCU :System control unit
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118 * - RGU_SIG_PINMUX :Pin mux
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119 * - RGU_SIG_M3 :Cortex-M3 system
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120 * - RGU_SIG_LCD :LCD controller
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121 * - RGU_SIG_USB0 :USB0
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122 * - RGU_SIG_USB1 :USB1
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123 * - RGU_SIG_DMA :DMA
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124 * - RGU_SIG_SDIO :SDIO
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125 * - RGU_SIG_EMC :External memory controller
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126 * - RGU_SIG_ETHERNET :Ethernet
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127 * - RGU_SIG_AES :AES
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128 * - RGU_SIG_GPIO :GPIO
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129 * - RGU_SIG_TIMER0 :Timer 0
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130 * - RGU_SIG_TIMER1 :Timer 1
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131 * - RGU_SIG_TIMER2 :Timer 2
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132 * - RGU_SIG_TIMER3 :Timer 3
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133 * - RGU_SIG_RITIMER :Repetitive Interrupt Timer
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134 * - RGU_SIG_SCT :State Configurable Timer
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135 * - RGU_SIG_MOTOCONPWM:Motor Control PWM
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136 * - RGU_SIG_QEI :QEI
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137 * - RGU_SIG_ADC0 :ADC0
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138 * - RGU_SIG_ADC1 :ADC1
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139 * - RGU_SIG_DAC :DAC
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140 * - RGU_SIG_UART0 :UART0
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141 * - RGU_SIG_UART1 :UART1
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142 * - RGU_SIG_UART2 :UART2
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143 * - RGU_SIG_UART3 :UART3
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144 * - RGU_SIG_I2C0 :I2C0
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145 * - RGU_SIG_I2C1 :I2C1
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146 * - RGU_SIG_SSP0 :SSP0
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147 * - RGU_SIG_SSP1 :SSP1
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148 * - RGU_SIG_I2S :I2S
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149 * - RGU_SIG_SPIFI :SPIFI
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150 * - RGU_SIG_CAN :CAN
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151 * @return Source cause of reset, could be:
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152 * - RGU_SRC_NONE :No source
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153 * - RGU_SRC_SOFT :Software reset source
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154 * - RGU_SRC_EXT :External reset source
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155 * - RGU_SRC_CORE :Core reset source
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156 * - RGU_SRC_PERIPH :Peripheral reset source
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157 * - RGU_SRC_MASTER :Master reset source
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158 * - RGU_SRC_BOD :BOD reset source
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159 * - RGU_SRC_WWDT :WWDT reset source
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160 **********************************************************************/
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161 RGU_SRC RGU_GetSource(RGU_SIG ResetSignal)
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163 uint32_t i, temp, registercache;
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164 if(ResetSignal < 16)
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165 temp = 3 & (LPC_RGU->RESET_STATUS0 >> ResetSignal);
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166 else if(ResetSignal < 32)
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167 temp = 3 & (LPC_RGU->RESET_STATUS1 >> (ResetSignal - 16));
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168 else if(ResetSignal < 48)
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169 temp = 3 & (LPC_RGU->RESET_STATUS2 >> (ResetSignal - 32));
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171 temp = 3 & (LPC_RGU->RESET_STATUS3 >> (ResetSignal - 48));
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173 if(temp == 0) return RGU_SRC_NONE;
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174 else if(temp == 3) return RGU_SRC_SOFT;
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175 else if(temp == 1){
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176 registercache = (((uint32_t*)&LPC_RGU->RESET_EXT_STAT0)[ResetSignal]);
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177 for(i = 0; i < 6; i++){
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178 if(registercache & (1<<i)){
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179 return (RGU_SRC)(RGU_SRC_EXT + i);
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183 return RGU_SRC_NONE;
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186 /*********************************************************************//**
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187 * @brief Get Current Status of Signal
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188 * @param[in] ResetSignal Reset Signal, should be:
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189 * - RGU_SIG_CORE :Core
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190 * - RGU_SIG_PERIPH :Peripheral
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191 * - RGU_SIG_MASTER :Master
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192 * - RGU_SIG_WWDT :WWDT
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193 * - RGU_SIG_CREG :Configuration register block
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194 * - RGU_SIG_BUS :Buses
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195 * - RGU_SIG_SCU :System control unit
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196 * - RGU_SIG_PINMUX :Pin mux
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197 * - RGU_SIG_M3 :Cortex-M3 system
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198 * - RGU_SIG_LCD :LCD controller
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199 * - RGU_SIG_USB0 :USB0
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200 * - RGU_SIG_USB1 :USB1
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201 * - RGU_SIG_DMA :DMA
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202 * - RGU_SIG_SDIO :SDIO
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203 * - RGU_SIG_EMC :External memory controller
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204 * - RGU_SIG_ETHERNET :Ethernet
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205 * - RGU_SIG_AES :AES
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206 * - RGU_SIG_GPIO :GPIO
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207 * - RGU_SIG_TIMER0 :Timer 0
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208 * - RGU_SIG_TIMER1 :Timer 1
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209 * - RGU_SIG_TIMER2 :Timer 2
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210 * - RGU_SIG_TIMER3 :Timer 3
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211 * - RGU_SIG_RITIMER :Repetitive Interrupt Timer
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212 * - RGU_SIG_SCT :State Configurable Timer
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213 * - RGU_SIG_MOTOCONPWM:Motor Control PWM
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214 * - RGU_SIG_QEI :QEI
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215 * - RGU_SIG_ADC0 :ADC0
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216 * - RGU_SIG_ADC1 :ADC1
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217 * - RGU_SIG_DAC :DAC
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218 * - RGU_SIG_UART0 :UART0
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219 * - RGU_SIG_UART1 :UART1
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220 * - RGU_SIG_UART2 :UART2
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221 * - RGU_SIG_UART3 :UART3
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222 * - RGU_SIG_I2C0 :I2C0
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223 * - RGU_SIG_I2C1 :I2C1
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224 * - RGU_SIG_SSP0 :SSP0
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225 * - RGU_SIG_SSP1 :SSP1
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226 * - RGU_SIG_I2S :I2S
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227 * - RGU_SIG_SPIFI :SPIFI
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228 * - RGU_SIG_CAN :CAN
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229 * @return Signal status, could be:
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230 * - TRUE :reset is active
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231 * - FALSE :reset is inactive
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232 **********************************************************************/
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233 Bool RGU_GetSignalStatus(RGU_SIG ResetSignal)
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235 if(ResetSignal < 32)
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236 return (Bool)!(LPC_RGU->RESET_ACTIVE_STATUS0 | (1 << ResetSignal));
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238 return (Bool)!(LPC_RGU->RESET_ACTIVE_STATUS1 | (1 << (ResetSignal - 32)));
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252 /* --------------------------------- End Of File ------------------------------ */
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