1 /* Copyright 2018 SiFive, Inc */
2 /* SPDX-License-Identifier: Apache-2.0 */
4 #include <metal/machine/platform.h>
6 #ifdef METAL_SIFIVE_FE310_G000_HFROSC
8 #include <metal/drivers/sifive_fe310-g000_hfrosc.h>
9 #include <metal/machine.h>
11 #define CONFIG_DIVIDER 0x0000003FUL
12 #define CONFIG_TRIM 0x001F0000UL
13 #define CONFIG_ENABLE 0x40000000UL
14 #define CONFIG_READY 0x80000000UL
16 long __metal_driver_sifive_fe310_g000_hfrosc_get_rate_hz(const struct metal_clock *clock)
18 struct metal_clock *ref = __metal_driver_sifive_fe310_g000_hfrosc_ref(clock);
19 long config_offset = __metal_driver_sifive_fe310_g000_hfrosc_config_offset(clock);
20 struct __metal_driver_sifive_fe310_g000_prci *config_base =
21 __metal_driver_sifive_fe310_g000_hfrosc_config_base(clock);
22 const struct __metal_driver_vtable_sifive_fe310_g000_prci *vtable =
23 __metal_driver_sifive_fe310_g000_prci_vtable();
24 long cfg = vtable->get_reg(config_base, config_offset);
26 if ((cfg & CONFIG_ENABLE) == 0)
28 if ((cfg & CONFIG_READY) == 0)
30 return metal_clock_get_rate_hz(ref) / ((cfg & CONFIG_DIVIDER) + 1);
33 long __metal_driver_sifive_fe310_g000_hfrosc_set_rate_hz(struct metal_clock *clock, long rate)
35 return __metal_driver_sifive_fe310_g000_hfrosc_get_rate_hz(clock);
38 __METAL_DEFINE_VTABLE(__metal_driver_vtable_sifive_fe310_g000_hfrosc) = {
39 .clock.get_rate_hz = &__metal_driver_sifive_fe310_g000_hfrosc_get_rate_hz,
40 .clock.set_rate_hz = &__metal_driver_sifive_fe310_g000_hfrosc_set_rate_hz,
42 #endif /* METAL_SIFIVE_FE310_G000_HFROSC */
44 typedef int no_empty_translation_units;