2 * @brief LCD controller Registers and control functions
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5 * Copyright(C) NXP Semiconductors, 2012
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6 * All rights reserved.
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9 * Software that is described herein is for illustrative purposes only
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10 * which provides customers with programming information regarding the
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11 * LPC products. This software is supplied "AS IS" without any warranties of
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12 * any kind, and NXP Semiconductors and its licensor disclaim any and
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13 * all warranties, express or implied, including all implied warranties of
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14 * merchantability, fitness for a particular purpose and non-infringement of
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15 * intellectual property rights. NXP Semiconductors assumes no responsibility
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16 * or liability for the use of the software, conveys no license or rights under any
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17 * patent, copyright, mask work right, or any other intellectual property rights in
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18 * or to any products. NXP Semiconductors reserves the right to make changes
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19 * in the software without notification. NXP Semiconductors also makes no
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20 * representation or warranty that such application will be suitable for the
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21 * specified use without further testing or modification.
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24 * Permission to use, copy, modify, and distribute this software and its
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25 * documentation is hereby granted, under NXP Semiconductors' and its
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26 * licensor's relevant copyrights in the software, without fee, provided that it
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27 * is used in conjunction with NXP Semiconductors microcontrollers. This
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28 * copyright, permission, and disclaimer notice must appear in all copies of
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32 #ifndef __LCD_001_H_
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33 #define __LCD_001_H_
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35 #include "sys_config.h"
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42 /** @defgroup IP_LCD_001 IP: LCD register block and driver
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43 * @ingroup IP_Drivers
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48 * @brief LCD Controller register block structure
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50 typedef struct { /*!< LCD Structure */
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51 __IO uint32_t TIMH; /*!< Horizontal Timing Control register */
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52 __IO uint32_t TIMV; /*!< Vertical Timing Control register */
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53 __IO uint32_t POL; /*!< Clock and Signal Polarity Control register */
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54 __IO uint32_t LE; /*!< Line End Control register */
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55 __IO uint32_t UPBASE; /*!< Upper Panel Frame Base Address register */
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56 __IO uint32_t LPBASE; /*!< Lower Panel Frame Base Address register */
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57 __IO uint32_t CTRL; /*!< LCD Control register */
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58 __IO uint32_t INTMSK; /*!< Interrupt Mask register */
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59 __I uint32_t INTRAW; /*!< Raw Interrupt Status register */
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60 __I uint32_t INTSTAT; /*!< Masked Interrupt Status register */
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61 __O uint32_t INTCLR; /*!< Interrupt Clear register */
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62 __I uint32_t UPCURR; /*!< Upper Panel Current Address Value register */
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63 __I uint32_t LPCURR; /*!< Lower Panel Current Address Value register */
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64 __I uint32_t RESERVED0[115];
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65 __IO uint16_t PAL[256]; /*!< 256x16-bit Color Palette registers */
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66 __I uint32_t RESERVED1[256];
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67 __IO uint32_t CRSR_IMG[256];/*!< Cursor Image registers */
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68 __IO uint32_t CRSR_CTRL; /*!< Cursor Control register */
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69 __IO uint32_t CRSR_CFG; /*!< Cursor Configuration register */
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70 __IO uint32_t CRSR_PAL0; /*!< Cursor Palette register 0 */
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71 __IO uint32_t CRSR_PAL1; /*!< Cursor Palette register 1 */
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72 __IO uint32_t CRSR_XY; /*!< Cursor XY Position register */
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73 __IO uint32_t CRSR_CLIP; /*!< Cursor Clip Position register */
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74 __I uint32_t RESERVED2[2];
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75 __IO uint32_t CRSR_INTMSK; /*!< Cursor Interrupt Mask register */
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76 __O uint32_t CRSR_INTCLR; /*!< Cursor Interrupt Clear register */
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77 __I uint32_t CRSR_INTRAW; /*!< Cursor Raw Interrupt Status register */
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78 __I uint32_t CRSR_INTSTAT;/*!< Cursor Masked Interrupt Status register */
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82 * @brief LCD Palette entry format
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93 } LCD_PALETTE_ENTRY_T;
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96 * @brief LCD Panel type
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98 typedef enum IP_LCD_PANEL_OPT {
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99 LCD_TFT = 0x02, /*!< standard TFT */
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100 LCD_MONO_4 = 0x01, /*!< 4-bit STN mono */
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101 LCD_MONO_8 = 0x05, /*!< 8-bit STN mono */
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102 LCD_CSTN = 0x00 /*!< color STN */
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103 } IP_LCD_PANEL_OPT_T;
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106 * @brief LCD Color Format
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108 typedef enum IP_LCD_COLOR_FORMAT_OPT {
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109 LCD_COLOR_FORMAT_RGB = 0,
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110 LCD_COLOR_FORMAT_BGR
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111 } IP_LCD_COLOR_FORMAT_OPT_T;
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113 /** LCD Interrupt control mask register bits */
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114 #define LCD_INTMSK_FUFIM 0x2 /*!< FIFO underflow interrupt enable */
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115 #define LCD_INTMSK_LNBUIM 0x4 /*!< LCD next base address update interrupt enable */
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116 #define LCD_INTMSK_VCOMPIM 0x8 /*!< Vertical compare interrupt enable */
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117 #define LCD_INTMSK_BERIM 0x10 /*!< AHB master error interrupt enable */
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119 #define CLCDC_LCDCTRL_ENABLE _BIT(0) /*!< LCD control enable bit */
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120 #define CLCDC_LCDCTRL_PWR _BIT(11) /*!< LCD control power enable bit */
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123 * @brief A structure for LCD Configuration
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126 uint8_t HBP; /*!< Horizontal back porch in clocks */
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127 uint8_t HFP; /*!< Horizontal front porch in clocks */
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128 uint8_t HSW; /*!< HSYNC pulse width in clocks */
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129 uint16_t PPL; /*!< Pixels per line */
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130 uint8_t VBP; /*!< Vertical back porch in clocks */
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131 uint8_t VFP; /*!< Vertical front porch in clocks */
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132 uint8_t VSW; /*!< VSYNC pulse width in clocks */
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133 uint16_t LPP; /*!< Lines per panel */
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134 uint8_t IOE; /*!< Invert output enable, 1 = invert */
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135 uint8_t IPC; /*!< Invert panel clock, 1 = invert */
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136 uint8_t IHS; /*!< Invert HSYNC, 1 = invert */
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137 uint8_t IVS; /*!< Invert VSYNC, 1 = invert */
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138 uint8_t ACB; /*!< AC bias frequency in clocks (not used) */
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139 uint8_t BPP; /*!< Maximum bits per pixel the display supports */
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140 IP_LCD_PANEL_OPT_T LCD; /*!< LCD panel type */
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141 IP_LCD_COLOR_FORMAT_OPT_T color_format; /*!<BGR or RGB */
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142 uint8_t Dual; /*!< Dual panel, 1 = dual panel display */
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146 * @brief LCD Cursor Size
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148 typedef enum IP_LCD_CURSOR_SIZE_OPT {
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149 LCD_CURSOR_32x32 = 0,
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151 } IP_LCD_CURSOR_SIZE_OPT_T;
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154 * @brief Enable Controller Interrupt
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155 * @param pLCD : pointer to LCD Controller Reg Struct
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156 * @param ints : OR'ed interrupt bits to enable
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159 STATIC INLINE void IP_LCD_EnableInts(IP_LCD_001_T *pLCD, uint32_t ints)
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161 pLCD->INTMSK = ints;
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165 * @brief Disable Controller Interrupt
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166 * @param pLCD : pointer to LCD Controller Reg Struct
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167 * @param ints : OR'ed interrupt bits to disable
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170 STATIC INLINE void IP_LCD_DisableInts(IP_LCD_001_T *pLCD, uint32_t ints)
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172 pLCD->INTMSK = pLCD->INTMSK & ~(ints);
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176 * @brief Clear Controller Interrupt
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177 * @param pLCD : pointer to LCD Controller Reg Struct
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178 * @param ints : OR'ed interrupt bits to clear
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181 STATIC INLINE void IP_LCD_ClearInts(IP_LCD_001_T *pLCD, uint32_t ints)
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183 pLCD->INTCLR = pLCD->INTMSK & (ints);
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187 * @brief Power-on the LCD Panel (power pin)
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188 * @param pLCD : pointer to LCD Controller Reg Struct
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191 STATIC INLINE void IP_LCD_PowerOn(IP_LCD_001_T *pLCD) {
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193 pLCD->CTRL |= CLCDC_LCDCTRL_PWR;
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194 for (i = 0; i < 1000000; i++) {}
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195 pLCD->CTRL |= CLCDC_LCDCTRL_ENABLE;
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199 * @brief Power-off the LCD Panel (power pin)
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200 * @param pLCD : pointer to LCD Controller Reg Struct
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203 STATIC INLINE void IP_LCD_PowerOff(IP_LCD_001_T *pLCD) {
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205 pLCD->CTRL &= ~CLCDC_LCDCTRL_PWR;
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206 for (i = 0; i < 1000000; i++) {}
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207 pLCD->CTRL &= ~CLCDC_LCDCTRL_ENABLE;
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211 * @brief Enable the LCD Controller
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212 * @param pLCD : pointer to LCD Controller Reg Struct
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215 STATIC INLINE void IP_LCD_Enable(IP_LCD_001_T *pLCD) {
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216 pLCD->CTRL |= CLCDC_LCDCTRL_ENABLE;
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220 * @brief Enable the LCD Controller
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221 * @param pLCD : pointer to LCD Controller Reg Struct
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224 STATIC INLINE void IP_LCD_Disable(IP_LCD_001_T *pLCD) {
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225 pLCD->CTRL &= ~CLCDC_LCDCTRL_ENABLE;
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229 * @brief Set LCD Upper Panel Frame Buffer for Single Panel or Upper Panel Frame
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230 * Buffer for Dual Panel
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231 * @param pLCD : pointer to LCD Controller Reg Struct
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232 * @param buffer : address of buffer
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235 STATIC INLINE void IP_LCD_SetUPFrameBuffer(IP_LCD_001_T *pLCD, void *buffer)
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237 pLCD->UPBASE = (uint32_t) buffer;
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241 * @brief Set LCD Lower Panel Frame Buffer for Dual Panel
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242 * @param pLCD : pointer to LCD Controller Reg Struct
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243 * @param buffer : address of buffer
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246 STATIC INLINE void IP_LCD_SetLPFrameBuffer(IP_LCD_001_T *pLCD, void *buffer)
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248 pLCD->LPBASE = (uint32_t) buffer;
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252 * @brief Configure Cursor
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253 * @param pLCD : pointer to LCD Controller Reg Struct
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254 * @param cursor_size : specify size of cursor
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255 * - LCD_CURSOR_32x32 :cursor size is 32x32 pixels
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256 * - LCD_CURSOR_64x64 :cursor size is 64x64 pixels
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257 * @param sync : cursor sync mode
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258 * - TRUE :cursor sync to the frame sync pulse
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259 * - FALSE :cursor async mode
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262 STATIC INLINE void IP_LCD_Cursor_Config(IP_LCD_001_T *pLCD, IP_LCD_CURSOR_SIZE_OPT_T cursor_size, bool sync)
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264 pLCD->CRSR_CFG = ((sync ? 1 : 0) << 1) | cursor_size;
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268 * @brief Get Internal Cursor Image Buffer Address
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269 * @param pLCD : pointer to LCD Controller Reg Struct
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270 * @param cursor_num : specify number of cursor is going to be written
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271 * this param must < 4
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272 * @return Cursor Image Buffer Address
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274 STATIC INLINE void *IP_LCD_Cursor_GetImageBufferAddress(IP_LCD_001_T *pLCD, uint8_t cursor_num)
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276 return (void *) &(pLCD->CRSR_IMG[cursor_num * 64]);
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280 * @brief Enable Cursor
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281 * @param pLCD : pointer to LCD Controller Reg Struct
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282 * @param cursor_num : specify number of cursor is going to be written
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283 * this param must < 4
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286 STATIC INLINE void IP_LCD_Cursor_Enable(IP_LCD_001_T *pLCD, uint8_t cursor_num) {
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287 pLCD->CRSR_CTRL = (cursor_num << 4) | 1;
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291 * @brief Disable Cursor
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292 * @param pLCD : pointer to LCD Controller Reg Struct
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293 * @param cursor_num : specify number of cursor is going to be written
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294 * this param must < 4
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297 STATIC INLINE void IP_LCD_Cursor_Disable(IP_LCD_001_T *pLCD, uint8_t cursor_num) {
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298 pLCD->CRSR_CTRL = (cursor_num << 4);
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302 * @brief Load Cursor Palette
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303 * @param pLCD : pointer to LCD Controller Reg Struct
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304 * @param palette_color : cursor palette 0 value
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307 STATIC INLINE void IP_LCD_Cursor_LoadPalette0(IP_LCD_001_T *pLCD, uint32_t palette_color)
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313 pLCD->CRSR_PAL0 = (uint32_t) palette_color;
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317 * @brief Load Cursor Palette
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318 * @param pLCD : pointer to LCD Controller Reg Struct
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319 * @param palette_color : cursor palette 1 value
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322 STATIC INLINE void IP_LCD_Cursor_LoadPalette1(IP_LCD_001_T *pLCD, uint32_t palette_color)
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328 pLCD->CRSR_PAL1 = (uint32_t) palette_color;
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333 * @brief Set Cursor Position
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334 * @param pLCD : pointer to LCD Controller Reg Struct
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335 * @param x : horizontal position
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336 * @param y : vertical position
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339 STATIC INLINE void IP_LCD_Cursor_SetPos(IP_LCD_001_T *pLCD, uint16_t x, uint16_t y)
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341 pLCD->CRSR_XY = (x & 0x3FF) | ((y & 0x3FF) << 16);
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345 * @brief Set Cursor Clipping Position
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346 * @param pLCD : pointer to LCD Controller Reg Struct
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347 * @param x : horizontal position, should be in range: 0..63
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348 * @param y : vertical position, should be in range: 0..63
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351 STATIC INLINE void IP_LCD_Cursor_SetClip(IP_LCD_001_T *pLCD, uint16_t x, uint16_t y)
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353 pLCD->CRSR_CLIP = (x & 0x3F) | ((y & 0x3F) << 8);
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357 * @brief Load a color Palette entry
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358 * @param pLCD : pointer to LCD Controller Reg Struct
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359 * @param palette_addr : Address of palette table to load from
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360 * @param index : palette entry index to load
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363 STATIC INLINE void IP_LCD_Color_LoadPalette(IP_LCD_001_T *pLCD, uint32_t *palette_addr, uint32_t index)
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365 pLCD->PAL[index] = *(uint32_t *) palette_addr;
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369 * @brief Initialize the LCD controller
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370 * @param pLCD : pointer to LCD Controller Reg Struct
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371 * @param LCD_ConfigStruct : Pointer to LCD configuration
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372 * @return LCD_FUNC_OK is executed successfully or LCD_FUNC_ERR on error
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374 void IP_LCD_Init(IP_LCD_001_T *pLCD, LCD_Config_T *LCD_ConfigStruct);
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384 #endif /* __LCD_001_H_ */
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