1 /******************************************************************************
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31 ******************************************************************************/
32 /*****************************************************************************/
37 * This function provides a microsecond delay using the Global Timer register in
38 * the ARM Cortex A53 MP core.
41 * MODIFICATION HISTORY:
43 * Ver Who Date Changes
44 * ----- -------- -------- -----------------------------------------------
45 * 5.00 pkp 05/29/14 First release
48 ******************************************************************************/
49 /***************************** Include Files *********************************/
53 #include "xparameters.h"
54 #include "xpseudo_asm.h"
55 #include "xreg_cortexa53.h"
57 /* Global Timer is always clocked at half of the CPU frequency */
58 #define COUNTS_PER_USECOND (COUNTS_PER_SECOND/1000000 )
60 /*****************************************************************************/
63 * This API gives a delay in microseconds
65 * @param useconds requested
67 * @return 0 if the delay can be achieved, -1 if the requested delay
72 ****************************************************************************/
73 s32 usleep(u32 useconds)
77 /*write 50MHz frequency to System Time Stamp Generator Register*/
78 Xil_Out32((XIOU_SCNTRS_BASEADDR + XIOU_SCNTRS_FREQ_REG_OFFSET),XIOU_SCNTRS_FREQ);
80 /*Enable the counter*/
81 Xil_Out32((XIOU_SCNTRS_BASEADDR + XIOU_SCNTRS_CNT_CNTRL_REG_OFFSET),XIOU_SCNTRS_CNT_CNTRL_REG_EN);
84 tEnd = tCur + (((XTime) useconds) * COUNTS_PER_USECOND);
88 } while (tCur < tEnd);
90 /*Disable the counter*/
91 Xil_Out32((XIOU_SCNTRS_BASEADDR + XIOU_SCNTRS_CNT_CNTRL_REG_OFFSET),(~(XIOU_SCNTRS_CNT_CNTRL_REG_EN)));