1 /******************************************************************************
3 * Copyright (C) 2014 Xilinx, Inc. All rights reserved.
5 * Permission is hereby granted, free of charge, to any person obtaining a copy
6 * of this software and associated documentation files (the "Software"), to deal
7 * in the Software without restriction, including without limitation the rights
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9 * copies of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
15 * Use of the Software is limited solely to applications:
16 * (a) running on a Xilinx device, or
17 * (b) that interact with a Xilinx device through a bus or interconnect.
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
23 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
24 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
27 * Except as contained in this notice, the name of the Xilinx shall not be used
28 * in advertising or otherwise to promote the sale, use or other dealings in
29 * this Software without prior written authorization from Xilinx.
31 ******************************************************************************/
32 /*****************************************************************************/
37 * This file contains Xilinx software status codes. Status codes have their
38 * own data type called int. These codes are used throughout the Xilinx
41 ******************************************************************************/
43 #ifndef XSTATUS_H /* prevent circular inclusions */
44 #define XSTATUS_H /* by using protection macros */
50 /***************************** Include Files *********************************/
52 #include "xil_types.h"
53 #include "xil_assert.h"
55 /************************** Constant Definitions *****************************/
57 /*********************** Common statuses 0 - 500 *****************************/
59 #define XST_SUCCESS 0L
60 #define XST_FAILURE 1L
61 #define XST_DEVICE_NOT_FOUND 2L
62 #define XST_DEVICE_BLOCK_NOT_FOUND 3L
63 #define XST_INVALID_VERSION 4L
64 #define XST_DEVICE_IS_STARTED 5L
65 #define XST_DEVICE_IS_STOPPED 6L
66 #define XST_FIFO_ERROR 7L /* an error occurred during an
67 operation with a FIFO such as
68 an underrun or overrun, this
69 error requires the device to
71 #define XST_RESET_ERROR 8L /* an error occurred which requires
72 the device to be reset */
73 #define XST_DMA_ERROR 9L /* a DMA error occurred, this error
74 typically requires the device
75 using the DMA to be reset */
76 #define XST_NOT_POLLED 10L /* the device is not configured for
77 polled mode operation */
78 #define XST_FIFO_NO_ROOM 11L /* a FIFO did not have room to put
79 the specified data into */
80 #define XST_BUFFER_TOO_SMALL 12L /* the buffer is not large enough
81 to hold the expected data */
82 #define XST_NO_DATA 13L /* there was no data available */
83 #define XST_REGISTER_ERROR 14L /* a register did not contain the
85 #define XST_INVALID_PARAM 15L /* an invalid parameter was passed
87 #define XST_NOT_SGDMA 16L /* the device is not configured for
88 scatter-gather DMA operation */
89 #define XST_LOOPBACK_ERROR 17L /* a loopback test failed */
90 #define XST_NO_CALLBACK 18L /* a callback has not yet been
92 #define XST_NO_FEATURE 19L /* device is not configured with
93 the requested feature */
94 #define XST_NOT_INTERRUPT 20L /* device is not configured for
95 interrupt mode operation */
96 #define XST_DEVICE_BUSY 21L /* device is busy */
97 #define XST_ERROR_COUNT_MAX 22L /* the error counters of a device
99 #define XST_IS_STARTED 23L /* used when part of device is
102 #define XST_IS_STOPPED 24L /* used when part of device is
105 #define XST_DATA_LOST 26L /* driver defined error */
106 #define XST_RECV_ERROR 27L /* generic receive error */
107 #define XST_SEND_ERROR 28L /* generic transmit error */
108 #define XST_NOT_ENABLED 29L /* a requested service is not
109 available because it has not
112 /***************** Utility Component statuses 401 - 500 *********************/
114 #define XST_MEMTEST_FAILED 401L /* memory test failed */
117 /***************** Common Components statuses 501 - 1000 *********************/
119 /********************* Packet Fifo statuses 501 - 510 ************************/
121 #define XST_PFIFO_LACK_OF_DATA 501L /* not enough data in FIFO */
122 #define XST_PFIFO_NO_ROOM 502L /* not enough room in FIFO */
123 #define XST_PFIFO_BAD_REG_VALUE 503L /* self test, a register value
124 was invalid after reset */
125 #define XST_PFIFO_ERROR 504L /* generic packet FIFO error */
126 #define XST_PFIFO_DEADLOCK 505L /* packet FIFO is reporting
127 * empty and full simultaneously
130 /************************** DMA statuses 511 - 530 ***************************/
132 #define XST_DMA_TRANSFER_ERROR 511L /* self test, DMA transfer
134 #define XST_DMA_RESET_REGISTER_ERROR 512L /* self test, a register value
135 was invalid after reset */
136 #define XST_DMA_SG_LIST_EMPTY 513L /* scatter gather list contains
137 no buffer descriptors ready
139 #define XST_DMA_SG_IS_STARTED 514L /* scatter gather not stopped */
140 #define XST_DMA_SG_IS_STOPPED 515L /* scatter gather not running */
141 #define XST_DMA_SG_LIST_FULL 517L /* all the buffer desciptors of
142 the scatter gather list are
144 #define XST_DMA_SG_BD_LOCKED 518L /* the scatter gather buffer
145 descriptor which is to be
146 copied over in the scatter
148 #define XST_DMA_SG_NOTHING_TO_COMMIT 519L /* no buffer descriptors have been
149 put into the scatter gather
150 list to be commited */
151 #define XST_DMA_SG_COUNT_EXCEEDED 521L /* the packet count threshold
152 specified was larger than the
153 total # of buffer descriptors
154 in the scatter gather list */
155 #define XST_DMA_SG_LIST_EXISTS 522L /* the scatter gather list has
156 already been created */
157 #define XST_DMA_SG_NO_LIST 523L /* no scatter gather list has
159 #define XST_DMA_SG_BD_NOT_COMMITTED 524L /* the buffer descriptor which was
160 being started was not committed
162 #define XST_DMA_SG_NO_DATA 525L /* the buffer descriptor to start
163 has already been used by the
164 hardware so it can't be reused
166 #define XST_DMA_SG_LIST_ERROR 526L /* general purpose list access
168 #define XST_DMA_BD_ERROR 527L /* general buffer descriptor
171 /************************** IPIF statuses 531 - 550 ***************************/
173 #define XST_IPIF_REG_WIDTH_ERROR 531L /* an invalid register width
174 was passed into the function */
175 #define XST_IPIF_RESET_REGISTER_ERROR 532L /* the value of a register at
176 reset was not valid */
177 #define XST_IPIF_DEVICE_STATUS_ERROR 533L /* a write to the device interrupt
178 status register did not read
180 #define XST_IPIF_DEVICE_ACK_ERROR 534L /* the device interrupt status
181 register did not reset when
183 #define XST_IPIF_DEVICE_ENABLE_ERROR 535L /* the device interrupt enable
184 register was not updated when
185 other registers changed */
186 #define XST_IPIF_IP_STATUS_ERROR 536L /* a write to the IP interrupt
187 status register did not read
189 #define XST_IPIF_IP_ACK_ERROR 537L /* the IP interrupt status register
190 did not reset when acked */
191 #define XST_IPIF_IP_ENABLE_ERROR 538L /* IP interrupt enable register was
192 not updated correctly when other
194 #define XST_IPIF_DEVICE_PENDING_ERROR 539L /* The device interrupt pending
195 register did not indicate the
197 #define XST_IPIF_DEVICE_ID_ERROR 540L /* The device interrupt ID register
198 did not indicate the expected
200 #define XST_IPIF_ERROR 541L /* generic ipif error */
202 /****************** Device specific statuses 1001 - 4095 *********************/
204 /********************* Ethernet statuses 1001 - 1050 *************************/
206 #define XST_EMAC_MEMORY_SIZE_ERROR 1001L /* Memory space is not big enough
207 * to hold the minimum number of
208 * buffers or descriptors */
209 #define XST_EMAC_MEMORY_ALLOC_ERROR 1002L /* Memory allocation failed */
210 #define XST_EMAC_MII_READ_ERROR 1003L /* MII read error */
211 #define XST_EMAC_MII_BUSY 1004L /* An MII operation is in progress */
212 #define XST_EMAC_OUT_OF_BUFFERS 1005L /* Driver is out of buffers */
213 #define XST_EMAC_PARSE_ERROR 1006L /* Invalid driver init string */
214 #define XST_EMAC_COLLISION_ERROR 1007L /* Excess deferral or late
215 * collision on polled send */
217 /*********************** UART statuses 1051 - 1075 ***************************/
220 #define XST_UART_INIT_ERROR 1051L
221 #define XST_UART_START_ERROR 1052L
222 #define XST_UART_CONFIG_ERROR 1053L
223 #define XST_UART_TEST_FAIL 1054L
224 #define XST_UART_BAUD_ERROR 1055L
225 #define XST_UART_BAUD_RANGE 1056L
228 /************************ IIC statuses 1076 - 1100 ***************************/
230 #define XST_IIC_SELFTEST_FAILED 1076 /* self test failed */
231 #define XST_IIC_BUS_BUSY 1077 /* bus found busy */
232 #define XST_IIC_GENERAL_CALL_ADDRESS 1078 /* mastersend attempted with */
233 /* general call address */
234 #define XST_IIC_STAND_REG_RESET_ERROR 1079 /* A non parameterizable reg */
235 /* value after reset not valid */
236 #define XST_IIC_TX_FIFO_REG_RESET_ERROR 1080 /* Tx fifo included in design */
237 /* value after reset not valid */
238 #define XST_IIC_RX_FIFO_REG_RESET_ERROR 1081 /* Rx fifo included in design */
239 /* value after reset not valid */
240 #define XST_IIC_TBA_REG_RESET_ERROR 1082 /* 10 bit addr incl in design */
241 /* value after reset not valid */
242 #define XST_IIC_CR_READBACK_ERROR 1083 /* Read of the control register */
243 /* didn't return value written */
244 #define XST_IIC_DTR_READBACK_ERROR 1084 /* Read of the data Tx reg */
245 /* didn't return value written */
246 #define XST_IIC_DRR_READBACK_ERROR 1085 /* Read of the data Receive reg */
247 /* didn't return value written */
248 #define XST_IIC_ADR_READBACK_ERROR 1086 /* Read of the data Tx reg */
249 /* didn't return value written */
250 #define XST_IIC_TBA_READBACK_ERROR 1087 /* Read of the 10 bit addr reg */
251 /* didn't return written value */
252 #define XST_IIC_NOT_SLAVE 1088 /* The device isn't a slave */
254 /*********************** ATMC statuses 1101 - 1125 ***************************/
256 #define XST_ATMC_ERROR_COUNT_MAX 1101L /* the error counters in the ATM
257 controller hit the max value
258 which requires the statistics
261 /*********************** Flash statuses 1126 - 1150 **************************/
263 #define XST_FLASH_BUSY 1126L /* Flash is erasing or programming
265 #define XST_FLASH_READY 1127L /* Flash is ready for commands */
266 #define XST_FLASH_ERROR 1128L /* Flash had detected an internal
267 error. Use XFlash_DeviceControl
268 to retrieve device specific codes
270 #define XST_FLASH_ERASE_SUSPENDED 1129L /* Flash is in suspended erase state
272 #define XST_FLASH_WRITE_SUSPENDED 1130L /* Flash is in suspended write state
274 #define XST_FLASH_PART_NOT_SUPPORTED 1131L /* Flash type not supported by
276 #define XST_FLASH_NOT_SUPPORTED 1132L /* Operation not supported */
277 #define XST_FLASH_TOO_MANY_REGIONS 1133L /* Too many erase regions */
278 #define XST_FLASH_TIMEOUT_ERROR 1134L /* Programming or erase operation
279 aborted due to a timeout */
280 #define XST_FLASH_ADDRESS_ERROR 1135L /* Accessed flash outside its
282 #define XST_FLASH_ALIGNMENT_ERROR 1136L /* Write alignment error */
283 #define XST_FLASH_BLOCKING_CALL_ERROR 1137L /* Couldn't return immediately from
284 write/erase function with
285 XFL_NON_BLOCKING_WRITE/ERASE
287 #define XST_FLASH_CFI_QUERY_ERROR 1138L /* Failed to query the device */
289 /*********************** SPI statuses 1151 - 1175 ****************************/
291 #define XST_SPI_MODE_FAULT 1151 /* master was selected as slave */
292 #define XST_SPI_TRANSFER_DONE 1152 /* data transfer is complete */
293 #define XST_SPI_TRANSMIT_UNDERRUN 1153 /* slave underruns transmit register */
294 #define XST_SPI_RECEIVE_OVERRUN 1154 /* device overruns receive register */
295 #define XST_SPI_NO_SLAVE 1155 /* no slave has been selected yet */
296 #define XST_SPI_TOO_MANY_SLAVES 1156 /* more than one slave is being
298 #define XST_SPI_NOT_MASTER 1157 /* operation is valid only as master */
299 #define XST_SPI_SLAVE_ONLY 1158 /* device is configured as slave-only
301 #define XST_SPI_SLAVE_MODE_FAULT 1159 /* slave was selected while disabled */
302 #define XST_SPI_SLAVE_MODE 1160 /* device has been addressed as slave */
303 #define XST_SPI_RECEIVE_NOT_EMPTY 1161 /* device received data in slave mode */
305 #define XST_SPI_COMMAND_ERROR 1162 /* unrecognised command - qspi only */
307 /********************** OPB Arbiter statuses 1176 - 1200 *********************/
309 #define XST_OPBARB_INVALID_PRIORITY 1176 /* the priority registers have either
310 * one master assigned to two or more
311 * priorities, or one master not
312 * assigned to any priority
314 #define XST_OPBARB_NOT_SUSPENDED 1177 /* an attempt was made to modify the
315 * priority levels without first
316 * suspending the use of priority
319 #define XST_OPBARB_PARK_NOT_ENABLED 1178 /* bus parking by id was enabled but
320 * bus parking was not enabled
322 #define XST_OPBARB_NOT_FIXED_PRIORITY 1179 /* the arbiter must be in fixed
323 * priority mode to allow the
324 * priorities to be changed
327 /************************ Intc statuses 1201 - 1225 **************************/
329 #define XST_INTC_FAIL_SELFTEST 1201 /* self test failed */
330 #define XST_INTC_CONNECT_ERROR 1202 /* interrupt already in use */
332 /********************** TmrCtr statuses 1226 - 1250 **************************/
334 #define XST_TMRCTR_TIMER_FAILED 1226 /* self test failed */
336 /********************** WdtTb statuses 1251 - 1275 ***************************/
338 #define XST_WDTTB_TIMER_FAILED 1251L
340 /********************** PlbArb statuses 1276 - 1300 **************************/
342 #define XST_PLBARB_FAIL_SELFTEST 1276L
344 /********************** Plb2Opb statuses 1301 - 1325 *************************/
346 #define XST_PLB2OPB_FAIL_SELFTEST 1301L
348 /********************** Opb2Plb statuses 1326 - 1350 *************************/
350 #define XST_OPB2PLB_FAIL_SELFTEST 1326L
352 /********************** SysAce statuses 1351 - 1360 **************************/
354 #define XST_SYSACE_NO_LOCK 1351L /* No MPU lock has been granted */
356 /********************** PCI Bridge statuses 1361 - 1375 **********************/
358 #define XST_PCI_INVALID_ADDRESS 1361L
360 /********************** FlexRay constants 1400 - 1409 *************************/
362 #define XST_FR_TX_ERROR 1400
363 #define XST_FR_TX_BUSY 1401
364 #define XST_FR_BUF_LOCKED 1402
365 #define XST_FR_NO_BUF 1403
367 /****************** USB constants 1410 - 1420 *******************************/
369 #define XST_USB_ALREADY_CONFIGURED 1410
370 #define XST_USB_BUF_ALIGN_ERROR 1411
371 #define XST_USB_NO_DESC_AVAILABLE 1412
372 #define XST_USB_BUF_TOO_BIG 1413
373 #define XST_USB_NO_BUF 1414
375 /****************** HWICAP constants 1421 - 1429 *****************************/
377 #define XST_HWICAP_WRITE_DONE 1421
380 /****************** AXI VDMA constants 1430 - 1440 *****************************/
382 #define XST_VDMA_MISMATCH_ERROR 1430
384 /*********************** NAND Flash statuses 1441 - 1459 *********************/
386 #define XST_NAND_BUSY 1441L /* Flash is erasing or
389 #define XST_NAND_READY 1442L /* Flash is ready for commands
391 #define XST_NAND_ERROR 1443L /* Flash had detected an
394 #define XST_NAND_PART_NOT_SUPPORTED 1444L /* Flash type not supported by
397 #define XST_NAND_OPT_NOT_SUPPORTED 1445L /* Operation not supported
399 #define XST_NAND_TIMEOUT_ERROR 1446L /* Programming or erase
400 * operation aborted due to a
403 #define XST_NAND_ADDRESS_ERROR 1447L /* Accessed flash outside its
406 #define XST_NAND_ALIGNMENT_ERROR 1448L /* Write alignment error
408 #define XST_NAND_PARAM_PAGE_ERROR 1449L /* Failed to read parameter
411 #define XST_NAND_CACHE_ERROR 1450L /* Flash page buffer error
414 #define XST_NAND_WRITE_PROTECTED 1451L /* Flash is write protected
417 /**************************** Type Definitions *******************************/
421 /***************** Macros (Inline Functions) Definitions *********************/
424 /************************** Function Prototypes ******************************/
430 #endif /* end of protection macro */