2 * @brief LPC18xx/43xx Reset Generator Unit driver
\r
5 * Copyright(C) NXP Semiconductors, 2012
\r
6 * All rights reserved.
\r
9 * Software that is described herein is for illustrative purposes only
\r
10 * which provides customers with programming information regarding the
\r
11 * LPC products. This software is supplied "AS IS" without any warranties of
\r
12 * any kind, and NXP Semiconductors and its licensor disclaim any and
\r
13 * all warranties, express or implied, including all implied warranties of
\r
14 * merchantability, fitness for a particular purpose and non-infringement of
\r
15 * intellectual property rights. NXP Semiconductors assumes no responsibility
\r
16 * or liability for the use of the software, conveys no license or rights under any
\r
17 * patent, copyright, mask work right, or any other intellectual property rights in
\r
18 * or to any products. NXP Semiconductors reserves the right to make changes
\r
19 * in the software without notification. NXP Semiconductors also makes no
\r
20 * representation or warranty that such application will be suitable for the
\r
21 * specified use without further testing or modification.
\r
24 * Permission to use, copy, modify, and distribute this software and its
\r
25 * documentation is hereby granted, under NXP Semiconductors' and its
\r
26 * licensor's relevant copyrights in the software, without fee, provided that it
\r
27 * is used in conjunction with NXP Semiconductors microcontrollers. This
\r
28 * copyright, permission, and disclaimer notice must appear in all copies of
\r
34 /*****************************************************************************
\r
35 * Private types/enumerations/variables
\r
36 ****************************************************************************/
\r
38 /*****************************************************************************
\r
39 * Public types/enumerations/variables
\r
40 ****************************************************************************/
\r
42 /*****************************************************************************
\r
44 ****************************************************************************/
\r
46 /*****************************************************************************
\r
48 ****************************************************************************/
\r
50 /* Trigger a peripheral reset for the selected peripheral */
\r
51 void Chip_RGU_TriggerReset(CHIP_RGU_RST_T ResetNumber)
\r
53 volatile uint32_t *p;
\r
55 /* To trigger reset- write RESET_CTRLx with a 1 bit */
\r
56 p = (volatile uint32_t *) &(LPC_RGU->RESET_CTRL0);
\r
58 /* higher numbers are in RESET_CTRL1, RESET_CTRL2, etc. */
\r
59 p += ResetNumber / 32;
\r
61 /* On the LPC18xx and LPC43xx, most of the reset bits automatically clear
\r
62 after 1 clock cycle, so set the bit and return */
\r
63 *p = (1 << (ResetNumber % 32));
\r
66 /* Clears reset for the selected peripheral */
\r
67 void Chip_RGU_ClearReset(CHIP_RGU_RST_T ResetNumber)
\r
69 volatile uint32_t *p;
\r
71 /* To trigger reset- write RESET_CTRLx with a 1 bit */
\r
72 p = (volatile uint32_t *) &(LPC_RGU->RESET_CTRL0);
\r
74 /* higher numbers are in RESET_CTRL1, RESET_CTRL2, etc. */
\r
75 p += ResetNumber / 32;
\r
77 /* On the LPC18xx and LPC43xx, most of the reset bits automatically clear
\r
78 after 1 clock cycle, so set the bit and return */
\r
82 /* Checks the reset status of a peripheral */
\r
83 bool Chip_RGU_InReset(CHIP_RGU_RST_T ResetNumber)
\r
85 volatile uint32_t *read;
\r
87 read = (volatile uint32_t *) &(LPC_RGU->RESET_ACTIVE_STATUS0);
\r
88 read += ResetNumber / 32;
\r
90 /* Reset not asserted if bit is set */
\r
91 return (bool) ((*read & (1 << (ResetNumber % 32))) == 0);
\r