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   1 /******************************************************************************
   2 *
   3 * Copyright (C) 2016 Xilinx, Inc.  All rights reserved.
   4 *
   5 * Permission is hereby granted, free of charge, to any person obtaining a copy
   6 * of this software and associated documentation files (the "Software"), to deal
   7 * in the Software without restriction, including without limitation the rights
   8 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
   9 * copies of the Software, and to permit persons to whom the Software is
  10 * furnished to do so, subject to the following conditions:
  11 *
  12 * The above copyright notice and this permission notice shall be included in
  13 * all copies or substantial portions of the Software.
  14 *
  15 * Use of the Software is limited solely to applications:
  16 * (a) running on a Xilinx device, or
  17 * (b) that interact with a Xilinx device through a bus or interconnect.
  18 *
  19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  22 * XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  23 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
  24 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  25 * SOFTWARE.
  26 *
  27 * Except as contained in this notice, the name of the Xilinx shall not be used
  28 * in advertising or otherwise to promote the sale, use or other dealings in
  29 * this Software without prior written authorization from Xilinx.
  30 *
  31 ******************************************************************************/
  32 /*****************************************************************************/
  33 /**
  34 *
  35 * @file xsysmonpsu.c
  36 *
  37 * Functions in this file are the minimum required functions for the XSysMonPsu
  38 * driver. See xsysmonpsu.h for a detailed description of the driver.
  39 *
  40 * @note         None.
  41 *
  42 * <pre>
  43 *
  44 * MODIFICATION HISTORY:
  45 *
  46 * Ver   Who    Date         Changes
  47 * ----- -----  -------- -----------------------------------------------
  48 * 1.0   kvn    12/15/15 First release.
  49 *              02/15/16 Corrected Assert function call in
  50 *                       XSysMonPsu_GetMonitorStatus API.
  51 *              03/03/16 Added Temperature remote channel for Setsingle
  52 *                       channel API. Also corrected external mux channel
  53 *                       numbers.
  54 *
  55 * </pre>
  56 *
  57 ******************************************************************************/
  58
  59 /***************************** Include Files *********************************/
  60
  61 #include "xsysmonpsu.h"
  62
  63 /************************** Constant Definitions ****************************/
  64
  65 /**************************** Type Definitions ******************************/
  66
  67 /***************** Macros (Inline Functions) Definitions ********************/
  68
  69 /************************** Function Prototypes *****************************/
  70
  71 static void XSysMonPsu_StubHandler(void *CallBackRef);
  72
  73 /************************** Variable Definitions ****************************/
  74
  75 /*****************************************************************************/
  76 /**
  77 *
  78 * This function initializes XSysMonPsu device/instance. This function
  79 * must be called prior to using the System Monitor device.
  80 *
  81 * @param        InstancePtr is a pointer to the XSysMonPsu instance.
  82 * @param        ConfigPtr points to the XSysMonPsu device configuration structure.
  83 * @param        EffectiveAddr is the device base address in the virtual memory
  84 *               address space. If the address translation is not used then the
  85 *               physical address is passed.
  86 *               Unexpected errors may occur if the address mapping is changed
  87 *               after this function is invoked.
  88 *
  89 * @return
  90 *               - XST_SUCCESS if successful.
  91 *
  92 * @note         The user needs to first call the XSysMonPsu_LookupConfig() API
  93 *               which returns the Configuration structure pointer which is
  94 *               passed as a parameter to the XSysMonPsu_CfgInitialize() API.
  95 *
  96 ******************************************************************************/
  97 s32 XSysMonPsu_CfgInitialize(XSysMonPsu *InstancePtr, XSysMonPsu_Config *ConfigPtr,
  98                           u32 EffectiveAddr)
  99 {
 100         u32 PsSysmonControlStatus;
 101         u32 PlSysmonControlStatus;
 102
 103         /* Assert the input arguments. */
 104         Xil_AssertNonvoid(InstancePtr != NULL);
 105         Xil_AssertNonvoid(ConfigPtr != NULL);
 106
 107         /* Set the values read from the device config and the base address. */
 108         InstancePtr->Config.DeviceId = ConfigPtr->DeviceId;
 109         InstancePtr->Config.BaseAddress = EffectiveAddr;
 110
 111
 112         /* Set all handlers to stub values, let user configure this data later. */
 113         InstancePtr->Handler = XSysMonPsu_StubHandler;
 114
 115         /* Reset the device such that it is in a known state. */
 116         XSysMonPsu_Reset(InstancePtr);
 117
 118         PsSysmonControlStatus = XSysmonPsu_ReadReg(InstancePtr->Config.BaseAddress +
 119                         XSYSMONPSU_PS_SYSMON_CSTS_OFFSET);
 120
 121         /* Check if the PS Sysmon is in Idle / ready state or not */
 122         while(PsSysmonControlStatus != XSYSMONPSU_PS_SYSMON_READY) {
 123                 PsSysmonControlStatus = XSysmonPsu_ReadReg(InstancePtr->Config.BaseAddress +
 124                                         XSYSMONPSU_PS_SYSMON_CSTS_OFFSET);
 125         }
 126
 127         PlSysmonControlStatus = XSysmonPsu_ReadReg(InstancePtr->Config.BaseAddress +
 128                         XSYSMONPSU_PL_SYSMON_CSTS_OFFSET);
 129
 130         /* Check if the PL Sysmon is accessible to PS Sysmon or not */
 131         while((PlSysmonControlStatus & XSYSMONPSU_PL_SYSMON_CSTS_ACESBLE_MASK)
 132                                 != XSYSMONPSU_PL_SYSMON_CSTS_ACESBLE_MASK) {
 133                 PlSysmonControlStatus = XSysmonPsu_ReadReg(InstancePtr->Config.BaseAddress +
 134                                         XSYSMONPSU_PL_SYSMON_CSTS_OFFSET);
 135         }
 136
 137         /* Indicate the instance is now ready to use, initialized without error */
 138         InstancePtr->IsReady = XIL_COMPONENT_IS_READY;
 139
 140         return XST_SUCCESS;
 141 }
 142
 143 /****************************************************************************/
 144 /**
 145 *
 146 * This function is a stub handler that is the default handler such that if the
 147 * application has not set the handler when interrupts are enabled, this
 148 * function will be called.
 149 *
 150 * @param        CallBackRef is unused by this function.
 151 * @param        Event is unused by this function.
 152 *
 153 * @return       None.
 154 *
 155 * @note         None.
 156 *
 157 *****************************************************************************/
 158 static void XSysMonPsu_StubHandler(void *CallBackRef)
 159 {
 160         (void *) CallBackRef;
 161
 162         /* Assert occurs always since this is a stub and should never be called */
 163         Xil_AssertVoidAlways();
 164 }
 165
 166 /*****************************************************************************/
 167 /**
 168 *
 169 * This function resets the SystemMonitor
 170 *
 171 * @param        InstancePtr is a pointer to the XSysMonPsu instance.
 172 *
 173 * @return       None.
 174 *
 175 * @note         Upon reset, all Maximum and Minimum status registers will be
 176 *               reset to their default values. Currently running and any averaging
 177 *               will restart. Refer to the device data sheet for the device status and
 178 *               register values after the reset.
 179 *
 180 ******************************************************************************/
 181 void XSysMonPsu_Reset(XSysMonPsu *InstancePtr)
 182 {
 183         /* Assert the arguments. */
 184         Xil_AssertVoid(InstancePtr != NULL);
 185
 186         /* RESET the PS SYSMON */
 187         XSysmonPsu_WriteReg(InstancePtr->Config.BaseAddress + XPS_BA_OFFSET +
 188                         XSYSMONPSU_VP_VN_OFFSET, XSYSMONPSU_VP_VN_MASK);
 189
 190         /* RESET the PL SYSMON */
 191         XSysmonPsu_WriteReg(InstancePtr->Config.BaseAddress + XPL_BA_OFFSET +
 192                         XSYSMONPSU_VP_VN_OFFSET, XSYSMONPSU_VP_VN_MASK);
 193
 194 }
 195
 196 /****************************************************************************/
 197 /**
 198 *
 199 * This function reads the contents of the Status Register.
 200 *
 201 * @param        InstancePtr is a pointer to the XSysMonPsu instance.
 202 * @param        SysmonBlk is the value that tells whether it is for PS Sysmon
 203 *       block or PL Sysmon block register region.
 204 *
 205 * @return       A 32-bit value representing the contents of the Status Register.
 206 *               Use the XSYSMONPSU_MON_STS_* constants defined in xsysmonpsu_hw.h to
 207 *               interpret the returned value.
 208 *
 209 * @note         None.
 210 *****************************************************************************/
 211 u32 XSysMonPsu_GetStatus(XSysMonPsu *InstancePtr, u32 SysmonBlk)
 212 {
 213         u32 Status;
 214         u32 EffectiveBaseAddress;
 215
 216         /* Assert the arguments. */
 217         Xil_AssertNonvoid(InstancePtr != NULL);
 218         Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 219         Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
 220
 221         /* Calculate the effective baseaddress based on the Sysmon instance. */
 222         EffectiveBaseAddress =
 223                         XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
 224                                         SysmonBlk);
 225
 226         /* Read the Sysmon Status Register and return the value. */
 227         Status = XSysmonPsu_ReadReg(EffectiveBaseAddress + XSYSMONPSU_MON_STS_OFFSET);
 228
 229         return Status;
 230 }
 231
 232 /****************************************************************************/
 233 /**
 234 *
 235 * This function starts the ADC conversion in the Single Channel event driven
 236 * sampling mode. The EOC bit in Status Register will be set once the conversion
 237 * is finished. Refer to the device specification for more details.
 238 *
 239 * @param        InstancePtr is a pointer to the XSysMonPsu instance.
 240 *
 241 * @return       None.
 242 *
 243 * @note         The default state of the CONVST bit is a logic 0. The conversion
 244 *               is started when the CONVST bit is set to 1 from 0.
 245 *               This bit is self-clearing so that the next conversion
 246 *               can be started by setting this bit.
 247 *
 248 *****************************************************************************/
 249 void XSysMonPsu_StartAdcConversion(XSysMonPsu *InstancePtr)
 250 {
 251         u32 ControlStatus;
 252
 253         /* Assert the arguments. */
 254         Xil_AssertVoid(InstancePtr != NULL);
 255         Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 256
 257         /*
 258          * Start the conversion by setting the CONVST bit to 1 only if auto-convst
 259          * bit is not enabled. This convst bit is self-clearing.
 260          */
 261         ControlStatus = XSysmonPsu_ReadReg(InstancePtr->Config.BaseAddress +
 262                         XSYSMONPSU_PS_SYSMON_CSTS_OFFSET);
 263
 264         if ((ControlStatus & XSYSMONPSU_PS_SYSMON_CSTS_AUTO_CONVST_MASK )
 265                         != XSYSMONPSU_PS_SYSMON_CSTS_AUTO_CONVST_MASK) {
 266                 XSysmonPsu_WriteReg(InstancePtr->Config.BaseAddress +
 267                                         XSYSMONPSU_PS_SYSMON_CSTS_OFFSET,
 268                                         (ControlStatus | (u32)XSYSMONPSU_PS_SYSMON_CSTS_CONVST_MASK));
 269         }
 270 }
 271
 272 /****************************************************************************/
 273 /**
 274 *
 275 * Get the ADC converted data for the specified channel.
 276 *
 277 * @param        InstancePtr is a pointer to the XSysMonPsu instance.
 278 * @param        Channel is the channel number. Use the XSM_CH_* defined in
 279 *               the file xsysmonpsu.h. The valid channels for PS / PL SysMon are 0 - 6,
 280 *               8 - 10 and 13 - 37. For AMS, 38 - 53 channels are valid.
 281 * @param        Block is the value that tells whether it is for PS Sysmon block
 282 *       or PL Sysmon block or the AMS controller register region.
 283 *
 284 * @return       A 16-bit value representing the ADC converted data for the
 285 *               specified channel. The System Monitor device guarantees
 286 *               a 10 bit resolution for the ADC converted data and data is the
 287 *               10 MSB bits of the 16 data read from the device.
 288 *
 289 * @note         Please make sure that the proper channel number is passed.
 290 *
 291 *****************************************************************************/
 292 u16 XSysMonPsu_GetAdcData(XSysMonPsu *InstancePtr, u8 Channel, u32 Block)
 293 {
 294         u16 AdcData;
 295         u32 EffectiveBaseAddress;
 296
 297         /* Assert the arguments. */
 298         Xil_AssertNonvoid(InstancePtr != NULL);
 299         Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 300         Xil_AssertNonvoid((Channel <= XSM_CH_SUPPLY3) ||
 301                           ((Channel >= XSM_CH_SUPPLY_CALIB) &&
 302                           (Channel <= XSM_CH_GAINERR_CALIB)) ||
 303                           ((Channel >= XSM_CH_SUPPLY4) &&
 304                           (Channel <= XSM_CH_RESERVE1)));
 305         Xil_AssertNonvoid((Block == XSYSMON_PS)||(Block == XSYSMON_PL)
 306                                                 ||(Block == XSYSMON_AMS));
 307
 308         /* Calculate the effective baseaddress based on the Sysmon instance. */
 309         EffectiveBaseAddress =
 310                         XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
 311                                         Block);
 312
 313         /*
 314          * Read the selected ADC converted data for the specified channel
 315          * and return the value.
 316          */
 317         if (Channel <= XSM_CH_AUX_MAX) {
 318                 AdcData = (u16) (XSysmonPsu_ReadReg(EffectiveBaseAddress + ((u32)Channel << 2U)));
 319         } else if ((Channel >= XSM_CH_SUPPLY7) && (Channel <= XSM_CH_TEMP_REMTE)){
 320                 AdcData = (u16) (XSysmonPsu_ReadReg(EffectiveBaseAddress + XSM_ADC_CH_OFFSET +
 321                                 (((u32)Channel - XSM_CH_SUPPLY7) << 2U)));
 322         } else {
 323                 AdcData = (u16) (XSysmonPsu_ReadReg(EffectiveBaseAddress + XSM_AMS_CH_OFFSET +
 324                                 (((u32)Channel - XSM_CH_VCC_PSLL0) << 2U)));
 325         }
 326
 327         return AdcData;
 328 }
 329
 330 /****************************************************************************/
 331 /**
 332 *
 333 * This function gets the calibration coefficient data for the specified
 334 * parameter.
 335 *
 336 * @param        InstancePtr is a pointer to the XSysMonPsu instance.
 337 * @param        CoeffType specifies the calibration coefficient
 338 *               to be read. Use XSM_CALIB_* constants defined in xsysmonpsu.h to
 339 *               specify the calibration coefficient to be read.
 340 * @param        SysmonBlk is the value that tells whether it is for PS Sysmon
 341 *       block or PL Sysmon block register region.
 342 *
 343 * @return       A 16-bit value representing the calibration coefficient.
 344 *               The System Monitor device guarantees a 10 bit resolution for
 345 *               the ADC converted data and data is the 10 MSB bits of the 16
 346 *               data read from the device.
 347 *
 348 * @note         None.
 349 *
 350 *****************************************************************************/
 351 u16 XSysMonPsu_GetCalibCoefficient(XSysMonPsu *InstancePtr, u8 CoeffType,
 352                 u32 SysmonBlk)
 353 {
 354         u16 CalibData;
 355         u32 EffectiveBaseAddress;
 356
 357         /* Assert the arguments. */
 358         Xil_AssertNonvoid(InstancePtr != NULL);
 359         Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 360         Xil_AssertNonvoid(CoeffType <= XSM_CALIB_GAIN_ERROR_COEFF);
 361         Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
 362
 363         /* Calculate the effective baseaddress based on the Sysmon instance. */
 364         EffectiveBaseAddress =
 365                         XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
 366                                         SysmonBlk);
 367
 368         /* Read the selected calibration coefficient. */
 369         CalibData = (u16) XSysmonPsu_ReadReg(EffectiveBaseAddress +
 370                         XSYSMONPSU_CAL_SUP_OFF_OFFSET + ((u32)CoeffType << 2U));
 371
 372         return CalibData;
 373 }
 374
 375 /****************************************************************************/
 376 /**
 377 *
 378 * This function reads the Minimum/Maximum measurement for one of the
 379 * XSM_MIN_* or XSM_MAX_* constants defined in xsysmonpsu.h
 380 *
 381 * @param        InstancePtr is a pointer to the XSysMonPsu instance.
 382 * @param        MeasurementType specifies the parameter for which the
 383 *               Minimum/Maximum measurement has to be read.
 384 *               Use XSM_MAX_* and XSM_MIN_* constants defined in xsysmonpsu.h to
 385 *               specify the data to be read.
 386 * @param        SysmonBlk is the value that tells whether it is for PS Sysmon
 387 *       block or PL Sysmon block register region.
 388 *
 389 * @return       A 16-bit value representing the maximum/minimum measurement for
 390 *               specified parameter.
 391 *               The System Monitor device guarantees a 10 bit resolution for
 392 *               the ADC converted data and data is the 10 MSB bits of  16 bit
 393 *               data read from the device.
 394 *
 395 *****************************************************************************/
 396 u16 XSysMonPsu_GetMinMaxMeasurement(XSysMonPsu *InstancePtr, u8 MeasurementType,
 397                 u32 SysmonBlk)
 398 {
 399         u16 MinMaxData;
 400         u32 EffectiveBaseAddress;
 401
 402         /* Assert the arguments. */
 403         Xil_AssertNonvoid(InstancePtr != NULL);
 404         Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 405         Xil_AssertNonvoid((MeasurementType <= XSM_MAX_SUPPLY6) ||
 406                         ((MeasurementType >= XSM_MIN_SUPPLY4) &&
 407                         (MeasurementType <= XSM_MIN_SUPPLY6)) ||
 408                         ((MeasurementType >= XSM_MAX_SUPPLY7) &&
 409                         (MeasurementType <= XSM_MAX_TEMP_REMOTE)) ||
 410                         ((MeasurementType >= XSM_MIN_SUPPLY7) &&
 411                         (MeasurementType <= XSM_MIN_TEMP_REMOTE)));
 412         Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
 413
 414         /* Calculate the effective baseaddress based on the Sysmon instance. */
 415         EffectiveBaseAddress =
 416                         XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
 417                                         SysmonBlk);
 418
 419         /* Read and return the specified Minimum/Maximum measurement. */
 420         MinMaxData = (u16) (XSysmonPsu_ReadReg(EffectiveBaseAddress +
 421                                                         XSM_MIN_MAX_CH_OFFSET + ((u32)MeasurementType << 2U)));
 422
 423         return MinMaxData;
 424 }
 425
 426 /****************************************************************************/
 427 /**
 428 *
 429 * This function sets the number of samples of averaging that is to be done for
 430 * all the channels in both the single channel mode and sequence mode of
 431 * operations.
 432 *
 433 * @param        InstancePtr is a pointer to the XSysMonPsu instance.
 434 * @param        Average is the number of samples of averaging programmed to the
 435 *               Configuration Register 0. Use the XSM_AVG_* definitions defined
 436 *               in xsysmonpsu.h file :
 437 *               - XSM_AVG_0_SAMPLES for no averaging
 438 *               - XSM_AVG_16_SAMPLES for 16 samples of averaging
 439 *               - XSM_AVG_64_SAMPLES for 64 samples of averaging
 440 *               - XSM_AVG_256_SAMPLES for 256 samples of averaging
 441 * @param        SysmonBlk is the value that tells whether it is for PS Sysmon
 442 *       block or PL Sysmon block register region.
 443 *
 444 * @return       None.
 445 *
 446 * @note         None.
 447 *
 448 *****************************************************************************/
 449 void XSysMonPsu_SetAvg(XSysMonPsu *InstancePtr, u8 Average, u32 SysmonBlk)
 450 {
 451         u32 RegValue;
 452         u32 EffectiveBaseAddress;
 453
 454         /* Assert the arguments. */
 455         Xil_AssertVoid(InstancePtr != NULL);
 456         Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 457         Xil_AssertVoid(Average <= XSM_AVG_256_SAMPLES);
 458         Xil_AssertVoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
 459
 460         /* Calculate the effective baseaddress based on the Sysmon instance. */
 461         EffectiveBaseAddress =
 462                         XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
 463                                         SysmonBlk);
 464
 465         /* Write the averaging value into the Configuration Register 0. */
 466         RegValue = XSysmonPsu_ReadReg(EffectiveBaseAddress + XSYSMONPSU_CFG_REG0_OFFSET)
 467                                                 & (u32)(~XSYSMONPSU_CFG_REG0_AVRGNG_MASK);
 468         RegValue |= (((u32) Average << XSYSMONPSU_CFG_REG0_AVRGNG_SHIFT));
 469         XSysmonPsu_WriteReg(EffectiveBaseAddress + XSYSMONPSU_CFG_REG0_OFFSET,
 470                          RegValue);
 471 }
 472
 473 /****************************************************************************/
 474 /**
 475 *
 476 * This function returns the number of samples of averaging configured for all
 477 * the channels in the Configuration Register 0.
 478 *
 479 * @param        InstancePtr is a pointer to the XSysMonPsu instance.
 480 * @param        SysmonBlk is the value that tells whether it is for PS Sysmon
 481 *       block or PL Sysmon block register region.
 482 *
 483 * @return       The averaging read from the Configuration Register 0 is
 484 *               returned. Use the XSM_AVG_* bit definitions defined in xsysmonpsu.h
 485 *               file to interpret the returned value :
 486 *               - XSM_AVG_0_SAMPLES means no averaging
 487 *               - XSM_AVG_16_SAMPLES means 16 samples of averaging
 488 *               - XSM_AVG_64_SAMPLES means 64 samples of averaging
 489 *               - XSM_AVG_256_SAMPLES means 256 samples of averaging
 490 *
 491 * @note         None.
 492 *
 493 *****************************************************************************/
 494 u8 XSysMonPsu_GetAvg(XSysMonPsu *InstancePtr, u32 SysmonBlk)
 495 {
 496         u32 Average;
 497         u32 EffectiveBaseAddress;
 498
 499         /* Assert the arguments. */
 500         Xil_AssertNonvoid(InstancePtr != NULL);
 501         Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 502         Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
 503
 504         /* Calculate the effective baseaddress based on the Sysmon instance. */
 505         EffectiveBaseAddress =
 506                         XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
 507                                         SysmonBlk);
 508
 509         /* Read the averaging value from the Configuration Register 0. */
 510         Average = XSysmonPsu_ReadReg(EffectiveBaseAddress +
 511                                 XSYSMONPSU_CFG_REG0_OFFSET) & XSYSMONPSU_CFG_REG0_AVRGNG_MASK;
 512
 513         return (u8)(Average >> XSYSMONPSU_CFG_REG0_AVRGNG_SHIFT);
 514 }
 515
 516 /****************************************************************************/
 517 /**
 518 *
 519 * The function sets the given parameters in the Configuration Register 0 in
 520 * the single channel mode.
 521 *
 522 * @param        InstancePtr is a pointer to the XSysMonPsu instance.
 523 * @param        Channel is the channel number for conversion. The valid
 524 *               channels are 0 - 6, 8 - 10, 13 - 37.
 525 * @param        IncreaseAcqCycles is a boolean parameter which specifies whether
 526 *               the Acquisition time for the external channels has to be
 527 *               increased to 10 ADCCLK cycles (specify TRUE) or remain at the
 528 *               default 4 ADCCLK cycles (specify FALSE). This parameter is
 529 *               only valid for the external channels.
 530 * @param        IsEventMode is a boolean parameter that specifies continuous
 531 *               sampling (specify FALSE) or event driven sampling mode (specify
 532 *               TRUE) for the given channel.
 533 * @param        IsDifferentialMode is a boolean parameter which specifies
 534 *               unipolar(specify FALSE) or differential mode (specify TRUE) for
 535 *               the analog inputs. The  input mode is only valid for the
 536 *               external channels.
 537 * @param        SysmonBlk is the value that tells whether it is for PS Sysmon
 538 *       block or PL Sysmon block register region.
 539 *
 540 * @return
 541 *               - XST_SUCCESS if the given values were written successfully to
 542 *               the Configuration Register 0.
 543 *               - XST_FAILURE if the channel sequencer is enabled or the input
 544 *               parameters are not valid for the selected channel.
 545 *
 546 * @note
 547 *               - The number of samples for the averaging for all the channels
 548 *               is set by using the function XSysMonPsu_SetAvg.
 549 *               - The calibration of the device is done by doing a ADC
 550 *               conversion on the calibration channel(channel 8). The input
 551 *               parameters IncreaseAcqCycles, IsDifferentialMode and
 552 *               IsEventMode are not valid for this channel.
 553 *
 554 *****************************************************************************/
 555 s32 XSysMonPsu_SetSingleChParams(XSysMonPsu *InstancePtr, u8 Channel,
 556                                 u32 IncreaseAcqCycles, u32 IsEventMode,
 557                                 u32 IsDifferentialMode, u32 SysmonBlk)
 558 {
 559         u32 RegValue;
 560         u32 EffectiveBaseAddress;
 561         s32 Status;
 562
 563         /* Assert the arguments. */
 564         Xil_AssertNonvoid(InstancePtr != NULL);
 565         Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 566         Xil_AssertNonvoid((Channel <= XSM_CH_SUPPLY3) ||
 567                           ((Channel >= XSM_CH_SUPPLY_CALIB) &&
 568                           (Channel <= XSM_CH_GAINERR_CALIB)) ||
 569                           ((Channel >= XSM_CH_SUPPLY4) &&
 570                           (Channel <= XSM_CH_TEMP_REMTE)));
 571         Xil_AssertNonvoid((IncreaseAcqCycles == TRUE) ||
 572                           (IncreaseAcqCycles == FALSE));
 573         Xil_AssertNonvoid((IsEventMode == TRUE) || (IsEventMode == FALSE));
 574         Xil_AssertNonvoid((IsDifferentialMode == TRUE) ||
 575                           (IsDifferentialMode == FALSE));
 576         Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
 577
 578         /* Calculate the effective baseaddress based on the Sysmon instance. */
 579         EffectiveBaseAddress =
 580                         XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
 581                                         SysmonBlk);
 582
 583         /* Check if the device is in single channel mode else return failure */
 584         if ((XSysMonPsu_GetSequencerMode(InstancePtr, SysmonBlk)
 585                                 != XSM_SEQ_MODE_SINGCHAN)) {
 586                 Status = (s32)XST_FAILURE;
 587                 goto End;
 588         }
 589
 590         /* Read the Configuration Register 0 and extract out Averaging value. */
 591         RegValue = XSysmonPsu_ReadReg(EffectiveBaseAddress +
 592                         XSYSMONPSU_CFG_REG0_OFFSET) & XSYSMONPSU_CFG_REG0_AVRGNG_MASK;
 593
 594         /*
 595          * Select the number of acquisition cycles. The acquisition cycles is
 596          * only valid for the external channels.
 597          */
 598         if (IncreaseAcqCycles == TRUE) {
 599                 if (((Channel >= XSM_CH_AUX_MIN) && (Channel <= XSM_CH_AUX_MAX))
 600                     || (Channel == XSM_CH_VPVN)) {
 601                         RegValue |= XSYSMONPSU_CFG_REG0_ACQ_MASK;
 602                 } else {
 603                         Status = (s32)XST_FAILURE;
 604                         goto End;
 605                 }
 606         }
 607
 608         /*
 609          * Select the input mode. The input mode is only valid for the
 610          * external channels.
 611          */
 612         if (IsDifferentialMode == TRUE) {
 613
 614                 if (((Channel >= XSM_CH_AUX_MIN) && (Channel <= XSM_CH_AUX_MAX))
 615                     || (Channel == XSM_CH_VPVN)) {
 616                         RegValue |= XSYSMONPSU_CFG_REG0_BU_MASK;
 617                 } else {
 618                         Status = (s32)XST_FAILURE;
 619                         goto End;
 620                 }
 621         }
 622
 623         /* Select the ADC mode. */
 624         if (IsEventMode == TRUE) {
 625                 RegValue |= XSYSMONPSU_CFG_REG0_EC_MASK;
 626         }
 627
 628         /* Write the given values into the Configuration Register 0. */
 629         RegValue |= ((u32)Channel & XSYSMONPSU_CFG_REG0_MUX_CH_MASK);
 630         XSysmonPsu_WriteReg(EffectiveBaseAddress + XSYSMONPSU_CFG_REG0_OFFSET,
 631                          RegValue);
 632
 633         Status = (s32)XST_SUCCESS;
 634
 635 End:
 636         return Status;
 637 }
 638
 639 /****************************************************************************/
 640 /**
 641 *
 642 * This function enables the alarm outputs for the specified alarms in the
 643 * Configuration Registers 1:
 644 *
 645 *               - OT for Over Temperature (XSYSMONPSU_CFR_REG1_ALRM_OT_MASK)
 646 *               - ALM0 for On board Temperature (XSYSMONPSU_CFR_REG1_ALRM_TEMP_MASK)
 647 *               - ALM1 for SUPPLY1 (XSYSMONPSU_CFR_REG1_ALRM_SUPPLY1_MASK)
 648 *               - ALM2 for SUPPLY2 (XSYSMONPSU_CFR_REG1_ALRM_SUPPLY2_MASK)
 649 *               - ALM3 for SUPPLY3 (XSYSMONPSU_CFR_REG1_ALRM_SUPPLY3_MASK)
 650 *               - ALM4 for SUPPLY4 (XSYSMONPSU_CFR_REG1_ALRM__SUPPLY4_MASK)
 651 *               - ALM5 for SUPPLY5 (XSYSMONPSU_CFR_REG1_ALRM_SUPPLY5_MASK)
 652 *               - ALM6 for SUPPLY6 (XSYSMONPSU_CFR_REG1_ALRM_SUPPLY6_MASK)
 653 *
 654 * @param        InstancePtr is a pointer to the XSysMonPsu instance.
 655 * @param        AlmEnableMask is the bit-mask of the alarm outputs to be enabled
 656 *               in the Configuration Register 1.
 657 *               Bit positions of 1 will be enabled. Bit positions of 0 will be
 658 *               disabled. This mask is formed by OR'ing XSYSMONPSU_CFR_REG1_ALRM_*_MASK
 659 *               masks defined in xsysmonpsu.h.
 660 * @param        SysmonBlk is the value that tells whether it is for PS Sysmon
 661 *       block or PL Sysmon block register region.
 662 *
 663 * @return       None.
 664 *
 665 * @note         The implementation of the alarm enables in the Configuration
 666 *               register 1 is such that the alarms for bit positions of 0 will
 667 *               be enabled and alarms for bit positions of 1 will be disabled.
 668 *               The alarm outputs specified by the AlmEnableMask are negated
 669 *               before writing to the Configuration Register 1 because it
 670 *               was Disable register bits.
 671 *
 672 *****************************************************************************/
 673 void XSysMonPsu_SetAlarmEnables(XSysMonPsu *InstancePtr, u32 AlmEnableMask,
 674                 u32 SysmonBlk)
 675 {
 676         u32 RegValue;
 677         u32 EffectiveBaseAddress;
 678
 679         /* Assert the arguments. */
 680         Xil_AssertVoid(InstancePtr != NULL);
 681         Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 682         Xil_AssertVoid(AlmEnableMask <= XSYSMONPSU_CFG_REG1_ALRM_ALL_MASK);
 683         Xil_AssertVoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
 684
 685         /* Calculate the effective baseaddress based on the Sysmon instance. */
 686         EffectiveBaseAddress =
 687                         XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
 688                                         SysmonBlk);
 689
 690         RegValue = XSysmonPsu_ReadReg(EffectiveBaseAddress +
 691                                         XSYSMONPSU_CFG_REG1_OFFSET);
 692         RegValue &= (u32)(~XSYSMONPSU_CFG_REG1_ALRM_ALL_MASK);
 693         RegValue |= (~AlmEnableMask & (u32)XSYSMONPSU_CFG_REG1_ALRM_ALL_MASK);
 694
 695         /*
 696          * Enable/disables the alarm enables for the specified alarm bits in the
 697          * Configuration Register 1.
 698          */
 699         XSysmonPsu_WriteReg(EffectiveBaseAddress + XSYSMONPSU_CFG_REG1_OFFSET,
 700                          RegValue);
 701 }
 702
 703 /****************************************************************************/
 704 /**
 705 *
 706 * This function gets the status of the alarm output enables in the
 707 * Configuration Register 1.
 708 *
 709 * @param        InstancePtr is a pointer to the XSysMonPsu instance.
 710 * @param        SysmonBlk is the value that tells whether it is for PS Sysmon
 711 *       block or PL Sysmon block register region.
 712 *
 713 * @return       This is the bit-mask of the enabled alarm outputs in the
 714 *               Configuration Register 1. Use the masks XSYSMONPSU_CFG_REG1_ALRM_*_MASK
 715 *               masks defined in xsysmonpsu.h to interpret the returned value.
 716 *
 717 *               Bit positions of 1 indicate that the alarm output is enabled.
 718 *               Bit positions of 0 indicate that the alarm output is disabled.
 719 *
 720 *
 721 * @note         The implementation of the alarm enables in the Configuration
 722 *               register 1 is such that alarms for the bit positions of 1 will
 723 *               be disabled and alarms for bit positions of 0 will be enabled.
 724 *               The enabled alarm outputs returned by this function is the
 725 *               negated value of the the data read from the Configuration
 726 *               Register 1.
 727 *
 728 *****************************************************************************/
 729 u32 XSysMonPsu_GetAlarmEnables(XSysMonPsu *InstancePtr, u32 SysmonBlk)
 730 {
 731         u32 RegValue;
 732         u32 EffectiveBaseAddress;
 733
 734         /* Assert the arguments. */
 735         Xil_AssertNonvoid(InstancePtr != NULL);
 736         Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 737         Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
 738
 739         /* Calculate the effective baseaddress based on the Sysmon instance. */
 740         EffectiveBaseAddress =
 741                         XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
 742                                         SysmonBlk);
 743
 744         /*
 745          * Read the status of alarm output enables from the Configuration
 746          * Register 1.
 747          */
 748         RegValue = XSysmonPsu_ReadReg(EffectiveBaseAddress +
 749                         XSYSMONPSU_CFG_REG1_OFFSET) & XSYSMONPSU_CFG_REG1_ALRM_ALL_MASK;
 750         RegValue = (~RegValue & XSYSMONPSU_CFG_REG1_ALRM_ALL_MASK);
 751
 752         return RegValue;
 753 }
 754
 755 /****************************************************************************/
 756 /**
 757 *
 758 * This function sets the specified Channel Sequencer Mode in the Configuration
 759 * Register 1 :
 760 *               - Default safe mode (XSM_SEQ_MODE_SAFE)
 761 *               - One pass through sequence (XSM_SEQ_MODE_ONEPASS)
 762 *               - Continuous channel sequencing (XSM_SEQ_MODE_CONTINPASS)
 763 *               - Single Channel/Sequencer off (XSM_SEQ_MODE_SINGCHAN)
 764 *               - Olympus sampling mode (XSM_SEQ_MODE_OYLMPUS)
 765 *
 766 * @param        InstancePtr is a pointer to the XSysMonPsu instance.
 767 * @param        SequencerMode is the sequencer mode to be set.
 768 *               Use XSM_SEQ_MODE_* bits defined in xsysmonpsu.h.
 769 * @param        SysmonBlk is the value that tells whether it is for PS Sysmon
 770 *       block or PL Sysmon block register region.
 771 *
 772 * @return       None.
 773 *
 774 * @note         Only one of the modes can be enabled at a time.
 775 *
 776 *****************************************************************************/
 777 void XSysMonPsu_SetSequencerMode(XSysMonPsu *InstancePtr, u8 SequencerMode,
 778                 u32 SysmonBlk)
 779 {
 780         u32 RegValue;
 781         u32 EffectiveBaseAddress;
 782
 783         /* Assert the arguments. */
 784         Xil_AssertVoid(InstancePtr != NULL);
 785         Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 786         Xil_AssertVoid((SequencerMode <= XSM_SEQ_MODE_SINGCHAN) ||
 787                         (SequencerMode == XSM_SEQ_MODE_OYLMPUS));
 788         Xil_AssertVoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
 789
 790         /* Calculate the effective baseaddress based on the Sysmon instance. */
 791         EffectiveBaseAddress =
 792                         XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
 793                                         SysmonBlk);
 794
 795         /* Set the specified sequencer mode in the Configuration Register 1. */
 796         RegValue = XSysmonPsu_ReadReg(EffectiveBaseAddress +
 797                                         XSYSMONPSU_CFG_REG1_OFFSET);
 798         RegValue &= (u32)(~ XSYSMONPSU_CFG_REG1_SEQ_MDE_MASK);
 799         RegValue |= (((u32)SequencerMode  << XSYSMONPSU_CFG_REG1_SEQ_MDE_SHIFT) &
 800                                         XSYSMONPSU_CFG_REG1_SEQ_MDE_MASK);
 801         XSysmonPsu_WriteReg(EffectiveBaseAddress +
 802                                         XSYSMONPSU_CFG_REG1_OFFSET, RegValue);
 803 }
 804
 805 /****************************************************************************/
 806 /**
 807 *
 808 * This function gets the channel sequencer mode from the Configuration
 809 * Register 1.
 810 *
 811 * @param        InstancePtr is a pointer to the XSysMonPsu instance.
 812 * @param        SysmonBlk is the value that tells whether it is for PS Sysmon
 813 *       block or PL Sysmon block register region.
 814 *
 815 * @return       The channel sequencer mode :
 816 *               - XSM_SEQ_MODE_SAFE : Default safe mode
 817 *               - XSM_SEQ_MODE_ONEPASS : One pass through sequence
 818 *               - XSM_SEQ_MODE_CONTINPASS : Continuous channel sequencing
 819 *               - XSM_SEQ_MODE_SINGCHAN : Single channel/Sequencer off
 820 *               - XSM_SEQ_MODE_OLYMPUS : Olympus sampling mode
 821 *
 822 * @note         None.
 823 *
 824 *****************************************************************************/
 825 u8 XSysMonPsu_GetSequencerMode(XSysMonPsu *InstancePtr, u32 SysmonBlk)
 826 {
 827         u8 SequencerMode;
 828         u32 EffectiveBaseAddress;
 829
 830         /* Assert the arguments. */
 831         Xil_AssertNonvoid(InstancePtr != NULL);
 832         Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 833         Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
 834
 835         /* Calculate the effective baseaddress based on the Sysmon instance. */
 836         EffectiveBaseAddress =
 837                         XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
 838                                         SysmonBlk);
 839
 840         /* Read the channel sequencer mode from the Configuration Register 1. */
 841         SequencerMode =  ((u8) ((XSysmonPsu_ReadReg(EffectiveBaseAddress +
 842                         XSYSMONPSU_CFG_REG1_OFFSET) & XSYSMONPSU_CFG_REG1_SEQ_MDE_MASK) >>
 843                         XSYSMONPSU_CFG_REG1_SEQ_MDE_SHIFT));
 844
 845         return SequencerMode;
 846 }
 847
 848 /****************************************************************************/
 849 /**
 850 *
 851 * The function enables the Event mode or Continuous mode in the sequencer mode.
 852 *
 853 * @param        InstancePtr is a pointer to the XSysMonPsu instance.
 854 * @param        IsEventMode is a boolean parameter that specifies continuous
 855 *               sampling (specify FALSE) or event driven sampling mode (specify
 856 *               TRUE) for the channel.
 857 * @param        SysmonBlk is the value that tells whether it is for PS Sysmon
 858 *       block or PL Sysmon block register region.
 859 *
 860 * @return       None.
 861 *
 862 * @note         None.
 863 *
 864 *****************************************************************************/
 865 void XSysMonPsu_SetSequencerEvent(XSysMonPsu *InstancePtr, u32 IsEventMode,
 866                 u32 SysmonBlk)
 867 {
 868         u32 RegValue;
 869         u32 EffectiveBaseAddress;
 870
 871         /* Assert the arguments. */
 872         Xil_AssertVoid(InstancePtr != NULL);
 873         Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 874         Xil_AssertVoid((IsEventMode == TRUE) || (IsEventMode == FALSE));
 875         Xil_AssertVoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
 876
 877         /* Calculate the effective baseaddress based on the Sysmon instance. */
 878         EffectiveBaseAddress =
 879                         XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
 880                                         SysmonBlk);
 881
 882         /* Read the Configuration Register 0. */
 883         RegValue = XSysmonPsu_ReadReg(EffectiveBaseAddress +
 884                                         XSYSMONPSU_CFG_REG0_OFFSET);
 885
 886         /* Set the ADC mode. */
 887         if (IsEventMode == TRUE) {
 888                 RegValue |= XSYSMONPSU_CFG_REG0_EC_MASK;
 889         } else {
 890                 RegValue &= (u32)(~XSYSMONPSU_CFG_REG0_EC_MASK);
 891         }
 892
 893         XSysmonPsu_WriteReg(EffectiveBaseAddress + XSYSMONPSU_CFG_REG0_OFFSET,
 894                          RegValue);
 895 }
 896
 897 /****************************************************************************/
 898 /**
 899 *
 900 * The function returns the mode of the sequencer.
 901 *
 902 * @param        InstancePtr is a pointer to the XSysMonPsu instance.
 903 * @param        SysmonBlk is the value that tells whether it is for PS Sysmon
 904 *       block or PL Sysmon block register region.
 905 *
 906 * @return       Returns the Sequencer mode. XSYSMONPSU_EVENT_MODE for Event mode
 907 *               and XSYSMONPSU_CONTINUOUS_MODE for continuous mode.
 908 *
 909 * @note         None.
 910 *
 911 *****************************************************************************/
 912 s32 XSysMonPsu_GetSequencerEvent(XSysMonPsu *InstancePtr, u32 SysmonBlk)
 913 {
 914         s32 Mode;
 915         u32 RegValue;
 916         u32 EffectiveBaseAddress;
 917
 918         /* Assert the arguments. */
 919         Xil_AssertNonvoid(InstancePtr != NULL);
 920         Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 921         Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
 922
 923         /* Calculate the effective baseaddress based on the Sysmon instance. */
 924         EffectiveBaseAddress =
 925                         XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
 926                                         SysmonBlk);
 927
 928         /* Read the Configuration Register 0. */
 929         RegValue = XSysmonPsu_ReadReg(EffectiveBaseAddress +
 930                                         XSYSMONPSU_CFG_REG0_OFFSET);
 931
 932         RegValue &= XSYSMONPSU_CFG_REG0_EC_MASK;
 933
 934         if (RegValue == XSYSMONPSU_CFG_REG0_EC_MASK) {
 935                 Mode = XSYSMONPSU_EVENT_MODE;
 936         } else {
 937                 Mode = XSYSMONPSU_CONTINUOUS_MODE;
 938         }
 939
 940         return Mode;
 941 }
 942
 943 /****************************************************************************/
 944 /**
 945 *
 946 * The function enables the external mux and connects a channel to the mux.
 947 *
 948 * @param        InstancePtr is a pointer to the XSysMonPsu instance.
 949 * @param        Channel is the channel number used to connect to the external
 950 *               Mux. The valid channels are 0 to 5 and 16 to 31.
 951 * @param        SysmonBlk is the value that tells whether it is for PS Sysmon
 952 *       block or PL Sysmon block register region.
 953 *
 954 * @return
 955 *               - XST_SUCCESS if the given values were written successfully to
 956 *               the Configuration Register 0.
 957 *               - XST_FAILURE if the channel sequencer is enabled or the input
 958 *               parameters are not valid for the selected channel.
 959 *
 960 * @note         None.
 961 *
 962 *****************************************************************************/
 963 void XSysMonPsu_SetExtenalMux(XSysMonPsu *InstancePtr, u8 Channel, u32 SysmonBlk)
 964 {
 965         u32 RegValue;
 966         u32 EffectiveBaseAddress;
 967
 968         /* Assert the arguments. */
 969         Xil_AssertVoid(InstancePtr != NULL);
 970         Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 971         Xil_AssertVoid((Channel <= XSM_CH_VREFN) ||
 972                           ((Channel >= XSM_CH_AUX_MIN) &&
 973                           (Channel <= XSM_CH_AUX_MAX)));
 974         Xil_AssertVoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
 975
 976         /* Calculate the effective baseaddress based on the Sysmon instance. */
 977         EffectiveBaseAddress =
 978                         XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
 979                                         SysmonBlk);
 980
 981         /*
 982          * Read the Configuration Register 0 and the clear the channel selection
 983          * bits.
 984          */
 985         RegValue = XSysmonPsu_ReadReg(EffectiveBaseAddress +
 986                                         XSYSMONPSU_CFG_REG0_OFFSET);
 987         RegValue &= ~(XSYSMONPSU_CFG_REG0_MUX_CH_MASK);
 988
 989         /* Enable the External Mux and select the channel. */
 990         RegValue |= (XSYSMONPSU_CFG_REG0_XTRNL_MUX_MASK | (u32)Channel);
 991         XSysmonPsu_WriteReg(EffectiveBaseAddress + XSYSMONPSU_CFG_REG0_OFFSET,
 992                          RegValue);
 993 }
 994
 995 /****************************************************************************/
 996 /**
 997 *
 998 * The function returns the external mux channel.
 999 *
1000 * @param        InstancePtr is a pointer to the XSysMonPsu instance.
1001 * @param        SysmonBlk is the value that tells whether it is for PS Sysmon
1002 *       block or PL Sysmon block register region.
1003 *
1004 * @return       Returns the channel number used to connect to the external
1005 *               Mux. The valid channels are 0 to 6, 8 to 16, and 31 to 36..
1006 *
1007 * @note         None.
1008 *
1009 *****************************************************************************/
1010 u32 XSysMonPsu_GetExtenalMux(XSysMonPsu *InstancePtr, u32 SysmonBlk)
1011 {
1012         u32 RegValue;
1013         u32 EffectiveBaseAddress;
1014
1015         /* Assert the arguments. */
1016         Xil_AssertNonvoid(InstancePtr != NULL);
1017         Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
1018         Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
1019
1020         /* Calculate the effective baseaddress based on the Sysmon instance. */
1021         EffectiveBaseAddress =
1022                         XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
1023                                         SysmonBlk);
1024
1025         /*
1026          * Read the Configuration Register 0 and derive the channel selection
1027          * bits.
1028          */
1029         RegValue = XSysmonPsu_ReadReg(EffectiveBaseAddress +
1030                                         XSYSMONPSU_CFG_REG0_OFFSET);
1031         RegValue &= XSYSMONPSU_CFG_REG0_MUX_CH_MASK;
1032
1033         return RegValue;
1034 }
1035
1036 /****************************************************************************/
1037 /**
1038 *
1039 * The function sets the frequency of the ADCCLK by configuring the DCLK to
1040 * ADCCLK ratio in the Configuration Register #2.
1041 *
1042 * @param        InstancePtr is a pointer to the XSysMonPsu instance.
1043 * @param        Divisor is clock divisor used to derive ADCCLK from DCLK.
1044 *               Valid values of the divisor are
1045 *               PS:
1046 *                - 0 means divide by 8.
1047 *                - 1,2 means divide by 2.
1048 *                - 3 to 255 means divide by that value.
1049 *       PL:
1050 *                - 0,1,2 means divide by 2.
1051 *                - 3 to 255 means divide by that value.
1052 *               Refer to the device specification for more details.
1053 * @param        SysmonBlk is the value that tells whether it is for PS Sysmon
1054 *       block or PL Sysmon block register region.
1055 *
1056 * @return       None.
1057 *
1058 * @note         - The ADCCLK is an internal clock used by the ADC and is
1059 *               synchronized to the DCLK clock. The ADCCLK is equal to DCLK
1060 *               divided by the user selection in the Configuration Register 2.
1061 *               - There is no Assert on the minimum value of the Divisor.
1062 *
1063 *****************************************************************************/
1064 void XSysMonPsu_SetAdcClkDivisor(XSysMonPsu *InstancePtr, u8 Divisor,
1065             u32 SysmonBlk)
1066 {
1067         u32 RegValue;
1068         u32 EffectiveBaseAddress;
1069
1070         /* Assert the arguments. */
1071         Xil_AssertVoid(InstancePtr != NULL);
1072         Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
1073         Xil_AssertVoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
1074
1075         /* Calculate the effective baseaddress based on the Sysmon instance. */
1076         EffectiveBaseAddress =
1077                         XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
1078                                         SysmonBlk);
1079
1080         /*
1081          * Read the Configuration Register 2 and the clear the clock divisor
1082          * bits.
1083          */
1084         RegValue = XSysmonPsu_ReadReg(EffectiveBaseAddress +
1085                                         XSYSMONPSU_CFG_REG2_OFFSET);
1086         RegValue &= ~(XSYSMONPSU_CFG_REG2_CLK_DVDR_MASK);
1087
1088         /* Write the divisor value into the Configuration Register 2. */
1089         RegValue |= ((u32)Divisor << XSYSMONPSU_CFG_REG2_CLK_DVDR_SHIFT) &
1090                                         XSYSMONPSU_CFG_REG2_CLK_DVDR_MASK;
1091         XSysmonPsu_WriteReg(EffectiveBaseAddress + XSYSMONPSU_CFG_REG2_OFFSET,
1092                          RegValue);
1093
1094 }
1095
1096 /****************************************************************************/
1097 /**
1098 *
1099 * The function gets the ADCCLK divisor from the Configuration Register 2.
1100 *
1101 * @param        InstancePtr is a pointer to the XSysMon instance.
1102 * @param        SysmonBlk is the value that tells whether it is for PS Sysmon
1103 *       block or PL Sysmon block register region.
1104 *
1105 * @return       The divisor read from the Configuration Register 2.
1106 *
1107 * @note         The ADCCLK is an internal clock used by the ADC and is
1108 *               synchronized to the DCLK clock. The ADCCLK is equal to DCLK
1109 *               divided by the user selection in the Configuration Register 2.
1110 *
1111 *****************************************************************************/
1112 u8 XSysMonPsu_GetAdcClkDivisor(XSysMonPsu *InstancePtr, u32 SysmonBlk)
1113 {
1114         u16 Divisor;
1115         u32 EffectiveBaseAddress;
1116
1117         /* Assert the arguments. */
1118         Xil_AssertNonvoid(InstancePtr != NULL);
1119         Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
1120         Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
1121
1122         /* Calculate the effective baseaddress based on the Sysmon instance. */
1123         EffectiveBaseAddress =
1124                         XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
1125                                         SysmonBlk);
1126
1127         /* Read the divisor value from the Configuration Register 2. */
1128         Divisor = (u16) XSysmonPsu_ReadReg(EffectiveBaseAddress +
1129                                                         XSYSMONPSU_CFG_REG2_OFFSET);
1130
1131         return (u8) (Divisor >> XSYSMONPSU_CFG_REG2_CLK_DVDR_SHIFT);
1132 }
1133
1134 /****************************************************************************/
1135 /**
1136 *
1137 * This function enables the specified channels in the ADC Channel Selection
1138 * Sequencer Registers. The sequencer must be in the Safe Mode before writing
1139 * to these registers.
1140 *
1141 * @param        InstancePtr is a pointer to the XSysMonPsu instance.
1142 * @param        ChEnableMask is the bit mask of all the channels to be enabled.
1143 *               Use XSYSMONPSU_SEQ_CH* defined in xsysmon_hw.h to specify the Channel
1144 *               numbers. Bit masks of 1 will be enabled and bit mask of 0 will
1145 *               be disabled.
1146 *               The ChEnableMask is a 32 bit mask that is written to the two
1147 *               16 bit ADC Channel Selection Sequencer Registers.
1148 * @param        SysmonBlk is the value that tells whether it is for PS Sysmon
1149 *       block or PL Sysmon block register region.
1150 *
1151 * @return
1152 *               - XST_SUCCESS if the given values were written successfully to
1153 *               the ADC Channel Selection Sequencer Registers.
1154 *               - XST_FAILURE if the channel sequencer is enabled.
1155 *
1156 * @note         None.
1157 *
1158 *****************************************************************************/
1159 s32 XSysMonPsu_SetSeqChEnables(XSysMonPsu *InstancePtr, u32 ChEnableMask,
1160                 u32 SysmonBlk)
1161 {
1162         s32 Status;
1163         u32 EffectiveBaseAddress;
1164
1165         /* Assert the arguments. */
1166         Xil_AssertNonvoid(InstancePtr != NULL);
1167         Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
1168         Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
1169
1170         /*
1171          * The sequencer must be in the Default Safe Mode before writing
1172          * to these registers. Return XST_FAILURE if the channel sequencer
1173          * is enabled.
1174          */
1175         if ((XSysMonPsu_GetSequencerMode(InstancePtr,SysmonBlk) != XSM_SEQ_MODE_SAFE)) {
1176                 Status = (s32)XST_FAILURE;
1177                 goto End;
1178         }
1179
1180         /* Calculate the effective baseaddress based on the Sysmon instance. */
1181         EffectiveBaseAddress =
1182                         XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
1183                                         SysmonBlk);
1184
1185         /*
1186          * Enable the specified channels in the ADC Channel Selection Sequencer
1187          * Registers.
1188          */
1189         XSysmonPsu_WriteReg(EffectiveBaseAddress + XSYSMONPSU_SEQ_CH0_OFFSET,
1190                          (ChEnableMask & XSYSMONPSU_SEQ_CH0_VALID_MASK));
1191
1192         XSysmonPsu_WriteReg(EffectiveBaseAddress + XSYSMONPSU_SEQ_CH1_OFFSET,
1193                          (ChEnableMask >> XSM_SEQ_CH_SHIFT) &
1194                          XSYSMONPSU_SEQ_CH1_VALID_MASK);
1195
1196         Status = (s32)XST_SUCCESS;
1197
1198 End:
1199         return Status;
1200 }
1201
1202 /****************************************************************************/
1203 /**
1204 *
1205 * This function gets the channel enable bits status from the ADC Channel
1206 * Selection Sequencer Registers.
1207 *
1208 * @param        InstancePtr is a pointer to the XSysMonPsu instance.
1209 * @param        SysmonBlk is the value that tells whether it is for PS Sysmon
1210 *       block or PL Sysmon block register region.
1211 *
1212 * @return       Gets the channel enable bits. Use XSYSMONPSU_SEQ_CH* defined in
1213 *               xsysmonpsu_hw.h to interpret the Channel numbers. Bit masks of 1
1214 *               are the channels that are enabled and bit mask of 0 are
1215 *               the channels that are disabled.
1216 *
1217 * @return       None.
1218 *
1219 * @note         None.
1220 *
1221 *****************************************************************************/
1222 u32 XSysMonPsu_GetSeqChEnables(XSysMonPsu *InstancePtr, u32 SysmonBlk)
1223 {
1224         u32 RegVal;
1225         u32 EffectiveBaseAddress;
1226
1227         /* Assert the arguments. */
1228         Xil_AssertNonvoid(InstancePtr != NULL);
1229         Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
1230         Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
1231
1232         /* Calculate the effective baseaddress based on the Sysmon instance. */
1233         EffectiveBaseAddress =
1234                         XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
1235                                         SysmonBlk);
1236
1237         /*
1238          * Read the channel enable bits for all the channels from the ADC
1239          * Channel Selection Register.
1240          */
1241         RegVal = XSysmonPsu_ReadReg(EffectiveBaseAddress +
1242                         XSYSMONPSU_SEQ_CH0_OFFSET) & XSYSMONPSU_SEQ_CH0_VALID_MASK;
1243         RegVal |= (XSysmonPsu_ReadReg(EffectiveBaseAddress +
1244                         XSYSMONPSU_SEQ_CH1_OFFSET) & XSYSMONPSU_SEQ_CH1_VALID_MASK) <<
1245                                         XSM_SEQ_CH_SHIFT;
1246
1247         return RegVal;
1248 }
1249
1250 /****************************************************************************/
1251 /**
1252 *
1253 * This function enables the averaging for the specified channels in the ADC
1254 * Channel Averaging Enable Sequencer Registers. The sequencer must be in
1255 * the Safe Mode before writing to these registers.
1256 *
1257 * @param        InstancePtr is a pointer to the XSysMonPsu instance.
1258 * @param        AvgEnableChMask is the bit mask of all the channels for which
1259 *               averaging is to be enabled. Use XSYSMONPSU_SEQ_AVERAGE* defined in
1260 *               xsysmonpsu_hw.h to specify the Channel numbers. Averaging will be
1261 *               enabled for bit masks of 1 and disabled for bit mask of 0.
1262 *               The AvgEnableChMask is a 32 bit mask that is written to the
1263 *               two 16 bit ADC Channel Averaging Enable Sequencer Registers.
1264 * @param        SysmonBlk is the value that tells whether it is for PS Sysmon
1265 *       block or PL Sysmon block register region.
1266 *
1267 * @return
1268 *               - XST_SUCCESS if the given values were written successfully to
1269 *               the ADC Channel Averaging Enables Sequencer Registers.
1270 *               - XST_FAILURE if the channel sequencer is enabled.
1271 *
1272 * @note         None.
1273 *
1274 *****************************************************************************/
1275 s32 XSysMonPsu_SetSeqAvgEnables(XSysMonPsu *InstancePtr, u32 AvgEnableChMask,
1276                 u32 SysmonBlk)
1277 {
1278         s32 Status;
1279         u32 EffectiveBaseAddress;
1280
1281         /* Assert the arguments. */
1282         Xil_AssertNonvoid(InstancePtr != NULL);
1283         Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
1284         Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
1285
1286         /* Calculate the effective baseaddress based on the Sysmon instance. */
1287         EffectiveBaseAddress =
1288                         XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
1289                                         SysmonBlk);
1290
1291         /*
1292          * The sequencer must be disabled for writing any of these registers.
1293          * Return XST_FAILURE if the channel sequencer is enabled.
1294          */
1295         if ((XSysMonPsu_GetSequencerMode(InstancePtr,SysmonBlk)
1296                                              != XSM_SEQ_MODE_SAFE)) {
1297                 Status = (s32)XST_FAILURE;
1298                 goto End;
1299         }
1300
1301         /*
1302          * Enable/disable the averaging for the specified channels in the
1303          * ADC Channel Averaging Enables Sequencer Registers.
1304          */
1305         XSysmonPsu_WriteReg(EffectiveBaseAddress +
1306                         XSYSMONPSU_SEQ_AVERAGE0_OFFSET,
1307                         (AvgEnableChMask & XSYSMONPSU_SEQ_AVERAGE0_MASK));
1308
1309         XSysmonPsu_WriteReg(EffectiveBaseAddress +
1310                         XSYSMONPSU_SEQ_AVERAGE1_OFFSET,
1311                          (AvgEnableChMask >> XSM_SEQ_CH_SHIFT) &
1312                          XSYSMONPSU_SEQ_AVERAGE1_MASK);
1313
1314         Status = (s32)XST_SUCCESS;
1315 End:
1316         return Status;
1317 }
1318
1319 /****************************************************************************/
1320 /**
1321 *
1322 * This function returns the channels for which the averaging has been enabled
1323 * in the ADC Channel Averaging Enables Sequencer Registers.
1324 *
1325 * @param        InstancePtr is a pointer to the XSysMonPsu instance.
1326 * @param        SysmonBlk is the value that tells whether it is for PS Sysmon
1327 *       block or PL Sysmon block register region.
1328 *
1329 * @returns      The status of averaging (enabled/disabled) for all the channels.
1330 *               Use XSYSMONPSU_SEQ_AVERAGE* defined in xsysmonpsu_hw.h to interpret the
1331 *               Channel numbers. Bit masks of 1 are the channels for which
1332 *               averaging is enabled and bit mask of 0 are the channels for
1333 *               averaging is disabled.
1334 *
1335 * @note         None.
1336 *
1337 *****************************************************************************/
1338 u32 XSysMonPsu_GetSeqAvgEnables(XSysMonPsu *InstancePtr, u32 SysmonBlk)
1339 {
1340         u32 RegVal;
1341         u32 EffectiveBaseAddress;
1342
1343         /* Assert the arguments. */
1344         Xil_AssertNonvoid(InstancePtr != NULL);
1345         Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
1346         Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
1347
1348         /* Calculate the effective baseaddress based on the Sysmon instance. */
1349         EffectiveBaseAddress =
1350                         XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
1351                                         SysmonBlk);
1352
1353         /*
1354          * Read the averaging enable status for all the channels from the
1355          * ADC Channel Averaging Enables Sequencer Registers.
1356          */
1357         RegVal = XSysmonPsu_ReadReg(EffectiveBaseAddress +
1358                         XSYSMONPSU_SEQ_AVERAGE0_OFFSET) & XSYSMONPSU_SEQ_AVERAGE0_MASK;
1359         RegVal |= (XSysmonPsu_ReadReg(EffectiveBaseAddress +
1360                         XSYSMONPSU_SEQ_AVERAGE1_OFFSET) & XSYSMONPSU_SEQ_AVERAGE1_MASK) <<
1361                         XSM_SEQ_CH_SHIFT;
1362
1363         return RegVal;
1364 }
1365
1366 /****************************************************************************/
1367 /**
1368 *
1369 * This function sets the Analog input mode for the specified channels in the
1370 * ADC Channel Analog-Input Mode Sequencer Registers. The sequencer must be in
1371 * the Safe Mode before writing to these registers.
1372 *
1373 * @param        InstancePtr is a pointer to the XSysMonPsu instance.
1374 * @param        InputModeChMask is the bit mask of all the channels for which
1375 *               the input mode is differential mode. Use XSYSMONPSU_SEQ_INPUT_MDE*
1376 *               defined in xsysmonpsu_hw.h to specify the channel numbers. Differential
1377 *               or  Bipolar input mode will be set for bit masks of 1 and unipolar input
1378 *               mode for bit masks of 0.
1379 *               The InputModeChMask is a 32 bit mask that is written to the two
1380 *               16 bit ADC Channel Analog-Input Mode Sequencer Registers.
1381 * @param        SysmonBlk is the value that tells whether it is for PS Sysmon
1382 *       block or PL Sysmon block register region.
1383 *
1384 * @return
1385 *               - XST_SUCCESS if the given values were written successfully to
1386 *               the ADC Channel Analog-Input Mode Sequencer Registers.
1387 *               - XST_FAILURE if the channel sequencer is enabled.
1388 *
1389 * @note         None.
1390 *
1391 *****************************************************************************/
1392 s32 XSysMonPsu_SetSeqInputMode(XSysMonPsu *InstancePtr, u32 InputModeChMask,
1393                 u32 SysmonBlk)
1394 {
1395         s32 Status;
1396         u32 EffectiveBaseAddress;
1397
1398         /* Assert the arguments. */
1399         Xil_AssertNonvoid(InstancePtr != NULL);
1400         Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
1401         Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
1402
1403         /*
1404          * The sequencer must be in the Safe Mode before writing to
1405          * these registers. Return XST_FAILURE if the channel sequencer
1406          * is enabled.
1407          */
1408         if ((XSysMonPsu_GetSequencerMode(InstancePtr,SysmonBlk)
1409                                               != XSM_SEQ_MODE_SAFE)) {
1410                 Status = (s32)XST_FAILURE;
1411                 goto End;
1412         }
1413
1414         /* Calculate the effective baseaddress based on the Sysmon instance. */
1415         EffectiveBaseAddress =
1416                         XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
1417                                         SysmonBlk);
1418
1419         /*
1420          * Set the input mode for the specified channels in the ADC Channel
1421          * Analog-Input Mode Sequencer Registers.
1422          */
1423         XSysmonPsu_WriteReg(EffectiveBaseAddress +
1424                         XSYSMONPSU_SEQ_INPUT_MDE0_OFFSET,
1425                          (InputModeChMask & XSYSMONPSU_SEQ_INPUT_MDE0_MASK));
1426
1427         XSysmonPsu_WriteReg(EffectiveBaseAddress +
1428                         XSYSMONPSU_SEQ_INPUT_MDE1_OFFSET,
1429                          (InputModeChMask >> XSM_SEQ_CH_SHIFT) &
1430                          XSYSMONPSU_SEQ_INPUT_MDE1_MASK);
1431
1432         Status = (s32)XST_SUCCESS;
1433
1434 End:
1435         return Status;
1436 }
1437
1438 /****************************************************************************/
1439 /**
1440 *
1441 * This function gets the Analog input mode for all the channels from
1442 * the ADC Channel Analog-Input Mode Sequencer Registers.
1443 *
1444 * @param        InstancePtr is a pointer to the XSysMonPsu instance.
1445 * @param        SysmonBlk is the value that tells whether it is for PS Sysmon
1446 *       block or PL Sysmon block register region.
1447 *
1448 * @returns      The input mode for all the channels.
1449 *               Use XSYSMONPSU_SEQ_INPUT_MDE* defined in xsysmonpsu_hw.h to interpret the
1450 *               Channel numbers. Bit masks of 1 are the channels for which
1451 *               input mode is differential/Bipolar and bit mask of 0 are the channels
1452 *               for which input mode is unipolar.
1453 *
1454 * @note         None.
1455 *
1456 *****************************************************************************/
1457 u32 XSysMonPsu_GetSeqInputMode(XSysMonPsu *InstancePtr, u32 SysmonBlk)
1458 {
1459         u32 InputMode;
1460         u32 EffectiveBaseAddress;
1461
1462         /* Assert the arguments. */
1463         Xil_AssertNonvoid(InstancePtr != NULL);
1464         Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
1465         Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
1466
1467         /* Calculate the effective baseaddress based on the Sysmon instance. */
1468         EffectiveBaseAddress =
1469                         XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
1470                                         SysmonBlk);
1471
1472         /*
1473          *  Get the input mode for all the channels from the ADC Channel
1474          * Analog-Input Mode Sequencer Registers.
1475          */
1476         InputMode = XSysmonPsu_ReadReg(EffectiveBaseAddress +
1477                         XSYSMONPSU_SEQ_INPUT_MDE0_OFFSET) & XSYSMONPSU_SEQ_INPUT_MDE0_MASK;
1478         InputMode |= (XSysmonPsu_ReadReg(EffectiveBaseAddress +
1479                         XSYSMONPSU_SEQ_INPUT_MDE1_OFFSET) & XSYSMONPSU_SEQ_INPUT_MDE1_MASK) <<
1480                                 XSM_SEQ_CH_SHIFT;
1481
1482         return InputMode;
1483 }
1484
1485 /****************************************************************************/
1486 /**
1487 *
1488 * This function sets the number of Acquisition cycles in the ADC Channel
1489 * Acquisition Time Sequencer Registers. The sequencer must be in the Safe Mode
1490 * before writing to these registers.
1491 *
1492 * @param        InstancePtr is a pointer to the XSysMonPsu instance.
1493 * @param        AcqCyclesChMask is the bit mask of all the channels for which
1494 *               the number of acquisition cycles is to be extended.
1495 *               Use XSYSMONPSU_SEQ_ACQ* defined in xsysmonpsu_hw.h to specify the Channel
1496 *               numbers. Acquisition cycles will be extended to 10 ADCCLK cycles
1497 *               for bit masks of 1 and will be the default 4 ADCCLK cycles for
1498 *               bit masks of 0.
1499 *               The AcqCyclesChMask is a 32 bit mask that is written to the two
1500 *               16 bit ADC Channel Acquisition Time Sequencer Registers.
1501 * @param        SysmonBlk is the value that tells whether it is for PS Sysmon
1502 *       block or PL Sysmon block register region.
1503 *
1504 * @return
1505 *               - XST_SUCCESS if the given values were written successfully to
1506 *               the Channel Sequencer Registers.
1507 *               - XST_FAILURE if the channel sequencer is enabled.
1508 *
1509 * @note         None.
1510 *
1511 *****************************************************************************/
1512 s32 XSysMonPsu_SetSeqAcqTime(XSysMonPsu *InstancePtr, u32 AcqCyclesChMask,
1513                 u32 SysmonBlk)
1514 {
1515         s32 Status;
1516         u32 EffectiveBaseAddress;
1517
1518         /* Assert the arguments. */
1519         Xil_AssertNonvoid(InstancePtr != NULL);
1520         Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
1521         Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
1522
1523         /*
1524          * The sequencer must be in the Safe Mode before writing
1525          * to these registers. Return XST_FAILURE if the channel
1526          * sequencer is enabled.
1527          */
1528         if ((XSysMonPsu_GetSequencerMode(InstancePtr,SysmonBlk)
1529                                              != XSM_SEQ_MODE_SAFE)) {
1530                 Status = (s32)XST_FAILURE;
1531                 goto End;
1532         }
1533
1534         /* Calculate the effective baseaddress based on the Sysmon instance. */
1535         EffectiveBaseAddress =
1536                         XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
1537                                         SysmonBlk);
1538
1539         /*
1540          * Set the Acquisition time for the specified channels in the
1541          * ADC Channel Acquisition Time Sequencer Registers.
1542          */
1543         XSysmonPsu_WriteReg(EffectiveBaseAddress + XSYSMONPSU_SEQ_ACQ0_OFFSET,
1544                          (AcqCyclesChMask & XSYSMONPSU_SEQ_ACQ0_MASK));
1545
1546         XSysmonPsu_WriteReg(EffectiveBaseAddress + XSYSMONPSU_SEQ_ACQ1_OFFSET,
1547                          (AcqCyclesChMask >> XSM_SEQ_CH_SHIFT) & XSYSMONPSU_SEQ_ACQ1_MASK);
1548
1549         Status = (s32)XST_SUCCESS;
1550
1551 End:
1552         return Status;
1553 }
1554
1555 /****************************************************************************/
1556 /**
1557 *
1558 * This function gets the status of acquisition time from the ADC Channel Acquisition
1559 * Time Sequencer Registers.
1560 *
1561 * @param        InstancePtr is a pointer to the XSysMonPsu instance.
1562 * @param        SysmonBlk is the value that tells whether it is for PS Sysmon
1563 *       block or PL Sysmon block register region.
1564 *
1565 * @returns      The acquisition time for all the channels.
1566 *               Use XSYSMONPSU_SEQ_ACQ* defined in xsysmonpsu_hw.h to interpret the
1567 *               Channel numbers. Bit masks of 1 are the channels for which
1568 *               acquisition cycles are extended and bit mask of 0 are the
1569 *               channels for which acquisition cycles are not extended.
1570 *
1571 * @note         None.
1572 *
1573 *****************************************************************************/
1574 u32 XSysMonPsu_GetSeqAcqTime(XSysMonPsu *InstancePtr, u32 SysmonBlk)
1575 {
1576         u32 RegValAcq;
1577         u32 EffectiveBaseAddress;
1578
1579         /* Assert the arguments. */
1580         Xil_AssertNonvoid(InstancePtr != NULL);
1581         Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
1582         Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
1583
1584         /* Calculate the effective baseaddress based on the Sysmon instance. */
1585         EffectiveBaseAddress =
1586                         XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
1587                                         SysmonBlk);
1588
1589         /*
1590          * Get the Acquisition cycles for the specified channels from the ADC
1591          * Channel Acquisition Time Sequencer Registers.
1592          */
1593         RegValAcq = XSysmonPsu_ReadReg(EffectiveBaseAddress +
1594                                         XSYSMONPSU_SEQ_ACQ0_OFFSET) & XSYSMONPSU_SEQ_ACQ0_MASK;
1595         RegValAcq |= (XSysmonPsu_ReadReg(EffectiveBaseAddress +
1596                                         XSYSMONPSU_SEQ_ACQ1_OFFSET) & XSYSMONPSU_SEQ_ACQ1_MASK) <<
1597                                         XSM_SEQ_CH_SHIFT;
1598
1599         return RegValAcq;
1600 }
1601
1602 /****************************************************************************/
1603 /**
1604 *
1605 * This functions sets the contents of the given Alarm Threshold Register.
1606 *
1607 * @param        InstancePtr is a pointer to the XSysMonPsu instance.
1608 * @param        AlarmThrReg is the index of an Alarm Threshold Register to
1609 *               be set. Use XSM_ATR_* constants defined in xsysmonpsu.h to
1610 *               specify the index.
1611 * @param        Value is the 16-bit threshold value to write into the register.
1612 * @param        SysmonBlk is the value that tells whether it is for PS Sysmon
1613 *       block or PL Sysmon block register region.
1614 *
1615 * @return       None.
1616 *
1617 * @note         None.
1618 *
1619 *****************************************************************************/
1620 void XSysMonPsu_SetAlarmThreshold(XSysMonPsu *InstancePtr, u8 AlarmThrReg,
1621                 u16 Value, u32 SysmonBlk)
1622 {
1623         u32 EffectiveBaseAddress;
1624
1625         /* Assert the arguments. */
1626         Xil_AssertVoid(InstancePtr != NULL);
1627         Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
1628         Xil_AssertVoid((AlarmThrReg <= XSM_ATR_TEMP_RMTE_UPPER) ||
1629                         ((AlarmThrReg >= XSM_ATR_SUP7_LOWER) &&
1630                         (AlarmThrReg <= XSM_ATR_TEMP_RMTE_LOWER)));
1631         Xil_AssertVoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
1632
1633         /* Calculate the effective baseaddress based on the Sysmon instance. */
1634         EffectiveBaseAddress =
1635                         XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
1636                                         SysmonBlk);
1637
1638         /* Write the value into the specified Alarm Threshold Register. */
1639         XSysmonPsu_WriteReg(EffectiveBaseAddress + XSYSMONPSU_ALRM_TEMP_UPR_OFFSET +
1640                         ((u32)AlarmThrReg << 2U), Value);
1641 }
1642
1643 /****************************************************************************/
1644 /**
1645 *
1646 * This function returns the contents of the specified Alarm Threshold Register.
1647 *
1648 * @param        InstancePtr is a pointer to the XSysMonPsu instance.
1649 * @param        AlarmThrReg is the index of an Alarm Threshold Register
1650 *               to be read. Use XSM_ATR_* constants defined in xsysmonpsu.h
1651 *               to specify the index.
1652 * @param        SysmonBlk is the value that tells whether it is for PS Sysmon
1653 *       block or PL Sysmon block register region.
1654 *
1655 * @return       A 16-bit value representing the contents of the selected Alarm
1656 *               Threshold Register.
1657 *
1658 * @note         None.
1659 *
1660 *****************************************************************************/
1661 u16 XSysMonPsu_GetAlarmThreshold(XSysMonPsu *InstancePtr, u8 AlarmThrReg,
1662                 u32 SysmonBlk)
1663 {
1664         u16 AlarmThreshold;
1665         u32 EffectiveBaseAddress;
1666
1667         /* Assert the arguments. */
1668         Xil_AssertNonvoid(InstancePtr != NULL);
1669         Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
1670         Xil_AssertNonvoid((AlarmThrReg <= XSM_ATR_TEMP_RMTE_UPPER) ||
1671                         ((AlarmThrReg >= XSM_ATR_SUP7_LOWER) &&
1672                         (AlarmThrReg <= XSM_ATR_TEMP_RMTE_LOWER)));
1673         Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
1674
1675         /* Calculate the effective baseaddress based on the Sysmon instance. */
1676         EffectiveBaseAddress =
1677                         XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
1678                                         SysmonBlk);
1679
1680         /*
1681          * Read the specified Alarm Threshold Register and return
1682          * the value.
1683          */
1684         AlarmThreshold = (u16) XSysmonPsu_ReadReg(EffectiveBaseAddress +
1685                         XSYSMONPSU_ALRM_TEMP_UPR_OFFSET + ((u32)AlarmThrReg << 2));
1686
1687         return AlarmThreshold;
1688 }
1689
1690 /****************************************************************************/
1691 /**
1692 *
1693 * This function sets the conversion to be automatic for PS SysMon.
1694 *
1695 * @param        InstancePtr is a pointer to the XSysMonPsu instance.
1696 *
1697 * @return       None
1698 *
1699 * @note         In the auto-trigger mode, sample rate is of 1 Million samples.
1700 *
1701 *****************************************************************************/
1702 void XSysMonPsu_SetPSAutoConversion(XSysMonPsu *InstancePtr)
1703 {
1704         u32 PSSysMonStatusReg;
1705
1706         /* Assert the arguments. */
1707         Xil_AssertVoid(InstancePtr != NULL);
1708         Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
1709
1710         /* Set the automatic conversion triggering in PS control register. */
1711         PSSysMonStatusReg = XSysmonPsu_ReadReg(InstancePtr->Config.BaseAddress +
1712                         XSYSMONPSU_PS_SYSMON_CSTS_OFFSET);
1713         PSSysMonStatusReg |= XSYSMONPSU_PS_SYSMON_CSTS_AUTO_CONVST_MASK;
1714         XSysmonPsu_WriteReg(InstancePtr->Config.BaseAddress +
1715                         XSYSMONPSU_PS_SYSMON_CSTS_OFFSET, PSSysMonStatusReg);
1716 }
1717
1718 /****************************************************************************/
1719 /**
1720 *
1721 * This function gets the AMS monitor status.
1722 *
1723 * @param        InstancePtr is a pointer to the XSysMonPsu instance.
1724 *
1725 * @return       Returns the monitor status. See XSYSMONPSU_MON_STS_*_MASK
1726 *               definations present in xsysmonpsu_hw.h for knowing the status.
1727 *
1728 * @note         None
1729 * .
1730 *****************************************************************************/
1731 u32 XSysMonPsu_GetMonitorStatus(XSysMonPsu *InstancePtr)
1732 {
1733         u32 AMSMonStatusReg;
1734
1735         /* Assert the arguments. */
1736         Xil_AssertNonvoid(InstancePtr != NULL);
1737         Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
1738
1739         /*
1740          * Read the AMS monitor status. This gives tells about JTAG Locked / ADC
1741          * busy / ADC Current Channel number and its ADC output.
1742          */
1743         AMSMonStatusReg = XSysmonPsu_ReadReg(InstancePtr->Config.BaseAddress +
1744                         XSYSMONPSU_MON_STS_OFFSET);
1745
1746         return AMSMonStatusReg;
1747 }
1748
1749 /** @} */