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41 /*****************************************************************************/
44 * @file xiicps_selftest.c
46 * This component contains the implementation of selftest functions for the
47 * XIicPs driver component.
50 * MODIFICATION HISTORY:
52 * Ver Who Date Changes
53 * ----- ------ -------- ---------------------------------------------
54 * 1.00a drg/jz 01/30/10 First release
55 * 1.00a sdm 09/22/11 Removed unused code
58 ******************************************************************************/
60 /***************************** Include Files *********************************/
64 /************************** Constant Definitions *****************************/
66 #define REG_TEST_VALUE 0x00000005
68 /**************************** Type Definitions *******************************/
71 /***************** Macros (Inline Functions) Definitions *********************/
74 /************************** Function Prototypes ******************************/
77 /************************** Variable Definitions *****************************/
80 /*****************************************************************************/
83 * Runs a self-test on the driver/device. The self-test is destructive in that
84 * a reset of the device is performed in order to check the reset values of
85 * the registers and to get the device into a known state.
87 * Upon successful return from the self-test, the device is reset.
89 * @param InstancePtr is a pointer to the XIicPs instance.
92 * - XST_SUCCESS if successful.
93 * - XST_REGISTER_ERROR indicates a register did not read or write
98 ******************************************************************************/
99 int XIicPs_SelfTest(XIicPs *InstancePtr)
102 Xil_AssertNonvoid(InstancePtr != NULL);
103 Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
106 * All the IIC registers should be in their default state right now.
108 if ((XIICPS_CR_RESET_VALUE !=
109 XIicPs_ReadReg(InstancePtr->Config.BaseAddress,
110 XIICPS_CR_OFFSET)) ||
111 (XIICPS_TO_RESET_VALUE !=
112 XIicPs_ReadReg(InstancePtr->Config.BaseAddress,
113 XIICPS_TIME_OUT_OFFSET)) ||
114 (XIICPS_IXR_ALL_INTR_MASK !=
115 XIicPs_ReadReg(InstancePtr->Config.BaseAddress,
116 XIICPS_IMR_OFFSET))) {
120 XIicPs_Reset(InstancePtr);
123 * Write, Read then write a register
125 XIicPs_WriteReg(InstancePtr->Config.BaseAddress,
126 XIICPS_SLV_PAUSE_OFFSET, REG_TEST_VALUE);
128 if (REG_TEST_VALUE != XIicPs_ReadReg(InstancePtr->Config.BaseAddress,
129 XIICPS_SLV_PAUSE_OFFSET)) {
133 XIicPs_WriteReg(InstancePtr->Config.BaseAddress,
134 XIICPS_SLV_PAUSE_OFFSET, 0);
136 XIicPs_Reset(InstancePtr);