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   1 /******************************************************************************
   2 *
   3 * Copyright (C) 2015 Xilinx, Inc.  All rights reserved.
   4 *
   5 * Permission is hereby granted, free of charge, to any person obtaining a copy
   6 * of this software and associated documentation files (the "Software"), to deal
   7 * in the Software without restriction, including without limitation the rights
   8 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
   9 * copies of the Software, and to permit persons to whom the Software is
  10 * furnished to do so, subject to the following conditions:
  11 *
  12 * The above copyright notice and this permission notice shall be included in
  13 * all copies or substantial portions of the Software.
  14 *
  15 * Use of the Software is limited solely to applications:
  16 * (a) running on a Xilinx device, or
  17 * (b) that interact with a Xilinx device through a bus or interconnect.
  18 *
  19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  22 * XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  23 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
  24 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  25 * SOFTWARE.
  26 *
  27 * Except as contained in this notice, the name of the Xilinx shall not be used
  28 * in advertising or otherwise to promote the sale, use or other dealings in
  29 * this Software without prior written authorization from Xilinx.
  30 *
  31 ******************************************************************************/
  32 /****************************************************************************/
  33 /**
  34 *
  35 * @file xusbpsu.h
  36 *
  37 * <pre>
  38 *
  39 * MODIFICATION HISTORY:
  40 *
  41 * Ver   Who    Date     Changes
  42 * ----- -----  -------- -----------------------------------------------------
  43 * 1.00a bss    01/22/15 First release
  44 * 1.00a bss    03/18/15 Added support for Non-control endpoints
  45 *                                               Added mass storage example
  46 *
  47 * </pre>
  48 *
  49 *****************************************************************************/
  50 #ifndef XUSBPSU_H  /* Prevent circular inclusions */
  51 #define XUSBPSU_H  /* by using protection macros  */
  52
  53 #ifdef __cplusplus
  54 extern "C" {
  55 #endif
  56
  57 /***************************** Include Files ********************************/
  58 #include "xparameters.h"
  59 #include "xil_types.h"
  60 #include "xil_assert.h"
  61 #include "xstatus.h"
  62 #include "xusbpsu_hw.h"
  63
  64 /************************** Constant Definitions ****************************/
  65
  66 #define ALIGNMENT_CACHELINE             __attribute__ ((aligned(64)))
  67
  68 #define XUSBPSU_PHY_TIMEOUT             5000 /* in micro seconds */
  69
  70 #define XUSBPSU_EP_DIR_IN                               1
  71 #define XUSBPSU_EP_DIR_OUT                              0
  72
  73 #define USB_ENDPOINT_NUMBER_MASK        0x0f    /* in bEndpointAddress */
  74 #define USB_ENDPOINT_DIR_MASK           0x80
  75
  76 #define USB_ENDPOINT_XFERTYPE_MASK      0x03    /* in bmAttributes */
  77 #define USB_ENDPOINT_XFER_CONTROL       0
  78 #define USB_ENDPOINT_XFER_ISOC          1
  79 #define USB_ENDPOINT_XFER_BULK          2
  80 #define USB_ENDPOINT_XFER_INT           3
  81 #define USB_ENDPOINT_MAX_ADJUSTABLE     0x80
  82
  83 #define TEST_J                                                  1
  84 #define TEST_K                                                  2
  85 #define TEST_SE0_NAK                                    3
  86 #define TEST_PACKET                                             4
  87 #define TEST_FORCE_ENABLE                               5
  88
  89 #define XUSBPSU_NUM_TRBS                                8
  90
  91 #define XUSBPSU_EVENT_PENDING                   (1 << 0)
  92
  93 #define XUSBPSU_EP_ENABLED                              (1 << 0)
  94 #define XUSBPSU_EP_STALL                                (1 << 1)
  95 #define XUSBPSU_EP_WEDGE                                (1 << 2)
  96 #define XUSBPSU_EP_BUSY                                 (1 << 4)
  97 #define XUSBPSU_EP_PENDING_REQUEST              (1 << 5)
  98 #define XUSBPSU_EP_MISSED_ISOC                  (1 << 6)
  99
 100 #define XUSBPSU_GHWPARAMS0                              0
 101 #define XUSBPSU_GHWPARAMS1                              1
 102 #define XUSBPSU_GHWPARAMS2                              2
 103 #define XUSBPSU_GHWPARAMS3                              3
 104 #define XUSBPSU_GHWPARAMS4                              4
 105 #define XUSBPSU_GHWPARAMS5                              5
 106 #define XUSBPSU_GHWPARAMS6                              6
 107 #define XUSBPSU_GHWPARAMS7                              7
 108
 109 /* HWPARAMS0 */
 110 #define XUSBPSU_MODE(n)                                 ((n) & 0x7)
 111 #define XUSBPSU_MDWIDTH(n)                              (((n) & 0xff00) >> 8)
 112
 113 /* HWPARAMS1 */
 114 #define XUSBPSU_NUM_INT(n)                              (((n) & (0x3f << 15)) >> 15)
 115
 116 /* HWPARAMS3 */
 117 #define XUSBPSU_NUM_IN_EPS_MASK                 (0x1f << 18)
 118 #define XUSBPSU_NUM_EPS_MASK                    (0x3f << 12)
 119 #define XUSBPSU_NUM_EPS(p)                              (((p) &         \
 120                                                                                 (XUSBPSU_NUM_EPS_MASK)) >> 12)
 121 #define XUSBPSU_NUM_IN_EPS(p)                   (((p) &         \
 122                                                                                 (XUSBPSU_NUM_IN_EPS_MASK)) >> 18)
 123
 124 /* HWPARAMS7 */
 125 #define XUSBPSU_RAM1_DEPTH(n)                   ((n) & 0xffff)
 126
 127 #define XUSBPSU_DEPEVT_XFERCOMPLETE             0x01
 128 #define XUSBPSU_DEPEVT_XFERINPROGRESS   0x02
 129 #define XUSBPSU_DEPEVT_XFERNOTREADY             0x03
 130 #define XUSBPSU_DEPEVT_STREAMEVT                0x06
 131 #define XUSBPSU_DEPEVT_EPCMDCMPLT               0x07
 132
 133 /* Within XferNotReady */
 134 #define DEPEVT_STATUS_TRANSFER_ACTIVE   (1 << 3)
 135
 136 /* Within XferComplete */
 137 #define DEPEVT_STATUS_BUSERR                    (1 << 0)
 138 #define DEPEVT_STATUS_SHORT                             (1 << 1)
 139 #define DEPEVT_STATUS_IOC                               (1 << 2)
 140 #define DEPEVT_STATUS_LST                               (1 << 3)
 141
 142 /* Stream event only */
 143 #define DEPEVT_STREAMEVT_FOUND                  1
 144 #define DEPEVT_STREAMEVT_NOTFOUND               2
 145
 146 /* Control-only Status */
 147 #define DEPEVT_STATUS_CONTROL_DATA                              1
 148 #define DEPEVT_STATUS_CONTROL_STATUS                    2
 149 #define DEPEVT_STATUS_CONTROL_DATA_INVALTRB             9
 150 #define DEPEVT_STATUS_CONTROL_STATUS_INVALTRB   0xA
 151
 152 #define XUSBPSU_ENDPOINTS_NUM                   12
 153
 154 #define XUSBPSU_EVENT_SIZE                              4       /* bytes */
 155 #define XUSBPSU_EVENT_MAX_NUM                   64      /* 2 events/endpoint */
 156 #define XUSBPSU_EVENT_BUFFERS_SIZE              (XUSBPSU_EVENT_SIZE * \
 157                                                                                 XUSBPSU_EVENT_MAX_NUM)
 158
 159 #define XUSBPSU_EVENT_TYPE_MASK                 0xfe
 160
 161 #define XUSBPSU_EVENT_TYPE_DEV                  0
 162 #define XUSBPSU_EVENT_TYPE_CARKIT               3
 163 #define XUSBPSU_EVENT_TYPE_I2C                  4
 164
 165 #define XUSBPSU_DEVICE_EVENT_DISCONNECT         0
 166 #define XUSBPSU_DEVICE_EVENT_RESET              1
 167 #define XUSBPSU_DEVICE_EVENT_CONNECT_DONE       2
 168 #define XUSBPSU_DEVICE_EVENT_LINK_STATUS_CHANGE 3
 169 #define XUSBPSU_DEVICE_EVENT_WAKEUP             4
 170 #define XUSBPSU_DEVICE_EVENT_HIBER_REQ          5
 171 #define XUSBPSU_DEVICE_EVENT_EOPF               6
 172 #define XUSBPSU_DEVICE_EVENT_SOF                7
 173 #define XUSBPSU_DEVICE_EVENT_ERRATIC_ERROR      9
 174 #define XUSBPSU_DEVICE_EVENT_CMD_CMPL           10
 175 #define XUSBPSU_DEVICE_EVENT_OVERFLOW           11
 176
 177 #define XUSBPSU_GEVNTCOUNT_MASK                 0xfffc
 178
 179 /*
 180  * Control Endpoint state
 181  */
 182 #define XUSBPSU_EP0_SETUP_PHASE                         1       /**< Setup Phase */
 183 #define XUSBPSU_EP0_DATA_PHASE                          2       /**< Data Phase */
 184 #define XUSBPSU_EP0_STATUS_PHASE                        3       /**< Status Pahse */
 185
 186 /*
 187  * Link State
 188  */
 189 #define         XUSBPSU_LINK_STATE_U0                   0x00 /**< in HS - ON */
 190 #define         XUSBPSU_LINK_STATE_U1                   0x01
 191 #define         XUSBPSU_LINK_STATE_U2                   0x02 /**< in HS - SLEEP */
 192 #define         XUSBPSU_LINK_STATE_U3                   0x03 /**< in HS - SUSPEND */
 193 #define         XUSBPSU_LINK_STATE_SS_DIS               0x04
 194 #define         XUSBPSU_LINK_STATE_RX_DET               0x05
 195 #define         XUSBPSU_LINK_STATE_SS_INACT             0x06
 196 #define         XUSBPSU_LINK_STATE_POLL                 0x07
 197 #define         XUSBPSU_LINK_STATE_RECOV                0x08
 198 #define         XUSBPSU_LINK_STATE_HRESET               0x09
 199 #define         XUSBPSU_LINK_STATE_CMPLY                0x0A
 200 #define         XUSBPSU_LINK_STATE_LPBK                 0x0B
 201 #define         XUSBPSU_LINK_STATE_RESET                0x0E
 202 #define         XUSBPSU_LINK_STATE_RESUME               0x0F
 203 #define         XUSBPSU_LINK_STATE_MASK                 0x0F
 204
 205 /*
 206  * Device States
 207  */
 208 #define         XUSBPSU_STATE_ATTACHED                  0
 209 #define         XUSBPSU_STATE_POWERED                   1
 210 #define         XUSBPSU_STATE_DEFAULT                   2
 211 #define         XUSBPSU_STATE_ADDRESS                   3
 212 #define         XUSBPSU_STATE_CONFIGURED                4
 213 #define         XUSBPSU_STATE_SUSPENDED                 5
 214
 215 /*
 216  * Device Speeds
 217  */
 218 #define         XUSBPSU_SPEED_UNKNOWN                   0
 219 #define         XUSBPSU_SPEED_LOW                               1
 220 #define         XUSBPSU_SPEED_FULL                              2
 221 #define         XUSBPSU_SPEED_HIGH                              3
 222 #define         XUSBPSU_SPEED_SUPER                             4
 223
 224
 225
 226 /**************************** Type Definitions ******************************/
 227
 228 /**
 229  * This typedef contains configuration information for the XUSBPSU
 230  * device.
 231  */
 232 typedef struct {
 233         u16 DeviceId;           /**< Unique ID of controller */
 234         u32 BaseAddress;        /**< Core register base address */
 235 } XUsbPsu_Config;
 236
 237 /**
 238  * Software Event buffer representation
 239  */
 240 struct XUsbPsu_EvtBuffer {
 241         void    *BuffAddr;
 242         u32             Offset;
 243         u32             Count;
 244         u32             Flags;
 245 };
 246
 247 /**
 248  * Transfer Request Block - Hardware format
 249  */
 250 struct XUsbPsu_Trb {
 251         u32             BufferPtrLow;
 252         u32             BufferPtrHigh;
 253         u32             Size;
 254         u32             Ctrl;
 255 } __attribute__((packed));
 256
 257
 258 /*
 259  * Endpoint Parameters
 260  */
 261 struct XUsbPsu_EpParams {
 262         u32     Param2;         /**< Parameter 2 */
 263         u32     Param1;         /**< Parameter 1 */
 264         u32     Param0;         /**< Parameter 0 */
 265 };
 266
 267 /**
 268  * USB Standard Control Request
 269  */
 270 typedef struct {
 271         u8  bRequestType;
 272         u8  bRequest;
 273         u16 wValue;
 274         u16 wIndex;
 275         u16 wLength;
 276 } __attribute__ ((packed)) SetupPacket;
 277
 278 /**
 279  * Endpoint representation
 280  */
 281 struct XUsbPsu_Ep {
 282         void (*Handler)(void *, u32, u32);
 283                                                 /** < User handler called
 284                                                  *   when data is sent for IN Ep
 285                                                  *   and received for OUT Ep
 286                                                  */
 287         struct XUsbPsu_Trb      EpTrb ALIGNMENT_CACHELINE;/**< TRB used by endpoint */
 288         u32     EpStatus;               /**< Flags to represent Endpoint status */
 289         u32     RequestedBytes; /**< RequestedBytes for transfer */
 290         u32     BytesTxed;              /**< Actual Bytes transferred */
 291         u32     Cmd;                    /**< command issued to EP lately */
 292         u16     MaxSize;                /**< Size of endpoint */
 293         u8      *BufferPtr;             /**< Buffer location */
 294         u8      ResourceIndex;  /**< Resource Index assigned to
 295                                                  *  Endpoint by core
 296                                                  */
 297         u8      PhyEpNum;               /**< Physical Endpoint Number in core */
 298         u8      UsbEpNum;               /**< USB Endpoint Number */
 299         u8      Type;                   /**< Type of Endpoint -
 300                                                  *       Control/BULK/INTERRUPT/ISOC
 301                                                  */
 302         u8      Direction;              /**< Direction - EP_DIR_OUT/EP_DIR_IN */
 303         u8      UnalignedTx;
 304 };
 305
 306 /**
 307  * USB Device Controller representation
 308  */
 309 struct XUsbPsu {
 310         SetupPacket SetupData ALIGNMENT_CACHELINE;
 311                                         /**< Setup Packet buffer */
 312         struct XUsbPsu_Trb Ep0_Trb ALIGNMENT_CACHELINE;
 313                                         /**< TRB for control transfers */
 314         XUsbPsu_Config *ConfigPtr;      /**< Configuration info pointer */
 315         struct XUsbPsu_Ep eps[XUSBPSU_ENDPOINTS_NUM]; /**< Endpoints */
 316         struct XUsbPsu_EvtBuffer Evt;
 317         struct XUsbPsu_EpParams EpParams;
 318         u32 BaseAddress;        /**< Core register base address */
 319         u32 MaxSpeed;
 320         u32 DevDescSize;
 321         u32 ConfigDescSize;
 322         void (*Chapter9)(struct XUsbPsu *, SetupPacket *);
 323         void (*ClassHandler)(struct XUsbPsu *, SetupPacket *);
 324         void *DevDesc;
 325         void *ConfigDesc;
 326         u8 EventBuffer[XUSBPSU_EVENT_BUFFERS_SIZE]
 327                                                 __attribute__((aligned(XUSBPSU_EVENT_BUFFERS_SIZE)));
 328         u8 NumOutEps;
 329         u8 NumInEps;
 330         u8 ControlDir;
 331         u8 IsInTestMode;
 332         u8 TestMode;
 333         u8 Speed;
 334         u8 State;
 335         u8 Ep0State;
 336         u8 LinkState;
 337         u8 UnalignedTx;
 338         u8 IsConfigDone;
 339         u8 IsThreeStage;
 340 };
 341
 342 struct XUsbPsu_Event_Type {
 343         u32     Is_DevEvt:1;
 344         u32     Type:7;
 345         u32     Reserved8_31:24;
 346 } __attribute__((packed));
 347
 348 /**
 349  * struct XUsbPsu_event_depvt - Device Endpoint Events
 350  * @Is_EpEvt: indicates this is an endpoint event
 351  * @endpoint_number: number of the endpoint
 352  * @endpoint_event: The event we have:
 353  *      0x00    - Reserved
 354  *      0x01    - XferComplete
 355  *      0x02    - XferInProgress
 356  *      0x03    - XferNotReady
 357  *      0x04    - RxTxFifoEvt (IN->Underrun, OUT->Overrun)
 358  *      0x05    - Reserved
 359  *      0x06    - StreamEvt
 360  *      0x07    - EPCmdCmplt
 361  * @Reserved11_10: Reserved, don't use.
 362  * @Status: Indicates the status of the event. Refer to databook for
 363  *      more information.
 364  * @Parameters: Parameters of the current event. Refer to databook for
 365  *      more information.
 366  */
 367 struct XUsbPsu_Event_Epevt {
 368         u32     Is_EpEvt:1;
 369         u32     Epnumber:5;
 370         u32     Endpoint_Event:4;
 371         u32     Reserved11_10:2;
 372         u32     Status:4;
 373         u32     Parameters:16;
 374 } __attribute__((packed));
 375
 376 /**
 377  * struct XUsbPsu_event_devt - Device Events
 378  * @Is_DevEvt: indicates this is a non-endpoint event
 379  * @Device_Event: indicates it's a device event. Should read as 0x00
 380  * @Type: indicates the type of device event.
 381  *      0       - DisconnEvt
 382  *      1       - USBRst
 383  *      2       - ConnectDone
 384  *      3       - ULStChng
 385  *      4       - WkUpEvt
 386  *      5       - Reserved
 387  *      6       - EOPF
 388  *      7       - SOF
 389  *      8       - Reserved
 390  *      9       - ErrticErr
 391  *      10      - CmdCmplt
 392  *      11      - EvntOverflow
 393  *      12      - VndrDevTstRcved
 394  * @Reserved15_12: Reserved, not used
 395  * @Event_Info: Information about this event
 396  * @Reserved31_25: Reserved, not used
 397  */
 398 struct XUsbPsu_Event_Devt {
 399         u32     Is_DevEvt:1;
 400         u32     Device_Event:7;
 401         u32     Type:4;
 402         u32     Reserved15_12:4;
 403         u32     Event_Info:9;
 404         u32     Reserved31_25:7;
 405 } __attribute__((packed));
 406
 407 /**
 408  * struct XUsbPsu_event_gevt - Other Core Events
 409  * @one_bit: indicates this is a non-endpoint event (not used)
 410  * @device_event: indicates it's (0x03) Carkit or (0x04) I2C event.
 411  * @phy_port_number: self-explanatory
 412  * @reserved31_12: Reserved, not used.
 413  */
 414 struct XUsbPsu_Event_Gevt {
 415         u32     Is_GlobalEvt:1;
 416         u32     Device_Event:7;
 417         u32     Phy_Port_Number:4;
 418         u32     Reserved31_12:20;
 419 } __attribute__((packed));
 420
 421 /**
 422  * union XUsbPsu_event - representation of Event Buffer contents
 423  * @raw: raw 32-bit event
 424  * @type: the type of the event
 425  * @depevt: Device Endpoint Event
 426  * @devt: Device Event
 427  * @gevt: Global Event
 428  */
 429 union XUsbPsu_Event {
 430         u32                             Raw;
 431         struct XUsbPsu_Event_Type       Type;
 432         struct XUsbPsu_Event_Epevt      Epevt;
 433         struct XUsbPsu_Event_Devt       Devt;
 434         struct XUsbPsu_Event_Gevt       Gevt;
 435 };
 436
 437 /***************** Macros (Inline Functions) Definitions *********************/
 438
 439 #define IS_ALIGNED(x, a)        (((x) & ((typeof(x))(a) - 1)) == 0)
 440
 441 #define roundup(x, y) (                                 \
 442 {                                                       \
 443         const typeof(y) __y = y;                        \
 444         (((x) + (__y - 1)) / __y) * __y;                \
 445 }                                                       \
 446 )
 447
 448 #define DECLARE_DEV_DESC(Instance, desc)                        \
 449         (Instance).DevDesc = &(desc);                                   \
 450         (Instance).DevDescSize = sizeof((desc))
 451
 452 #define DECLARE_CONFIG_DESC(Instance, desc)             \
 453         (Instance).ConfigDesc = &(desc);                                \
 454         (Instance).ConfigDescSize = sizeof((desc))
 455
 456 /************************** Function Prototypes ******************************/
 457
 458 /*
 459  * Functions in xusbpsu.c
 460  */
 461 int XUsbPsu_Wait_Clear_Timeout(struct XUsbPsu *InstancePtr, u32 Offset,
 462                                                                 u32 BitMask, u32 Timeout);
 463 int XUsbPsu_Wait_Set_Timeout(struct XUsbPsu *InstancePtr, u32 Offset,
 464                                                                 u32 BitMask, u32 Timeout);
 465 void XUsbPsu_SetMode(struct XUsbPsu *InstancePtr, u32 mode);
 466 void XUsbPsu_PhyReset(struct XUsbPsu *InstancePtr);
 467 void XUsbPsu_EventBuffersSetup(struct XUsbPsu *InstancePtr);
 468 void XUsbPsu_EventBuffersReset(struct XUsbPsu *InstancePtr);
 469 void XUsbPsu_CoreNumEps(struct XUsbPsu *InstancePtr);
 470 void XUsbPsu_cache_hwparams(struct XUsbPsu *InstancePtr);
 471 int XUsbPsu_CoreInit(struct XUsbPsu *InstancePtr);
 472 void XUsbPsu_EnableIntr(struct XUsbPsu *InstancePtr, u32 Mask);
 473 void XUsbPsu_DisableIntr(struct XUsbPsu *InstancePtr, u32 Mask);
 474 int XUsbPsu_CfgInitialize(struct XUsbPsu *InstancePtr,
 475                         XUsbPsu_Config *ConfigPtr, u32 BaseAddress);
 476 int XUsbPsu_Start(struct XUsbPsu *InstancePtr);
 477 int XUsbPsu_Stop(struct XUsbPsu *InstancePtr);
 478 int XUsbPsu_SetTestMode(struct XUsbPsu *InstancePtr, int mode);
 479 u32 XUsbPsu_GetLinkState(struct XUsbPsu *InstancePtr);
 480 int XUsbPsu_SetLinkState(struct XUsbPsu *InstancePtr,
 481                                 u8 state);
 482 int XUsbPsu_SendGenericCmd(struct XUsbPsu *InstancePtr,
 483                                         int cmd, u32 param);
 484 void XUsbPsu_SetSpeed(struct XUsbPsu *InstancePtr, u32 Speed);
 485 int XUsbPsu_SetDeviceAddress(struct XUsbPsu *InstancePtr, u16 Addr);
 486
 487 /*
 488  * Functions in xusbpsu_endpoint.c
 489  */
 490 struct XUsbPsu_EpParams *XUsbPsu_GetEpParams(struct XUsbPsu *InstancePtr);
 491 u32 XUsbPsu_EpGetTransferIndex(struct XUsbPsu *InstancePtr, u8 UsbEpNum,
 492                                 u8 dir);
 493 const char *XUsbPsu_EpCmdString(u8 cmd);
 494 int XUsbPsu_SendEpCmd(struct XUsbPsu *InstancePtr, u8 ep, u8 direction,
 495                         u32 cmd, struct XUsbPsu_EpParams *params);
 496 int XUsbPsu_StartEpConfig(struct XUsbPsu *InstancePtr, u32 ep,
 497                                 u8 dir);
 498 int XUsbPsu_SetEpConfig(struct XUsbPsu *InstancePtr, u8 ep, u8 dir,
 499                                 u16 size, u8 type);
 500 int XUsbPsu_SetXferResource(struct XUsbPsu *InstancePtr, u8 ep, u8 dir);
 501 int XUsbPsu_EpEnable(struct XUsbPsu *InstancePtr, u8 UsbEp, u8 dir,
 502                         u16 maxsize, u8 type);
 503 int XUsbPsu_EpDisable(struct XUsbPsu *InstancePtr, u8 UsbEp, u8 dir);
 504 int XUsbPsu_EnableControlEp(struct XUsbPsu *InstancePtr, u16 size);
 505 void XUsbPsu_InitializeEps(struct XUsbPsu *InstancePtr);
 506 void XUsbPsu_StopTransfer(struct XUsbPsu *InstancePtr, u8 ep, u8 dir);
 507 void XUsbPsu_ClearStalls(struct XUsbPsu *InstancePtr);
 508 int XUsbPsu_EpBufferSend(struct XUsbPsu *InstancePtr, u8 EpNum,
 509                         u8 *BufferPtr, u32 BufferLen);
 510 int XUsbPsu_EpBufferRecv(struct XUsbPsu *InstancePtr, u8 EpNum,
 511                                 u8 *BufferPtr, u32 length);
 512 void XUsbPsu_EpSetStall(struct XUsbPsu *InstancePtr, u8 epnum, u8 Dir);
 513 void XUsbPsu_EpClearStall(struct XUsbPsu *InstancePtr, u8 epnum, u8 Dir);
 514 void XUsbPsu_SetEpHandler(struct XUsbPsu *InstancePtr, u8 epnum,
 515                         u8 dir, void (*Handler)(void *, u32, u32));
 516 int XUsbPsu_IsEpStalled(struct XUsbPsu *InstancePtr, u8 Epnum, u8 Dir);
 517
 518 /*
 519  * Functions in xusbpsu_controltransfers.c
 520  */
 521 int XUsbPsu_RecvSetup(struct XUsbPsu *InstancePtr);
 522 void XUsbPsu_Ep0StallRestart(struct XUsbPsu *InstancePtr);
 523 int XUsbPsu_SetConfiguration(struct XUsbPsu *InstancePtr,
 524                                 SetupPacket *ctrl);
 525 void XUsbPsu_Ep0DataDone(struct XUsbPsu *InstancePtr,
 526                 const struct XUsbPsu_Event_Epevt *event);
 527 void XUsbPsu_Ep0StatusDone(struct XUsbPsu *InstancePtr,
 528                 const struct XUsbPsu_Event_Epevt *event);
 529 void XUsbPsu_Ep0XferComplete(struct XUsbPsu *InstancePtr,
 530                         const struct XUsbPsu_Event_Epevt *event);
 531 int XUsbPsu_Ep0StartStatus(struct XUsbPsu *InstancePtr,
 532                                 const struct XUsbPsu_Event_Epevt *event);
 533 void XUsbPsu_Ep0_EndControlData(struct XUsbPsu *InstancePtr,
 534                                         struct XUsbPsu_Ep *dep);
 535 void XUsbPsu_Ep0XferNotReady(struct XUsbPsu *InstancePtr,
 536                 const struct XUsbPsu_Event_Epevt *event);
 537 void XUsbPsu_Ep0Intr(struct XUsbPsu *InstancePtr,
 538                 const struct XUsbPsu_Event_Epevt *event);
 539 int XUsbPsu_Ep0Send(struct XUsbPsu *InstancePtr, u8 *BufferPtr,
 540                         u32 BufferLen);
 541 int XUsbPsu_Ep0Recv(struct XUsbPsu *InstancePtr, u8 *BufferPtr, u32 Length);
 542
 543 /*
 544  * Functions in xusbpsu_intr.c
 545  */
 546 void XUsbPsu_EpInterrupt(struct XUsbPsu *InstancePtr,
 547                 const struct XUsbPsu_Event_Epevt *event);
 548 void XUsbPsu_DisconnectIntr(struct XUsbPsu *InstancePtr);
 549 void XUsbPsu_ResetIntr(struct XUsbPsu *InstancePtr);
 550 void XUsbPsu_ConnDoneIntr(struct XUsbPsu *InstancePtr);
 551 void XUsbPsu_LinkStsChangeIntr(struct XUsbPsu *InstancePtr,
 552                                 u32 evtinfo);
 553 void XUsbPsu_DevInterrupt(struct XUsbPsu *InstancePtr,
 554                 const struct XUsbPsu_Event_Devt *event);
 555 void XUsbPsu_ProcessEvent(struct XUsbPsu *InstancePtr,
 556                 const union XUsbPsu_Event *event);
 557 void XUsbPsu_ProcessEvtBuffer(struct XUsbPsu *InstancePtr);
 558 void XUsbPsu_IntrHandler(void *XUsbPsu);
 559
 560 /*
 561  * Functions in xusbpsu_sinit.c
 562  */
 563 XUsbPsu_Config *XUsbPsu_LookupConfig(u16 DeviceId);
 564
 565 #ifdef __cplusplus
 566 }
 567 #endif
 568
 569 #endif  /* End of protection macro. */