1 /**************************************************************************//**
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2 * @file efm32gg_usb_diep.h
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3 * @brief EFM32GG_USB_DIEP register and bit field definitions
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5 ******************************************************************************
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7 * <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
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8 ******************************************************************************
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10 * Permission is granted to anyone to use this software for any purpose,
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11 * including commercial applications, and to alter it and redistribute it
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12 * freely, subject to the following restrictions:
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14 * 1. The origin of this software must not be misrepresented; you must not
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15 * claim that you wrote the original software.@n
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16 * 2. Altered source versions must be plainly marked as such, and must not be
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17 * misrepresented as being the original software.@n
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18 * 3. This notice may not be removed or altered from any source distribution.
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20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc.
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21 * has no obligation to support this Software. Silicon Laboratories, Inc. is
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22 * providing the Software "AS IS", with no express or implied warranties of any
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23 * kind, including, but not limited to, any implied warranties of
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24 * merchantability or fitness for any particular purpose or warranties against
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25 * infringement of any proprietary rights of a third party.
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27 * Silicon Laboratories, Inc. will not be liable for any consequential,
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28 * incidental, or special damages, or any other relief, or for any claim by
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29 * any third party, arising from your use of this Software.
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31 *****************************************************************************/
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32 /**************************************************************************//**
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33 * @brief USB_DIEP EFM32GG USB DIEP
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34 *****************************************************************************/
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37 __IO uint32_t CTL; /**< Device IN Endpoint x+1 Control Register */
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38 uint32_t RESERVED0[1]; /**< Reserved for future use **/
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39 __IO uint32_t INT; /**< Device IN Endpoint x+1 Interrupt Register */
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40 uint32_t RESERVED1[1]; /**< Reserved for future use **/
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41 __IO uint32_t TSIZ; /**< Device IN Endpoint x+1 Transfer Size Register */
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42 __IO uint32_t DMAADDR; /**< Device IN Endpoint x+1 DMA Address Register */
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43 __I uint32_t TXFSTS; /**< Device IN Endpoint x+1 Transmit FIFO Status Register */
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44 uint32_t RESERVED2[1]; /**< Reserved future */
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