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   1 // $Id: _profile_timer_hw.h,v 1.1.2.2 2011/05/30 06:46:18 svemula Exp $
   2 /******************************************************************************
   3 *
   4 * Copyright (C) 2004 - 2014 Xilinx, Inc.  All rights reserved.
   5 *
   6 * Permission is hereby granted, free of charge, to any person obtaining a copy
   7 * of this software and associated documentation files (the "Software"), to deal
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   9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10 * copies of the Software, and to permit persons to whom the Software is
  11 * furnished to do so, subject to the following conditions:
  12 *
  13 * The above copyright notice and this permission notice shall be included in
  14 * all copies or substantial portions of the Software.
  15 *
  16 * Use of the Software is limited solely to applications:
  17 * (a) running on a Xilinx device, or
  18 * (b) that interact with a Xilinx device through a bus or interconnect.
  19 *
  20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  21 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  22 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  23 * XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  24 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
  25 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  26 * SOFTWARE.
  27 *
  28 * Except as contained in this notice, the name of the Xilinx shall not be used
  29 * in advertising or otherwise to promote the sale, use or other dealings in
  30 * this Software without prior written authorization from Xilinx.
  31 *
  32 ******************************************************************************
  33 *
  34 * _program_timer_hw.h:
  35 *       Timer related functions
  36 *
  37 ******************************************************************************/
  38
  39 #ifndef _PROFILE_TIMER_HW_H
  40 #define _PROFILE_TIMER_HW_H
  41
  42 #include "profile.h"
  43
  44 #ifdef PROC_PPC
  45 #if defined __GNUC__
  46 #  define SYNCHRONIZE_IO __asm__ volatile ("eieio")
  47 #elif defined __DCC__
  48 #  define SYNCHRONIZE_IO __asm volatile(" eieio")
  49 #else
  50 #  define SYNCHRONIZE_IO
  51 #endif
  52 #endif
  53
  54 #ifdef PROC_PPC
  55 #define ProfIo_In32(InputPtr) (*(volatile u32 *)(InputPtr)); SYNCHRONIZE_IO;
  56 #define ProfIo_Out32(OutputPtr, Value) { (*(volatile u32 *)(OutputPtr) = Value); SYNCHRONIZE_IO; }
  57 #else
  58 #define ProfIo_In32(InputPtr) (*(volatile u32 *)(InputPtr));
  59 #define ProfIo_Out32(OutputPtr, Value) { (*(volatile u32 *)(OutputPtr) = Value); }
  60 #endif
  61
  62 #define ProfTmrCtr_mWriteReg(BaseAddress, TmrCtrNumber, RegOffset, ValueToWrite)\
  63         ProfIo_Out32(((BaseAddress) + XTmrCtr_Offsets[(TmrCtrNumber)] + \
  64                            (RegOffset)), (ValueToWrite))
  65
  66 #define ProfTimerCtr_mReadReg(BaseAddress, TmrCtrNumber, RegOffset)     \
  67         ProfIo_In32((BaseAddress) + XTmrCtr_Offsets[(TmrCtrNumber)] + (RegOffset))
  68
  69 #define ProfTmrCtr_mSetControlStatusReg(BaseAddress, TmrCtrNumber, RegisterValue)\
  70         ProfTmrCtr_mWriteReg((BaseAddress), (TmrCtrNumber), XTC_TCSR_OFFSET,     \
  71                                            (RegisterValue))
  72
  73 #define ProfTmrCtr_mGetControlStatusReg(BaseAddress, TmrCtrNumber)              \
  74         ProfTimerCtr_mReadReg((BaseAddress), (TmrCtrNumber), XTC_TCSR_OFFSET)
  75
  76
  77
  78 #ifdef __cplusplus
  79 extern "C" {
  80 #endif
  81
  82 #ifdef PROC_PPC
  83 #include "xexception_l.h"
  84 #include "xtime_l.h"
  85 #include "xpseudo_asm.h"
  86 #endif
  87
  88 #ifdef TIMER_CONNECT_INTC
  89 #include "xintc_l.h"
  90 #include "xintc.h"
  91 #endif  // TIMER_CONNECT_INTC
  92
  93 #if (!defined PPC_PIT_INTERRUPT && !defined PROC_CORTEXA9)
  94 #include "xtmrctr_l.h"
  95 #endif
  96
  97 #ifdef PROC_CORTEXA9
  98 #include "xscutimer_hw.h"
  99 #include "xscugic.h"
 100 #endif
 101
 102 extern unsigned int timer_clk_ticks ;
 103
 104 //--------------------------------------------------------------------
 105 // PowerPC Target - Timer related functions
 106 //--------------------------------------------------------------------
 107 #ifdef PROC_PPC
 108
 109 #ifdef PPC_PIT_INTERRUPT
 110 unsigned long timer_lo_clk_ticks ;      // Clk ticks when Timer is disabled in CG
 111 #endif
 112
 113 #ifdef PROC_PPC440
 114 #define XREG_TCR_PIT_INTERRUPT_ENABLE XREG_TCR_DEC_INTERRUPT_ENABLE
 115 #define XREG_TSR_PIT_INTERRUPT_STATUS XREG_TSR_DEC_INTERRUPT_STATUS
 116 #define XREG_SPR_PIT XREG_SPR_DEC
 117 #define XEXC_ID_PIT_INT XEXC_ID_DEC_INT
 118 #endif
 119
 120 //--------------------------------------------------------------------
 121 // Disable the Timer - During Profiling
 122 //
 123 // For PIT Timer -
 124 //      1. XTime_PITDisableInterrupt() ;
 125 //      2. Store the remaining timer clk tick
 126 //      3. Stop the PIT Timer
 127 //--------------------------------------------------------------------
 128
 129 #ifdef PPC_PIT_INTERRUPT
 130 #define disable_timer()                 \
 131         {                               \
 132                 unsigned long val;      \
 133                 val=mfspr(XREG_SPR_TCR);        \
 134                 mtspr(XREG_SPR_TCR, val & ~XREG_TCR_PIT_INTERRUPT_ENABLE);      \
 135                 timer_lo_clk_ticks = mfspr(XREG_SPR_PIT);                       \
 136                 mtspr(XREG_SPR_PIT, 0); \
 137         }
 138 #else
 139 #define disable_timer()         \
 140    { \
 141       u32 addr = (PROFILE_TIMER_BASEADDR) + XTmrCtr_Offsets[(0)] + XTC_TCSR_OFFSET; \
 142       u32 tmp_v = ProfIo_In32(addr); \
 143       tmp_v = tmp_v & ~XTC_CSR_ENABLE_TMR_MASK; \
 144       ProfIo_Out32((PROFILE_TIMER_BASEADDR) + XTmrCtr_Offsets[(0)] + XTC_TCSR_OFFSET, tmp_v); \
 145    }
 146 #endif
 147
 148
 149
 150 //--------------------------------------------------------------------
 151 // Enable the Timer
 152 //
 153 // For PIT Timer -
 154 //      1. Load the remaining timer clk ticks
 155 //      2. XTime_PITEnableInterrupt() ;
 156 //--------------------------------------------------------------------
 157 #ifdef PPC_PIT_INTERRUPT
 158 #define enable_timer()                          \
 159         {                                       \
 160                 unsigned long val;              \
 161                 val=mfspr(XREG_SPR_TCR);        \
 162                 mtspr(XREG_SPR_PIT, timer_lo_clk_ticks);        \
 163                 mtspr(XREG_SPR_TCR, val | XREG_TCR_PIT_INTERRUPT_ENABLE); \
 164         }
 165 #else
 166 #define enable_timer()                                          \
 167         {                                                       \
 168       u32 addr = (PROFILE_TIMER_BASEADDR) + XTmrCtr_Offsets[(0)] + XTC_TCSR_OFFSET; \
 169       u32 tmp_v = ProfIo_In32(addr); \
 170       tmp_v = tmp_v |  XTC_CSR_ENABLE_TMR_MASK; \
 171       ProfIo_Out32((PROFILE_TIMER_BASEADDR) + XTmrCtr_Offsets[(0)] + XTC_TCSR_OFFSET, tmp_v); \
 172         }
 173 #endif
 174
 175
 176
 177 //--------------------------------------------------------------------
 178 // Send Ack to Timer Interrupt
 179 //
 180 // For PIT Timer -
 181 //      1. Load the timer clk ticks
 182 //      2. Enable AutoReload and Interrupt
 183 //      3. Clear PIT Timer Status bits
 184 //--------------------------------------------------------------------
 185 #ifdef PPC_PIT_INTERRUPT
 186 #define timer_ack()                                                     \
 187         {                                                               \
 188                 unsigned long val;                                      \
 189                 mtspr(XREG_SPR_PIT, timer_clk_ticks);                   \
 190                 mtspr(XREG_SPR_TSR, XREG_TSR_PIT_INTERRUPT_STATUS);     \
 191                 val=mfspr(XREG_SPR_TCR);                                \
 192                 mtspr(XREG_SPR_TCR, val| XREG_TCR_PIT_INTERRUPT_ENABLE| XREG_TCR_AUTORELOAD_ENABLE); \
 193         }
 194 #else
 195 #define timer_ack()                             \
 196         {                                               \
 197                 unsigned int csr;                       \
 198                 csr = ProfTmrCtr_mGetControlStatusReg(PROFILE_TIMER_BASEADDR, 0);       \
 199                 ProfTmrCtr_mSetControlStatusReg(PROFILE_TIMER_BASEADDR, 0, csr);        \
 200         }
 201 #endif
 202
 203 //--------------------------------------------------------------------
 204 #endif  // PROC_PPC
 205 //--------------------------------------------------------------------
 206
 207
 208
 209
 210 //--------------------------------------------------------------------
 211 // MicroBlaze Target - Timer related functions
 212 //--------------------------------------------------------------------
 213 #ifdef PROC_MICROBLAZE
 214
 215 //--------------------------------------------------------------------
 216 // Disable the Timer during Call-Graph Data collection
 217 //
 218 //--------------------------------------------------------------------
 219 #define disable_timer()                                 \
 220         {                                               \
 221       u32 addr = (PROFILE_TIMER_BASEADDR) + XTmrCtr_Offsets[(0)] + XTC_TCSR_OFFSET; \
 222       u32 tmp_v = ProfIo_In32(addr); \
 223       tmp_v = tmp_v & ~XTC_CSR_ENABLE_TMR_MASK; \
 224       ProfIo_Out32((PROFILE_TIMER_BASEADDR) + XTmrCtr_Offsets[(0)] + XTC_TCSR_OFFSET, tmp_v); \
 225     }
 226
 227
 228 //--------------------------------------------------------------------
 229 // Enable the Timer after Call-Graph Data collection
 230 //
 231 //--------------------------------------------------------------------
 232 #define enable_timer()                                  \
 233         {                                               \
 234       u32 addr = (PROFILE_TIMER_BASEADDR) + XTmrCtr_Offsets[(0)] + XTC_TCSR_OFFSET; \
 235       u32 tmp_v = ProfIo_In32(addr); \
 236       tmp_v = tmp_v |  XTC_CSR_ENABLE_TMR_MASK; \
 237       ProfIo_Out32((PROFILE_TIMER_BASEADDR) + XTmrCtr_Offsets[(0)] + XTC_TCSR_OFFSET, tmp_v); \
 238         }
 239
 240
 241 //--------------------------------------------------------------------
 242 // Send Ack to Timer Interrupt
 243 //
 244 //--------------------------------------------------------------------
 245 #define timer_ack()                             \
 246         {                                               \
 247                 unsigned int csr;                       \
 248                 csr = ProfTmrCtr_mGetControlStatusReg(PROFILE_TIMER_BASEADDR, 0);       \
 249                 ProfTmrCtr_mSetControlStatusReg(PROFILE_TIMER_BASEADDR, 0, csr);        \
 250         }
 251
 252 //--------------------------------------------------------------------
 253 #endif  // PROC_MICROBLAZE
 254 //--------------------------------------------------------------------
 255
 256 //--------------------------------------------------------------------
 257 // Cortex A9 Target - Timer related functions
 258 //--------------------------------------------------------------------
 259 #ifdef PROC_CORTEXA9
 260
 261 //--------------------------------------------------------------------
 262 // Disable the Timer during Call-Graph Data collection
 263 //
 264 //--------------------------------------------------------------------
 265 #define disable_timer()                                                 \
 266 {                                                               \
 267         u32 Reg;                                                        \
 268         Reg = Xil_In32(PROFILE_TIMER_BASEADDR + XSCUTIMER_CONTROL_OFFSET); \
 269         Reg &= ~XSCUTIMER_CONTROL_ENABLE_MASK;\
 270         Xil_Out32(PROFILE_TIMER_BASEADDR + XSCUTIMER_CONTROL_OFFSET, Reg);\
 271 }                                                               \
 272
 273
 274 //--------------------------------------------------------------------
 275 // Enable the Timer after Call-Graph Data collection
 276 //
 277 //--------------------------------------------------------------------
 278 #define enable_timer()                                                  \
 279 {                                                               \
 280         u32 Reg;                                                        \
 281         Reg = Xil_In32(PROFILE_TIMER_BASEADDR + XSCUTIMER_CONTROL_OFFSET); \
 282         Reg |= XSCUTIMER_CONTROL_ENABLE_MASK; \
 283         Xil_Out32(PROFILE_TIMER_BASEADDR + XSCUTIMER_CONTROL_OFFSET, Reg);\
 284 }                                                               \
 285
 286
 287 //--------------------------------------------------------------------
 288 // Send Ack to Timer Interrupt
 289 //
 290 //--------------------------------------------------------------------
 291 #define timer_ack()                                             \
 292 {                                                       \
 293         Xil_Out32(PROFILE_TIMER_BASEADDR + XSCUTIMER_ISR_OFFSET, \
 294                 XSCUTIMER_ISR_EVENT_FLAG_MASK);\
 295 }
 296
 297 //--------------------------------------------------------------------
 298 #endif  // PROC_CORTEXA9
 299 //--------------------------------------------------------------------
 300
 301
 302 #ifdef __cplusplus
 303 }
 304 #endif
 305
 306 #endif