1 /******************************************************************************
3 * (c) Copyright 2011-13 Xilinx, Inc. All rights reserved.
5 * This file contains confidential and proprietary information of Xilinx, Inc.
6 * and is protected under U.S. and international copyright and other
7 * intellectual property laws.
10 * This disclaimer is not a license and does not grant any rights to the
11 * materials distributed herewith. Except as otherwise provided in a valid
12 * license issued to you by Xilinx, and to the maximum extent permitted by
13 * applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL
14 * FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS,
15 * IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF
16 * MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE;
17 * and (2) Xilinx shall not be liable (whether in contract or tort, including
18 * negligence, or under any other theory of liability) for any loss or damage
19 * of any kind or nature related to, arising under or in connection with these
20 * materials, including for any direct, or any indirect, special, incidental,
21 * or consequential loss or damage (including loss of data, profits, goodwill,
22 * or any type of loss or damage suffered as a result of any action brought by
23 * a third party) even if such damage or loss was reasonably foreseeable or
24 * Xilinx had been advised of the possibility of the same.
26 * CRITICAL APPLICATIONS
27 * Xilinx products are not designed or intended to be fail-safe, or for use in
28 * any application requiring fail-safe performance, such as life-support or
29 * safety devices or systems, Class III medical devices, nuclear facilities,
30 * applications related to the deployment of airbags, or any other applications
31 * that could lead to death, personal injury, or severe property or
32 * environmental damage (individually and collectively, "Critical
33 * Applications"). Customer assumes the sole risk and liability of any use of
34 * Xilinx products in Critical Applications, subject only to applicable laws
35 * and regulations governing limitations on product liability.
37 * THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE
40 ******************************************************************************/
41 /*****************************************************************************/
44 * @file xl2cc_counter.c
46 * This file contains APIs for configuring and controlling the event counters
47 * in PL310 L2 cache controller. For more information about the event counters,
48 * see xl2cc_counter.h.
51 * MODIFICATION HISTORY:
53 * Ver Who Date Changes
54 * ----- ---- -------- -----------------------------------------------
55 * 1.00a sdm 07/11/11 First release
56 * 3.07a asa 08/30/12 Updated for CR 675636 to provide the L2 Base Address
60 ******************************************************************************/
62 /***************************** Include Files *********************************/
65 #include "xparameters_ps.h"
66 #include "xl2cc_counter.h"
69 /************************** Constant Definitions ****************************/
71 /**************************** Type Definitions ******************************/
73 /***************** Macros (Inline Functions) Definitions ********************/
75 /************************** Variable Definitions *****************************/
77 /************************** Function Prototypes ******************************/
79 void XL2cc_EventCtrReset(void);
81 /******************************************************************************/
83 /****************************************************************************/
86 * This function initializes the event counters in L2 Cache controller with a
87 * set of event codes specified by the user.
89 * @param Event0 is the event code for counter 0.
90 * @param Event1 is the event code for counter 1.
91 * Use the event codes defined by XL2CC_* in xl2cc_counter.h.
97 *****************************************************************************/
98 void XL2cc_EventCtrInit(int Event0, int Event1)
101 /* Write event code into cnt1 cfg reg */
102 *((volatile u32*)(XPS_L2CC_BASEADDR + XPS_L2CC_EVNT_CNT1_CTRL_OFFSET)) = (Event1 << 2);
104 /* Write event code into cnt0 cfg reg */
105 *((volatile u32*)(XPS_L2CC_BASEADDR + XPS_L2CC_EVNT_CNT0_CTRL_OFFSET)) = (Event0 << 2);
108 XL2cc_EventCtrReset();
111 /****************************************************************************/
114 * This function starts the event counters in L2 Cache controller.
122 *****************************************************************************/
123 void XL2cc_EventCtrStart(void)
125 XL2cc_EventCtrReset();
128 *((volatile u32*)(XPS_L2CC_BASEADDR + XPS_L2CC_EVNT_CNTRL_OFFSET)) = 1;
131 /****************************************************************************/
134 * This function disables the event counters in L2 Cache controller, saves the
135 * counter values and resets the counters.
137 * @param EveCtr0 is an output parameter which is used to return the value
138 * in event counter 0.
139 * EveCtr1 is an output parameter which is used to return the value
140 * in event counter 1.
146 *****************************************************************************/
147 void XL2cc_EventCtrStop(u32 *EveCtr0, u32 *EveCtr1)
149 /* Disable counter */
150 *((volatile u32*) (XPS_L2CC_BASEADDR + XPS_L2CC_EVNT_CNTRL_OFFSET)) = 0;
152 /* Save counter values */
153 *EveCtr1 = *((volatile u32*)(XPS_L2CC_BASEADDR + XPS_L2CC_EVNT_CNT1_VAL_OFFSET));
154 *EveCtr0 = *((volatile u32*)(XPS_L2CC_BASEADDR + XPS_L2CC_EVNT_CNT0_VAL_OFFSET));
156 XL2cc_EventCtrReset();
159 /****************************************************************************/
162 * This function resets the event counters in L2 Cache controller.
170 *****************************************************************************/
171 void XL2cc_EventCtrReset(void)
173 *((volatile u32*)(XPS_L2CC_BASEADDR + XPS_L2CC_EVNT_CNTRL_OFFSET)) = 0x6;