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RELEASE CMSIS for REV A 20111209\r
1/ New LPC18xx.h header file. Changes GPIO structure.\r
2/ Addition of lpc18xx_emc.c and lpc18xx_emc.h to configure memory on Hitex board.\r
3/ Addition of spifi_rom_api.h, spifi_drv_M3.lib and SPIFI_ROM_support.doc SPIFI driver package\r
4/ Updated SPIFI programming driver for Keil MDK which uses the SPIFI lib\r
5/ New BOOTFAST example shows how to boot from external flash or QSPI and ramp to 180 MHz\r
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RELEASE CMSIS for REV A 20111130\r
1./ lpc18xx_lcd.h LCD_CFG_type add member pcd, lpc18xx_lcd.c add init pcd in LCD_Init function\r
2./ protect MAX and MIN macro in lpc_types.h\r
3./ Add getPC function to ARM,GNU, IAR startup_lpc18xx.s\r
4./ Add VTOR init in SystemInit function\r
5./ Change All ADC examples to use ADC port 0\r
6./ These example: CortexM3_Mpu, Pwr_DeepPowerDown, Timer_FreqMeasure, SCT_SimpleMatch and all USBDEV_ROM examples Keil project was adjusted\r
7./ SDRAM example and LCD example was changed not to use uint64_t in NS2CLK function\r
8./ Nvic_VectorTableRelocation.c\r
removed: \r
#if __RAM_MODE__//Run in RAM mode\r
  memcpy((void *)VTOR_OFFSET, (const void *)0x10000000, 256*4);\r
#else\r
  memcpy((void *)VTOR_OFFSET, (const void *)0x1C000000, 256*4);\r
#endif\r
\r
added:\r
memcpy((void *)VTOR_OFFSET, (const void *)(getPC()& 0xFF000000), 256*4);\r
9./ Pwr_PowerDown change method for testing this feature\r
\r
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RELEASE CMSIS for REV A 20111028\r
1./ Add GNU support\r
2./ Addition of new Keil flash drivers for eFlash and SPIFI\r
3./ Change of Keil projects to support eFlash and SPIFI operation\r
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PRE-RELEASE CMSIS for REV A 20111011\r
1/ PowerDown Example IAR issue fixed\r
2/ Upgraded CMSIS to version 2.10\r
3/ Upgraded Core header to Rev A\r
4/ lpc18xx_can.h remove all bitrates from 8Mhz, add bitrates from 12Mhz\r
        /** Bitrate: 100K */\r
        #define CAN_BITRATE100K12MHZ           0x00004509\r
        /** Bitrate: 125K */\r
        #define CAN_BITRATE125K12MHZ           0x00004507\r
        /** Bitrate: 250K */\r
        #define CAN_BITRATE250K12MHZ           0x00004503\r
        /** Bitrate: 500K */\r
        #define CAN_BITRATE500K12MHZ            0x00004501\r
        /** Bitrate: 1000K */\r
        #define CAN_BITRATE1000K12MHZ          0x00004500\r
5./ lpc18xx_cgu.* add PLL audio clock, modify alloc connect table and CGU_Entity_ControlReg_Offset\r
6./ lpc18xx_evrt.h\r
        add EVRT_SRC_SDIO\r
7./ lpc18xx_i2s.h separate LPC_I2S0 and LPC_I2S1\r
8./ lpc18xx_scu.h\r
        redefine, add pin modes and add pin functions 4->7\r
9./ debug_frmwrk.c\r
        changed pin mode for UART RXD0 and UART RXD1\r
10./ lpc_can.c replace LPC_CAN by LPC_CAN0\r
11./ lpc18xx_i2c.* replace i2c pin configurations\r
12./ lpc18xx_ssp.c down default clock speed to 100kHz\r
13./ Examples\CCAN\CCan_SimpleTxRx\CCan_SimpleTxRx.c change RD pin mode to enable input buffer\r
14./ Examples\EMAC\Emac_EasyWeb\emac.c\r
                replace MII and RMII pin setting by source from CodeBundle\r
15./ Examples\EMC\Emc_Sdram\SDRAM_Init.c and Examples\EMC\Emc_NorFlash\SST39VF320.c\r
                replace EMC pin setting to be compatible with Rev A\r
16./ Examples\I2S\I2s_Audio\I2s_Audio.c\r
                replace I2S pin setting to be compatible with Rev A\r
                replace I2S to I2S0\r
17./ Examples\LCD\Lcd_Demo\IS42S16400D.c\r
                replace EMC pin setting to be compatible with Rev A\r
18./ Examples\SSP\All SSP examples: replace SSP pin setting to be compatible with Rev A\r
19./ Timer_Capture and Timer_FreqMeasure: replace Capture input pin setting to be compatible with Rev A\r
20./ Examples\UART\All UART examples: replace UART pin setting to be compatible with Rev A\r
21./ Examples\USBDEV\USB_*\usbhw.c\r
                replace USB pin setting to be compatible with Rev A\r
                correct clock in Init function\r
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RELEASE: LPC1800CMSIS_20110829\r
1./ Add GNU Support\r
modify pasting in can.c to be compatible with GCC\r
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RELEASE: LPC1800CMSIS_20110729\r
1./ IAR flash support is moved to Tools folder\r
2./ ADC.h fixed macro ADC_CR_BITACC\r
3./ I2S.h fixed comment\r
        from #endif /* LPC17XX_SSP_H_ */\r
        to #endif /* LPC18XX_I2S_H_ */\r
4./ ADC.c fix ADC_Init Clock by rounding clk div value\r
5./ i2s.c fixed some comment\r
6./ EMC Nor Flash renamed file  flash programing function\r
7./ SDRAM can run at MAX EMC Speed\r
8./ Removed flash programing support for LHF00L28\r
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RELEASE: LPC1800CMSIS_20110627\r
1./ Fix abstract\r
2./ Fix I2S FreqConfig mistake\r
3./ Add DFU Driver and App\r
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RELEASE: LPC1800CMSIS_20110613\r
1./ Add DSP Document\r
2./ Speed Up External FLash Mode\r
3./ Add IAR Flash Support\r
4./ Fix GPDMA Flash transfer issue in IAR\r
5./ Set default taget is EXFLASH(Keil only)\r
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************************************************************************************************************************************************\r
RELEASE: LPC1800CMSIS_20110603\r
1./ Add DSP_lib into Core folder\r
2./ Update core_cmFunc.h and core_cmInstr.h for solving conflict with IAR EWARM version 6.20 or later\r
3./ add IAR startup file and IAR support files in Core\DeviceSupport\NXP\LPC18xx\r
4./ Modify SystemInit function to support RAM mode\r
        #if (__RAM_MODE__)\r
        SCB->VTOR = 0x10000000;\r
        #endif\r
5./ Modify CCU1 and CCU2 struct in LPC18xx.h\r
6./ Fix bug in uart_set_divisors function\r
7./ Change UART clock source from XTAL to PLL1 in uart driver\r
8./ Fix RTC bugs\r
9./ Modify lpc18xx_GPDMA.c to support IAR compiler\r
10./ Modify lpc18xx_cgu.c to support IAR compiler\r
11./ Update lpc_types.h to support IAR compiler\r
12./ Fix bugs in I2S driver\r
13./ Remove Warnings\r
14./ Change new header, add more comments\r
15./ Standalize example, project, output names\r
16./ Support IAR EWARM (RAM mode)\r
17./ SUpport Hitex Board as default\r
18./ Modify hardware configuration in abstract files\r
19./ Set default Target to RAM mode\r
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************************************************************************************************************************************************\r
RELEASE: LPC1800CMSIS_20110514\r
1./ Change all Keil example projects from device Cortex M3 to LPC1850\r
2./ change all examples to support Hitex board only\r
3./ Verify all project option\r
4./ separated CGU and PWR into 2 independent drivers\r
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************************************************************************************************************************************************\r
RELEASE: LPC1800CMSIS_20110421\r
1./ Add CAN driver:\r
        Drivers/include/lpc18xx_can.h\r
        Drivers/source/lpc18xx_can.c\r
\r
2./ Add CAN example for simple Transceiver\r
        Examples\C_CAN\simpleTxRx\r
\r
3./ Add 4 USB Rom examples:\r
        USB_DFU\r
        USB_HID\r
        USB_MassStorage\r
        USB_Composite\r
\r
4./ Enable _printf function\r
        debug_frmwrk.h:\r
                uncomment _printf function declaration\r
        debug_frmwrk.c:\r
                uncomment _printf function\r
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************************************************************************************************************************************************\r
RELEASE: LPC1800CMSIS_20110401\r
\r
1./ Change all Keil example proiects from device NXP LPC1768 to ARM Cortex-M3\r
\r
2./ Fix bug in I2C driver (customer feedback)\r
        Problem description: \r
                I2C_MasterTransferData() is not able to \r
                (1) Send, \r
                (2) doing a repeated Start and \r
                (3) starting to receive with one function call. \r
                Problem is that the repeated start is not generated, but a retransmission of the \r
                last word is startet. \r
        Solve: change \r
                I2Cx->I2CONCLR = I2C_I2CONCLR_SIC; \r
                I2Cx->I2CONSET = I2C_I2CONSET_STA; \r
        to \r
                I2Cx->I2CONSET = I2C_I2CONSET_STA; \r
                I2Cx->I2CONCLR = I2C_I2CONCLR_SIC; \r
                in function I2C_Start ()\r
\r
3./ lpc18xx_timer.c:\r
        Function TIM_ClearIntPending():\r
                Change TIMx->IR |= TIM_IR_CLR(IntFlag);\r
                To     TIMx->IR = TIM_IR_CLR(IntFlag);\r
        Function TIM_ClearIntCapturePending():\r
                Change TIMx->IR |= (1<<(4+IntFlag));\r
                To     TIMx->IR = (1<<(4+IntFlag));\r
        Function TIM_GetCaptureValue(): \r
                Add return 0;\r
\r
4./ EMC - Nor Flash: remove example build target for FLASH mode as it only can run in RAM mode.\r
\r
5./ SCT: update Fizzim tool to version 1.1\r
\r
6./ Tools:\r
        Update Flash burning for LHF00L28 and SST39X320X\r
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************************************************************************************************************************************************\r
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RELEASE: LPC1800CMSIS_20110324\r
\r
1./ Current support hardwares:\r
        - NXP LPC1800 Evaluation board through definition 'BOARD_NXP_EA'\r
        - Hitex LPC1800 Board through definition 'BOARD_HITEX_LPC1800'\r
    Some examples can run on LPC1800 Evaluation board, some can run on Hitex board...Please refer to abstract.txt\r
\r
2./ Addin new flash support under Tools/Flash/SST39X320X\r
\r
3./ lpc18xx_evrt.c:\r
        Change EVRTx->SET_EN |= (1<<(uint8_t)EVRT_Src);\r
        To     EVRTx->SET_EN = (1<<(uint8_t)EVRT_Src);\r
        Purpose: prevent clearing other set bits as writing '0' has no effect\r
\r
4./ Fix ATIMER_WIC example:\r
        - Configure 32KHZ osc in lpc18xx_atimer.c\r
        - Call the configuration function in atimer_wic.c\r
\r
5./ Fix RTC_Alarm example:\r
        - Configure 32KHZ osc in lpc18xx_rtc.c\r
        - Update Rtc_Alarm.c\r
\r
6./ Add in PWR_PowerDown example\r
\r
7./ Add in PWR_DeepPowerDown example\r
\r
8./ All example in PWR are modified to wait for '1' sent from PC's COM port to start\r
\r
9./ Fix LCD Logic4.3 example to run on Hitex LPC1800 Board\r
\r
10./ Add in GPDMA Flash_2_Ram_Test example\r
\r
11./ EMC EXT_SDRAM example: join IS42S16400D.c and MT48LC4M32B2.c into SDRAM_Init.c\r
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12./ lpc18xx_i2s.c: update I2S_FreqConfig() function\r
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************************************************************************************************************************************************\r
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RELEASE: LPC1800CMSIS_20110311\r
\r
1./ This package is compliant to CMSIS 2.0\r
\r
2./ Add in 'Tools' folder which contains neccessary material for building project, examples like flash burning,..\r
\r
3./ Examples are given in Keil uVision 4 project\r
\r
4./ Current support hardwares:\r
        - NXP LPC1800 Evaluation board through definition 'BOARD_NXP_EA'\r
\r
5./ Examples can run:\r
        - RAM (debug) mode\r
        - ROM (Flash, stand alone) mode\r
                + External Nor Flash. Flash Part supporting:\r
                        1) LHF00L28\r
\r
6./ Each example folder has an 'abstract.txt' file, this is where user can start\r
\r
7./ Below is list of drivers and examples:\r
        - ADC (lpc18xx_adc):\r
                + ADC_Interrupt\r
                + ADC_Polling\r
                + ADC_Burst\r
                + ADC_Dma\r
        - ATIMER (lpc18xx_atimer):\r
                + ATIMER_interrupt\r
        - PWR (lpc18xx_clkpwr):\r
                + CLKPWR_Sleep\r
                + CLKPWR_DeepSleep\r
        - DAC (lpc18xx_dac):\r
                + DAC_WaveGenerator\r
                + DAC_Dma\r
        - EMAC (lpc18xx_emac):\r
                + EMAC_EasyWeb\r
        - EMC (no driver):\r
                + EXT_SDRAM\r
                + NOR_FLASH\r
        - GPDMA (lpc18xx_gpdma):\r
                + GPDMA_Ram2Ram\r
                + GPDMA_LinkList\r
        - GPIO (lpc18xx_gpio):\r
                + GPIO_LedBlinky\r
        - I2C (lpc18xx_i2c):\r
                + I2C_Master\r
        - I2S (lpc18xx_i2s):\r
                + I2S_Audio\r
        - LCD (lpc18xx_lcd)\r
        - MCPWM (lpc18xx_mcpwm):\r
                + MCPWM_Simple\r
        - SCU (lpc18xx_scu)\r
        - QEI (lpc18xx_qei):\r
                + QEI_Velo\r
        - RIT (lpc18xx_rit):\r
                + RIT_Interrupt\r
        - RTC (lpc18xx_rtc):\r
                + RTC_Calib\r
                + RTC_Alarm\r
        - SSP (lpc18xx_ssp):\r
                + SSP_SPI\r
                + SSP_Microwire\r
                + SSP_TI\r
        - TIMER (lpc18xx_timer):\r
                + TIMER_Capture\r
                + TIMER_MatchInterrupt\r
                + TIMER_FreqMeasure\r
        - UART (lpc18xx_uart):\r
                + UART_Autobaud\r
                + UART_Dma\r
                + UART_Interrupt\r
                + UART_Polling\r
                + UART_RS485\r
        - SCT(LPC18xx_SCT):\r
                + SCT_Capture\r
                + SCT_Match\r
        - WWDT (lpc18xx_wwdt):\r
                + WWDT_Interrupt\r
        - CORTEXM3 (no driver):\r
                + CORTEXM3_BitBanding\r
                + CORTEXM3_MPU\r
                + CORTEXM3_PriviledgeMode\r
        - USBDEV (no driver):\r
                + USBDEV_VirtualCOM\r
                + USBDEV_MassStorage\r
        - NVIC (no driver):\r
                + NVIC_Priority\r
                + NVIC_VecRelocation\r
        - EVRT (lpc18xx_evrt)\r