2 * @brief GPIO Registers and Functions
5 * Copyright(C) NXP Semiconductors, 2012
9 * Software that is described herein is for illustrative purposes only
10 * which provides customers with programming information regarding the
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35 #include "sys_config.h"
42 /** @defgroup IP_GPIO_003 IP: GPIO register block and driver (003)
48 * @brief GPIO port register block structure
50 typedef struct { /*!< GPIO_PORT Structure */
51 __IO uint32_t DATA[4096]; /*!< Offset: 0x0000 to 0x3FFC Data address masking register (R/W) */
52 uint32_t RESERVED1[4096];
53 __IO uint32_t DIR; /*!< Offset: 0x8000 Data direction register (R/W) */
54 __IO uint32_t IS; /*!< Offset: 0x8004 Interrupt sense register (R/W) */
55 __IO uint32_t IBE; /*!< Offset: 0x8008 Interrupt both edges register (R/W) */
56 __IO uint32_t IEV; /*!< Offset: 0x800C Interrupt event register (R/W) */
57 __IO uint32_t IE; /*!< Offset: 0x8010 Interrupt mask register (R/W) */
58 __I uint32_t RIS; /*!< Offset: 0x8014 Raw interrupt status register (R/ ) */
59 __I uint32_t MIS; /*!< Offset: 0x8018 Masked interrupt status register (R/ ) */
60 __O uint32_t IC; /*!< Offset: 0x801C Interrupt clear register (W) */
64 * @brief Initialize GPIO block
65 * @param pGPIO : the base address of the GPIO block
68 STATIC INLINE void IP_GPIO_Init(IP_GPIO_003_T *pGPIO)
72 * @brief Write data to port
73 * @param pGPIO : the base address of the GPIO block
74 * @param mask : determines which pins will be written. bits [11:0] address pins PIOn.0~PIOn.11.
75 * If bit's value is 1, the state of the relevant pin is updated. Otherwise, it is unchanged.
76 * @param val : bit values.
78 * @note mask is in range 0~4095.
80 STATIC INLINE void IP_GPIO_WritePort(IP_GPIO_003_T *pGPIO, uint16_t mask, uint16_t val)
82 pGPIO->DATA[mask] = val;
86 * @brief Set state of pin
87 * @param pGPIO : the base address of the GPIO block
88 * @param pin : pin number (0-11)
89 * @param val : true for high, false for low
92 STATIC INLINE void IP_GPIO_WritePortBit(IP_GPIO_003_T *pGPIO, uint8_t pin, bool val)
94 pGPIO->DATA[1 << pin] = val << pin;
98 * @brief Read port state
99 * @param pGPIO : the base address of the GPIO block
100 * @return Port value. A 1-bit indicate the relevant pins is high.
102 STATIC INLINE uint32_t IP_GPIO_ReadPort(IP_GPIO_003_T *pGPIO)
104 return pGPIO->DATA[4095];
108 * @brief Read pin state
109 * @param pGPIO : the base address of the GPIO block
110 * @param pin : pin number (0-11)
111 * @return true of the GPIO is high, false if low
113 STATIC INLINE bool IP_GPIO_ReadPortBit(IP_GPIO_003_T *pGPIO, uint8_t pin)
115 return (bool) ((pGPIO->DATA[1 << pin] >> pin) & 1);
119 * @brief Set GPIO direction for a pin
120 * @param pGPIO : the base address of the GPIO block
121 * @param pin : pin number (0-11)
122 * @param dir : true for output, false for input
125 STATIC INLINE void IP_GPIO_WriteDirBit(IP_GPIO_003_T *pGPIO, uint8_t pin, bool dir)
128 pGPIO->DIR |= 1UL << pin;
131 pGPIO->DIR &= ~(1UL << pin);
136 * @brief Set GPIO direction for a port
137 * @param pGPIO : the base address of the GPIO block
138 * @param bitVal : bit value
139 * @param dir : true for output, false for input
142 STATIC INLINE void IP_GPIO_SetDir(IP_GPIO_003_T *pGPIO, uint32_t bitVal, bool dir)
145 pGPIO->DIR |= bitVal;
148 pGPIO->DIR &= ~bitVal;
153 * @brief Read a GPIO direction (out or in)
154 * @param pGPIO : the base address of the GPIO block
155 * @param pin : pin number (0-11)
156 * @return true of the GPIO is an output, false if input
158 STATIC INLINE bool IP_GPIO_ReadDirBit(IP_GPIO_003_T *pGPIO, uint8_t pin)
160 return (bool) (((pGPIO->DIR) >> pin) & 1);
164 GPIOPININT_FALLING_EDGE = 0, /*!<Selects interrupt on pin x to be triggered on FALLING level*/
165 GPIOPININT_ACTIVE_LOW_LEVEL = 1, /*!<Selects interrupt on pin x to be triggered on LOW level*/
166 GPIOPININT_RISING_EDGE = (1 << 12), /*!<Selects interrupt on pin x to be triggered on RISING level*/
167 GPIOPININT_ACTIVE_HIGH_LEVEL = 1 | (1 << 12), /*!<Selects interrupt on pin x to be triggered on HIGH level*/
168 GPIOPININT_BOTH_EDGES = (1 << 24), /*!<Selects interrupt on pin x to be triggered on both edges*/
169 } IP_GPIOPININT_MODE_T;
172 * @brief Configure GPIO Interrupt
173 * @param pGPIO : pointer to GPIO interrupt register block
174 * @param pin : GPIO port number interrupt
175 * @param mode : Interrupt mode.
178 void IP_GPIO_IntCmd(IP_GPIO_003_T *pGPIO, uint8_t pin, IP_GPIOPININT_MODE_T mode);
181 * @brief Get GPIO Interrupt Status
182 * @param pGPIO : pointer to GPIO interrupt register block
183 * @param pin : pin number
184 * @return true if interrupt is pending, otherwise false
186 STATIC INLINE bool IP_GPIO_IntGetStatus(IP_GPIO_003_T *pGPIO, uint8_t pin)
188 return (bool) (((pGPIO->RIS) >> pin) & 0x01);
192 * @brief Clear GPIO Interrupt (Edge interrupt cases only)
193 * @param pGPIO : pointer to GPIO interrupt register block
194 * @param pin : pin number
197 STATIC INLINE void IP_GPIO_IntClear(IP_GPIO_003_T *pGPIO, uint8_t pin)
199 pGPIO->IC |= (1 << pin);
210 #endif /* __GPIO_003_H_ */