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   1
   2 /*******************************************************************
   3 *
   4 * CAUTION: This file is automatically generated by HSI.
   5 * Version:
   6 * DO NOT EDIT.
   7 *
   8 * Copyright (C) 2010-2015 Xilinx, Inc. All Rights Reserved.*
   9 *Permission is hereby granted, free of charge, to any person obtaining a copy
  10 *of this software and associated documentation files (the Software), to deal
  11 *in the Software without restriction, including without limitation the rights
  12 *to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  13 *copies of the Software, and to permit persons to whom the Software is
  14 *furnished to do so, subject to the following conditions:
  15 *
  16 *The above copyright notice and this permission notice shall be included in
  17 *all copies or substantial portions of the Software.
  18 *
  19 * Use of the Software is limited solely to applications:
  20 *(a) running on a Xilinx device, or
  21 *(b) that interact with a Xilinx device through a bus or interconnect.
  22 *
  23 *THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  24 *IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  25 *FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  26 *XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  27 *WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
  28 *OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  29 *
  30 *Except as contained in this notice, the name of the Xilinx shall not be used
  31 *in advertising or otherwise to promote the sale, use or other dealings in
  32 *this Software without prior written authorization from Xilinx.
  33 *
  34
  35 *
  36 * Description: Driver configuration
  37 *
  38 *******************************************************************/
  39
  40 #include "xparameters.h"
  41 #include "xipipsu.h"
  42
  43 /*
  44 * The configuration table for devices
  45 */
  46
  47 XIpiPsu_Config XIpiPsu_ConfigTable[] =
  48 {
  49
  50         {
  51                 XPAR_PSU_IPI_0_DEVICE_ID,
  52                 XPAR_PSU_IPI_0_BASE_ADDRESS,
  53                 XPAR_PSU_IPI_0_BIT_MASK,
  54                 XPAR_PSU_IPI_0_BUFFER_INDEX,
  55                 XPAR_PSU_IPI_0_INT_ID,
  56                 XPAR_XIPIPSU_NUM_TARGETS,
  57                 {
  58
  59                         {
  60                                 XPAR_PSU_IPI_0_BIT_MASK,
  61                                 XPAR_PSU_IPI_0_BUFFER_INDEX
  62                         },
  63                         {
  64                                 XPAR_PSU_IPI_1_BIT_MASK,
  65                                 XPAR_PSU_IPI_1_BUFFER_INDEX
  66                         },
  67                         {
  68                                 XPAR_PSU_IPI_2_BIT_MASK,
  69                                 XPAR_PSU_IPI_2_BUFFER_INDEX
  70                         },
  71                         {
  72                                 XPAR_PSU_IPI_3_BIT_MASK,
  73                                 XPAR_PSU_IPI_3_BUFFER_INDEX
  74                         },
  75                         {
  76                                 XPAR_PSU_IPI_4_BIT_MASK,
  77                                 XPAR_PSU_IPI_4_BUFFER_INDEX
  78                         },
  79                         {
  80                                 XPAR_PSU_IPI_5_BIT_MASK,
  81                                 XPAR_PSU_IPI_5_BUFFER_INDEX
  82                         },
  83                         {
  84                                 XPAR_PSU_IPI_6_BIT_MASK,
  85                                 XPAR_PSU_IPI_6_BUFFER_INDEX
  86                         },
  87                         {
  88                                 XPAR_PSU_IPI_7_BIT_MASK,
  89                                 XPAR_PSU_IPI_7_BUFFER_INDEX
  90                         },
  91                         {
  92                                 XPAR_PSU_IPI_8_BIT_MASK,
  93                                 XPAR_PSU_IPI_8_BUFFER_INDEX
  94                         },
  95                         {
  96                                 XPAR_PSU_IPI_9_BIT_MASK,
  97                                 XPAR_PSU_IPI_9_BUFFER_INDEX
  98                         },
  99                         {
 100                                 XPAR_PSU_IPI_10_BIT_MASK,
 101                                 XPAR_PSU_IPI_10_BUFFER_INDEX
 102                         }
 103                 }
 104         }
 105 };