1 /* Copyright 2018 SiFive, Inc */
2 /* SPDX-License-Identifier: Apache-2.0 */
4 #ifndef METAL__DRIVERS__SIFIVE_CLIC0_H
5 #define METAL__DRIVERS__SIFIVE_CLIC0_H
7 #include <metal/compiler.h>
8 #include <metal/drivers/riscv_cpu.h>
10 #define METAL_CLIC_MAX_NMBITS 2
11 #define METAL_CLIC_MAX_NLBITS 8
12 #define METAL_CLIC_MAX_NVBITS 1
14 #define METAL_SIFIVE_CLIC0_CLICCFG_NMBITS_MMODE 0x00
15 #define METAL_SIFIVE_CLIC0_CLICCFG_NMBITS_SMODE1 0x20
16 #define METAL_SIFIVE_CLIC0_CLICCFG_NMBITS_SMODE2 0x40
17 #define METAL_SIFIVE_CLIC0_CLICCFG_NMBITS_MASK 0x60
18 #define METAL_SIFIVE_CLIC0_CLICCFG_NLBITS_MASK 0x1E
19 #define METAL_SIFIVE_CLIC0_CLICCFG_NVBIT_MASK 0x01
21 #define METAL_CLIC_ICTRL_SMODE1_MASK 0x7F /* b8 set imply M-mode */
22 #define METAL_CLIC_ICTRL_SMODE2_MASK 0x3F /* b8 set M-mode, b7 clear U-mode */
24 #define METAL_MAX_INTERRUPT_LEVEL ((1 << METAL_CLIC_MAX_NLBITS) - 1)
26 struct __metal_driver_vtable_sifive_clic0 {
27 struct metal_interrupt_vtable clic_vtable;
30 __METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_clic0)
32 #define __METAL_MACHINE_MACROS
33 #include <metal/machine.h>
34 struct __metal_driver_sifive_clic0 {
35 struct metal_interrupt controller;
37 metal_interrupt_handler_t metal_mtvt_table[__METAL_CLIC_SUBINTERRUPTS];
38 __metal_interrupt_data metal_exint_table[__METAL_CLIC_SUBINTERRUPTS];
40 #undef __METAL_MACHINE_MACROS