1 /******************************************************************************
3 * Copyright (C) 2002 - 2014 Xilinx, Inc. All rights reserved.
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6 * of this software and associated documentation files (the "Software"), to deal
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29 * this Software without prior written authorization from Xilinx.
31 ******************************************************************************/
32 /*****************************************************************************/
35 * @file xenv_standalone.h
37 * Defines common services specified by xenv.h.
40 * This file is not intended to be included directly by driver code.
41 * Instead, the generic xenv.h file is intended to be included by driver
45 * MODIFICATION HISTORY:
47 * Ver Who Date Changes
48 * ----- ---- -------- -----------------------------------------------
49 * 1.00a wgr 02/28/07 Added cache handling macros.
50 * 1.00a wgr 02/27/07 Simplified code. Deprecated old-style macro names.
51 * 1.00a rmm 01/24/06 Implemented XENV_USLEEP. Assume implementation is being
52 * used under Xilinx standalone BSP.
53 * 1.00a xd 11/03/04 Improved support for doxygen.
54 * 1.00a rmm 03/21/02 First release
55 * 1.00a wgr 03/22/07 Converted to new coding style.
56 * 1.00a rpm 06/29/07 Added udelay macro for standalone
57 * 1.00a xd 07/19/07 Included xparameters.h as XPAR_ constants are referred
58 * to in MICROBLAZE section
59 * 1.00a ecm 09/19/08 updated for v7.20 of Microblaze, new functionality
64 ******************************************************************************/
66 #ifndef XENV_STANDALONE_H
67 #define XENV_STANDALONE_H
69 #include "xil_types.h"
75 /***************************** Include Files *********************************/
76 /******************************************************************************
78 * Get the processor dependent includes
80 ******************************************************************************/
84 #if defined __MICROBLAZE__
85 # include "mb_interface.h"
86 # include "xparameters.h" /* XPAR constants used below in MB section */
90 # include "xcache_l.h" /* also include xcache_l.h for caching macros */
93 /******************************************************************************
95 * MEMCPY / MEMSET related macros.
97 * The following are straight forward implementations of memset and memcpy.
99 * NOTE: memcpy may not work if source and target memory area are overlapping.
101 ******************************************************************************/
102 /*****************************************************************************/
105 * Copies a non-overlapping block of memory.
108 * Destination address to copy data to.
111 * Source address to copy data from.
114 * Number of bytes to copy.
119 * The use of XENV_MEM_COPY is deprecated. Use memcpy() instead.
122 * This implemention MAY BREAK work if source and target memory
123 * area are overlapping.
125 *****************************************************************************/
127 #define XENV_MEM_COPY(DestPtr, SrcPtr, Bytes) \
128 memcpy((void *) DestPtr, (const void *) SrcPtr, (size_t) Bytes)
132 /*****************************************************************************/
135 * Fills an area of memory with constant data.
138 * Destination address to copy data to.
144 * Number of bytes to copy.
149 * The use of XENV_MEM_FILL is deprecated. Use memset() instead.
151 *****************************************************************************/
153 #define XENV_MEM_FILL(DestPtr, Data, Bytes) \
154 memset((void *) DestPtr, (s32) Data, (size_t) Bytes)
158 /******************************************************************************
160 * TIME related macros
162 ******************************************************************************/
165 * A structure that contains a time stamp used by other time stamp macros
166 * defined below. This structure is processor dependent.
168 typedef s32 XENV_TIME_STAMP;
170 /*****************************************************************************/
173 * Time is derived from the 64 bit PPC timebase register
175 * @param StampPtr is the storage for the retrieved time stamp.
181 * Signature: void XENV_TIME_STAMP_GET(XTIME_STAMP *StampPtr)
183 * This macro must be implemented by the user.
185 *****************************************************************************/
186 #define XENV_TIME_STAMP_GET(StampPtr)
188 /*****************************************************************************/
191 * This macro is not yet implemented and always returns 0.
193 * @param Stamp1Ptr is the first sampled time stamp.
194 * @param Stamp2Ptr is the second sampled time stamp.
200 * This macro must be implemented by the user.
202 *****************************************************************************/
203 #define XENV_TIME_STAMP_DELTA_US(Stamp1Ptr, Stamp2Ptr) (0)
205 /*****************************************************************************/
208 * This macro is not yet implemented and always returns 0.
210 * @param Stamp1Ptr is the first sampled time stamp.
211 * @param Stamp2Ptr is the second sampled time stamp.
217 * This macro must be implemented by the user.
219 *****************************************************************************/
220 #define XENV_TIME_STAMP_DELTA_MS(Stamp1Ptr, Stamp2Ptr) (0)
222 /*****************************************************************************/
224 * XENV_USLEEP(unsigned delay)
226 * Delay the specified number of microseconds. Not implemented without OS
230 * Number of microseconds to delay.
234 *****************************************************************************/
237 #define XENV_USLEEP(delay) usleep(delay)
238 #define udelay(delay) usleep(delay)
240 #define XENV_USLEEP(delay)
241 #define udelay(delay)
245 /******************************************************************************
247 * CACHE handling macros / mappings
249 ******************************************************************************/
250 /******************************************************************************
252 * Processor independent macros
254 ******************************************************************************/
256 #define XCACHE_ENABLE_CACHE() \
257 { XCACHE_ENABLE_DCACHE(); XCACHE_ENABLE_ICACHE(); }
259 #define XCACHE_DISABLE_CACHE() \
260 { XCACHE_DISABLE_DCACHE(); XCACHE_DISABLE_ICACHE(); }
263 /******************************************************************************
267 * NOTE: Currently the following macros will only work on systems that contain
268 * only ONE MicroBlaze processor. Also, the macros will only be enabled if the
269 * system is built using a xparameters.h file.
271 ******************************************************************************/
273 #if defined __MICROBLAZE__
275 /* Check if MicroBlaze data cache was built into the core.
277 #if (XPAR_MICROBLAZE_USE_DCACHE == 1)
278 # define XCACHE_ENABLE_DCACHE() microblaze_enable_dcache()
279 # define XCACHE_DISABLE_DCACHE() microblaze_disable_dcache()
280 # define XCACHE_INVALIDATE_DCACHE() microblaze_invalidate_dcache()
282 # define XCACHE_INVALIDATE_DCACHE_RANGE(Addr, Len) \
283 microblaze_invalidate_dcache_range((s32)(Addr), (s32)(Len))
285 #if (XPAR_MICROBLAZE_DCACHE_USE_WRITEBACK == 1)
286 # define XCACHE_FLUSH_DCACHE() microblaze_flush_dcache()
287 # define XCACHE_FLUSH_DCACHE_RANGE(Addr, Len) \
288 microblaze_flush_dcache_range((s32)(Addr), (s32)(Len))
290 # define XCACHE_FLUSH_DCACHE() microblaze_invalidate_dcache()
291 # define XCACHE_FLUSH_DCACHE_RANGE(Addr, Len) \
292 microblaze_invalidate_dcache_range((s32)(Addr), (s32)(Len))
293 #endif /*XPAR_MICROBLAZE_DCACHE_USE_WRITEBACK*/
296 # define XCACHE_ENABLE_DCACHE()
297 # define XCACHE_DISABLE_DCACHE()
298 # define XCACHE_INVALIDATE_DCACHE_RANGE(Addr, Len)
299 # define XCACHE_FLUSH_DCACHE_RANGE(Addr, Len)
300 #endif /*XPAR_MICROBLAZE_USE_DCACHE*/
303 /* Check if MicroBlaze instruction cache was built into the core.
305 #if (XPAR_MICROBLAZE_USE_ICACHE == 1)
306 # define XCACHE_ENABLE_ICACHE() microblaze_enable_icache()
307 # define XCACHE_DISABLE_ICACHE() microblaze_disable_icache()
309 # define XCACHE_INVALIDATE_ICACHE() microblaze_invalidate_icache()
311 # define XCACHE_INVALIDATE_ICACHE_RANGE(Addr, Len) \
312 microblaze_invalidate_icache_range((s32)(Addr), (s32)(Len))
315 # define XCACHE_ENABLE_ICACHE()
316 # define XCACHE_DISABLE_ICACHE()
317 #endif /*XPAR_MICROBLAZE_USE_ICACHE*/
320 /******************************************************************************
324 * Note that the XCACHE_ENABLE_xxx functions are hardcoded to enable a
325 * specific memory region (0x80000001). Each bit (0-30) in the regions
326 * bitmask stands for 128MB of memory. Bit 31 stands for the upper 2GB
329 * regions --> cached address range
330 * ------------|--------------------------------------------------
331 * 0x80000000 | [0, 0x7FFFFFF]
332 * 0x00000001 | [0xF8000000, 0xFFFFFFFF]
333 * 0x80000001 | [0, 0x7FFFFFF],[0xF8000000, 0xFFFFFFFF]
335 ******************************************************************************/
337 #elif defined __PPC__
339 #define XCACHE_ENABLE_DCACHE() XCache_EnableDCache(0x80000001)
340 #define XCACHE_DISABLE_DCACHE() XCache_DisableDCache()
341 #define XCACHE_ENABLE_ICACHE() XCache_EnableICache(0x80000001)
342 #define XCACHE_DISABLE_ICACHE() XCache_DisableICache()
344 #define XCACHE_INVALIDATE_DCACHE_RANGE(Addr, Len) \
345 XCache_InvalidateDCacheRange((u32)(Addr), (u32)(Len))
347 #define XCACHE_FLUSH_DCACHE_RANGE(Addr, Len) \
348 XCache_FlushDCacheRange((u32)(Addr), (u32)(Len))
350 #define XCACHE_INVALIDATE_ICACHE() XCache_InvalidateICache()
353 /******************************************************************************
355 * Unknown processor / architecture
357 ******************************************************************************/
360 /* #error "Unknown processor / architecture. Must be MicroBlaze or PowerPC." */
368 #endif /* #ifndef XENV_STANDALONE_H */