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   1 /*\r
   2     FreeRTOS V7.0.1 - Copyright (C) 2011 Real Time Engineers Ltd.\r
   3         \r
   4 \r
   5     ***************************************************************************\r
   6      *                                                                       *\r
   7      *    FreeRTOS tutorial books are available in pdf and paperback.        *\r
   8      *    Complete, revised, and edited pdf reference manuals are also       *\r
   9      *    available.                                                         *\r
  10      *                                                                       *\r
  11      *    Purchasing FreeRTOS documentation will not only help you, by       *\r
  12      *    ensuring you get running as quickly as possible and with an        *\r
  13      *    in-depth knowledge of how to use FreeRTOS, it will also help       *\r
  14      *    the FreeRTOS project to continue with its mission of providing     *\r
  15      *    professional grade, cross platform, de facto standard solutions    *\r
  16      *    for microcontrollers - completely free of charge!                  *\r
  17      *                                                                       *\r
  18      *    >>> See http://www.FreeRTOS.org/Documentation for details. <<<     *\r
  19      *                                                                       *\r
  20      *    Thank you for using FreeRTOS, and thank you for your support!      *\r
  21      *                                                                       *\r
  22     ***************************************************************************\r
  23 \r
  24 \r
  25     This file is part of the FreeRTOS distribution.\r
  26 \r
  27     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  28     the terms of the GNU General Public License (version 2) as published by the\r
  29     Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
  30     >>>NOTE<<< The modification to the GPL is included to allow you to\r
  31     distribute a combined work that includes FreeRTOS without being obliged to\r
  32     provide the source code for proprietary components outside of the FreeRTOS\r
  33     kernel.  FreeRTOS is distributed in the hope that it will be useful, but\r
  34     WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
  35     or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
  36     more details. You should have received a copy of the GNU General Public\r
  37     License and the FreeRTOS license exception along with FreeRTOS; if not it\r
  38     can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
  39     by writing to Richard Barry, contact details for whom are available on the\r
  40     FreeRTOS WEB site.\r
  41 \r
  42     1 tab == 4 spaces!\r
  43 \r
  44     http://www.FreeRTOS.org - Documentation, latest information, license and\r
  45     contact details.\r
  46 \r
  47     http://www.SafeRTOS.com - A version that is certified for use in safety\r
  48     critical systems.\r
  49 \r
  50     http://www.OpenRTOS.com - Commercial support, development, porting,\r
  51     licensing and training services.\r
  52 */\r
  53 \r
  54 /* Scheduler includes. */\r
  55 #include "FreeRTOS.h"\r
  56 #include "task.h"\r
  57 \r
  58 /* Hardware includes. */\r
  59 #include <microblaze_exceptions_i.h>\r
  60 #include <microblaze_exceptions_g.h>\r
  61 \r
  62 #define portexR3_STACK_OFFSET   4\r
  63 #define portexR4_STACK_OFFSET   5\r
  64 #define portexR5_STACK_OFFSET   6\r
  65 #define portexR6_STACK_OFFSET   7\r
  66 #define portexR7_STACK_OFFSET   8\r
  67 #define portexR8_STACK_OFFSET   9\r
  68 #define portexR9_STACK_OFFSET   10\r
  69 #define portexR10_STACK_OFFSET  11\r
  70 #define portexR11_STACK_OFFSET  12\r
  71 #define portexR12_STACK_OFFSET  13\r
  72 #define portexR15_STACK_OFFSET  16\r
  73 #define portexR18_STACK_OFFSET  18\r
  74 #define portexMSR_STACK_OFFSET  19\r
  75 #define portexR19_STACK_OFFSET  -1\r
  76 \r
  77 #define portexESR_DS_MASK               0x00001000UL\r
  78 \r
  79 #define portexASM_HANDLER_STACK_FRAME_SIZE 84UL\r
  80 \r
  81 /* Exclude the entire file if the MicroBlaze is not configured to handle\r
  82 exceptions, or the application defined configuration item \r
  83 configINSTALL_EXCEPTION_HANDLERS is not set to 1. */\r
  84 #if ( MICROBLAZE_EXCEPTIONS_ENABLED == 1 ) && ( configINSTALL_EXCEPTION_HANDLERS == 1 )\r
  85 \r
  86 /* These are global volatiles to allow their inspection by a debugger. */\r
  87 unsigned long *pulStackPointerOnFunctionEntry = NULL, ulBTROnFunctionEntry = 0UL;\r
  88 \r
  89 static xPortRegisterDump xRegisterDump;\r
  90 \r
  91 void vPortExceptionHandler( void *pvExceptionID );\r
  92 extern void vPortExceptionHandlerEntry( void *pvExceptionID );\r
  93 \r
  94 /*-----------------------------------------------------------*/\r
  95 extern void vApplicationExceptionRegisterDump( xPortRegisterDump *xRegisterDump ) __attribute__((weak));\r
  96 void vApplicationExceptionRegisterDump( xPortRegisterDump *xRegisterDump )\r
  97 {\r
  98         for( ;; )\r
  99         {\r
 100                 portNOP();\r
 101         }\r
 102 }\r
 103 /*-----------------------------------------------------------*/\r
 104 \r
 105 void vPortExceptionHandler( void *pvExceptionID )\r
 106 {\r
 107 extern void *pxCurrentTCB;\r
 108 \r
 109         xRegisterDump.xCurrentTaskHandle = pxCurrentTCB;\r
 110         xRegisterDump.pcCurrentTaskName = pcTaskGetTaskName( NULL );\r
 111 \r
 112         configASSERT( pulStackPointerOnFunctionEntry );\r
 113 \r
 114         /* Obtain the values of registers that were stacked prior to this function\r
 115         being called, and may have changed since they were stacked. */
 116         xRegisterDump.ulR3 = pulStackPointerOnFunctionEntry[ portexR3_STACK_OFFSET ];\r
 117         xRegisterDump.ulR4 = pulStackPointerOnFunctionEntry[ portexR4_STACK_OFFSET ];\r
 118         xRegisterDump.ulR5 = pulStackPointerOnFunctionEntry[ portexR5_STACK_OFFSET ];\r
 119         xRegisterDump.ulR6 = pulStackPointerOnFunctionEntry[ portexR6_STACK_OFFSET ];\r
 120         xRegisterDump.ulR7 = pulStackPointerOnFunctionEntry[ portexR7_STACK_OFFSET ];\r
 121         xRegisterDump.ulR8 = pulStackPointerOnFunctionEntry[ portexR8_STACK_OFFSET ];\r
 122         xRegisterDump.ulR9 = pulStackPointerOnFunctionEntry[ portexR9_STACK_OFFSET ];\r
 123         xRegisterDump.ulR10 = pulStackPointerOnFunctionEntry[ portexR10_STACK_OFFSET ];\r
 124         xRegisterDump.ulR11 = pulStackPointerOnFunctionEntry[ portexR11_STACK_OFFSET ];\r
 125         xRegisterDump.ulR12 = pulStackPointerOnFunctionEntry[ portexR12_STACK_OFFSET ];\r
 126         xRegisterDump.ulR15_return_address_from_subroutine = pulStackPointerOnFunctionEntry[ portexR15_STACK_OFFSET ];\r
 127         xRegisterDump.ulR18 = pulStackPointerOnFunctionEntry[ portexR18_STACK_OFFSET ];\r
 128         xRegisterDump.ulR19 = pulStackPointerOnFunctionEntry[ portexR19_STACK_OFFSET ];\r
 129 \r
 130         /* Obtain the value of all other registers. */\r
 131         xRegisterDump.ulR2_small_data_area = mfgpr( R2 );\r
 132         xRegisterDump.ulR13_read_write_small_data_area = mfgpr( R13 );\r
 133         xRegisterDump.ulR14_return_address_from_interrupt = mfgpr( R14 );\r
 134         xRegisterDump.ulR16_return_address_from_trap = mfgpr( R16 );\r
 135         xRegisterDump.ulR17_return_address_from_some_exceptions = mfgpr( R17 );\r
 136         xRegisterDump.ulR18 = mfgpr( R18 );\r
 137         xRegisterDump.ulR20 = mfgpr( R20 );\r
 138         xRegisterDump.ulR21 = mfgpr( R21 );\r
 139         xRegisterDump.ulR22 = mfgpr( R22 );\r
 140         xRegisterDump.ulR23 = mfgpr( R23 );\r
 141         xRegisterDump.ulR24 = mfgpr( R24 );\r
 142         xRegisterDump.ulR25 = mfgpr( R25 );\r
 143         xRegisterDump.ulR26 = mfgpr( R26 );\r
 144         xRegisterDump.ulR27 = mfgpr( R27 );\r
 145         xRegisterDump.ulR28 = mfgpr( R28 );\r
 146         xRegisterDump.ulR29 = mfgpr( R29 );\r
 147         xRegisterDump.ulR30 = mfgpr( R30 );\r
 148         xRegisterDump.ulR31 = mfgpr( R31 );\r
 149         xRegisterDump.ulR1_SP = ( ( unsigned long ) pulStackPointerOnFunctionEntry ) + portexASM_HANDLER_STACK_FRAME_SIZE;\r
 150         xRegisterDump.ulBTR = ulBTROnFunctionEntry;\r
 151         xRegisterDump.ulMSR = pulStackPointerOnFunctionEntry[ portexMSR_STACK_OFFSET ];\r
 152         xRegisterDump.ulEAR = mfear();\r
 153         xRegisterDump.ulESR = mfesr();\r
 154         xRegisterDump.ulEDR = mfedr();\r
 155 \r
 156 \r
 157 #ifdef THIS_IS_PROBABLY_INCORRECT\r
 158         if( ( xRegisterDump.ulESR * portexESR_DS_MASK ) != 0UL )\r
 159         {\r
 160                 xRegisterDump.ulPC = mfbtr();\r
 161         }\r
 162         else\r
 163         {\r
 164                 xRegisterDump.ulPC = xRegisterDump.ulR17_return_address_from_some_exceptions - 4;\r
 165         }\r
 166 #else\r
 167         xRegisterDump.ulPC = xRegisterDump.ulR17_return_address_from_some_exceptions - 4;\r
 168 #endif\r
 169 \r
 170 \r
 171         #if XPAR_MICROBLAZE_0_USE_FPU == 1\r
 172         {\r
 173                 xRegisterDump.ulFSR = mffsr();\r
 174         }\r
 175         #else\r
 176         {\r
 177                 xRegisterDump.ulFSR = 0UL;\r
 178         }\r
 179         #endif\r
 180 \r
 181         switch( ( unsigned long ) pvExceptionID )\r
 182         {\r
 183                 case XEXC_ID_FSL :\r
 184                                 xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_FSL";\r
 185                                 break;\r
 186 \r
 187                 case XEXC_ID_UNALIGNED_ACCESS :\r
 188                                 xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_UNALIGNED_ACCESS";\r
 189                                 break;\r
 190 \r
 191                 case XEXC_ID_ILLEGAL_OPCODE :\r
 192                                 xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_ILLEGAL_OPCODE";\r
 193                                 break;\r
 194 \r
 195                 case XEXC_ID_M_AXI_I_EXCEPTION :\r
 196                                 xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_M_AXI_I_EXCEPTION or XEXC_ID_IPLB_EXCEPTION";\r
 197                                 break;\r
 198 \r
 199                 case XEXC_ID_M_AXI_D_EXCEPTION :\r
 200                                 xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_M_AXI_D_EXCEPTION or XEXC_ID_DPLB_EXCEPTION";\r
 201                                 break;\r
 202 \r
 203                 case XEXC_ID_DIV_BY_ZERO :\r
 204                                 xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_DIV_BY_ZERO";\r
 205                                 break;\r
 206 \r
 207                 case XEXC_ID_STACK_VIOLATION :\r
 208                                 xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_STACK_VIOLATION or XEXC_ID_MMU";\r
 209                                 break;\r
 210 \r
 211                 #if XPAR_MICROBLAZE_0_USE_FPU == 1\r
 212 \r
 213                         case XEXC_ID_FPU :\r
 214                                                 /*_RB_ More decoding required here and in other exceptions. */\r
 215                                                 xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_FPU see ulFSR value";\r
 216                                                 break;\r
 217 \r
 218                 #endif /* XPAR_MICROBLAZE_0_USE_FPU */\r
 219         }\r
 220 \r
 221         vApplicationExceptionRegisterDump( &xRegisterDump );\r
 222 \r
 223         /* Must not attempt to leave this function! */\r
 224         for( ;; )\r
 225         {\r
 226                 portNOP();\r
 227         }\r
 228 }\r
 229 /*-----------------------------------------------------------*/\r
 230 \r
 231 void vPortExceptionsInstallHandlers( void )\r
 232 {\r
 233 static unsigned long ulHandlersAlreadyInstalled = pdFALSE;\r
 234 \r
 235         if( ulHandlersAlreadyInstalled == pdFALSE )\r
 236         {\r
 237                 ulHandlersAlreadyInstalled = pdTRUE;\r
 238 \r
 239                 #if XPAR_MICROBLAZE_0_UNALIGNED_EXCEPTIONS == 1\r
 240                         microblaze_register_exception_handler( XEXC_ID_UNALIGNED_ACCESS, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_UNALIGNED_ACCESS );\r
 241                 #endif /* XPAR_MICROBLAZE_0_UNALIGNED_EXCEPTIONS*/\r
 242 \r
 243                 #if XPAR_MICROBLAZE_0_ILL_OPCODE_EXCEPTION == 1\r
 244                         microblaze_register_exception_handler( XEXC_ID_ILLEGAL_OPCODE, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_ILLEGAL_OPCODE );\r
 245                 #endif /* XPAR_MICROBLAZE_0_ILL_OPCODE_EXCEPTION*/\r
 246 \r
 247                 #if XPAR_MICROBLAZE_0_M_AXI_I_BUS_EXCEPTION == 1\r
 248                         microblaze_register_exception_handler( XEXC_ID_M_AXI_I_EXCEPTION, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_M_AXI_I_EXCEPTION );\r
 249                 #endif /* XPAR_MICROBLAZE_0_M_AXI_I_BUS_EXCEPTION*/\r
 250 \r
 251                 #if XPAR_MICROBLAZE_0_M_AXI_D_BUS_EXCEPTION == 1\r
 252                         microblaze_register_exception_handler( XEXC_ID_M_AXI_D_EXCEPTION, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_M_AXI_D_EXCEPTION );\r
 253                 #endif /* XPAR_MICROBLAZE_0_M_AXI_D_BUS_EXCEPTION*/\r
 254 \r
 255                 #if XPAR_MICROBLAZE_0_IPLB_BUS_EXCEPTION == 1\r
 256                         microblaze_register_exception_handler( XEXC_ID_IPLB_EXCEPTION, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_IPLB_EXCEPTION );\r
 257                 #endif /* XPAR_MICROBLAZE_0_IPLB_BUS_EXCEPTION*/\r
 258 \r
 259                 #if XPAR_MICROBLAZE_0_DPLB_BUS_EXCEPTION == 1\r
 260                         microblaze_register_exception_handler( XEXC_ID_DPLB_EXCEPTION, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_DPLB_EXCEPTION );\r
 261                 #endif /* XPAR_MICROBLAZE_0_DPLB_BUS_EXCEPTION*/\r
 262 \r
 263                 #if XPAR_MICROBLAZE_0_DIV_ZERO_EXCEPTION == 1\r
 264                         microblaze_register_exception_handler( XEXC_ID_DIV_BY_ZERO, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_DIV_BY_ZERO );\r
 265                 #endif /* XPAR_MICROBLAZE_0_DIV_ZERO_EXCEPTION*/\r
 266 \r
 267                 #if XPAR_MICROBLAZE_0_FPU_EXCEPTION == 1\r
 268                         microblaze_register_exception_handler( XEXC_ID_FPU, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_FPU );\r
 269                 #endif /* XPAR_MICROBLAZE_0_FPU_EXCEPTION*/\r
 270 \r
 271                 #if XPAR_MICROBLAZE_0_FSL_EXCEPTION == 1\r
 272                         microblaze_register_exception_handler( XEXC_ID_FSL, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_FSL );\r
 273                 #endif /* XPAR_MICROBLAZE_0_FSL_EXCEPTION*/\r
 274         }\r
 275 }\r
 276 \r
 277 /* Exclude the entire file if the MicroBlaze is not configured to handle\r
 278 exceptions, or the application defined configuration item \r
 279 configINSTALL_EXCEPTION_HANDLERS is not set to 1. */\r
 280 #endif /* ( MICROBLAZE_EXCEPTIONS_ENABLED == 1 ) && ( configINSTALL_EXCEPTION_HANDLERS == 1 ) */\r
 281 \r
 282 \r
 283 \r